GS66516T
Top cooled 650V enhancement mode GaN transistor
PRELIMINARY DATASHEET
Preliminary – Rev 150406
© 2009-2015 GaN Systems Inc.
1
This information pertains to a product under development. Its characteristics and specifications are subject to change without notice.
Features
– 650V enhancement mode power switch
– Top cooled configuration
– Ultra low FOM Island Technology™ die
– Low inductance GaNPX™ package
– Reverse current capability
– Integral source sense
– Dual gate pads for optimal board layout
– Zero reverse recovery loss
– RoHS 6 compliant
Applications
– On-board battery chargers
– 400V DC-DC conversion
– Inverters, UPS, and VFD motor drive
– AC-DC power supplies (PFC & primary)
– VHF small form factor power adapters
– High frequency, high efficiency power
conversion
Absolute Maximum Ratings (Tcase = 25˚C except as noted)
Parameters
Symbol
Value
Units
Operating Junction Temperature
TJ
-55 to +150
°C
Storage Temperature Range
TS
-55 to +150
°C
Drain-to-Source Voltage
VDS
650
V
Gate-to-Source Voltage
VGS
±10
V
Continuous Drain Current (Tcase=25°C) (Note 1)
IDS(cont)25
60
A
Continuous Drain Current (Tcase=100°C)
IDS(cont)100
47
A
Pulsed Drain Current (Tcase=25°C) (Note 2)
ID‚pulse
120
A
(1) Saturation imposes current limit
(2) Pulse width is limited by TJ(max)
Thermal Characteristics (Typical values unless otherwise noted)
Parameters
Symbol
Value
Units
Thermal Resistance (junction to case)
RΘJC
0.25
°C /W
Maximum Soldering Temperature (MSL3 rated)
TSOLD
260
°C
Ordering Information
Part number
Package type
Ordering code
Packing method
GS66516T
GaNPX top-cooled
GS66516T-TR
Tape-and-reel
GS66516T
GaNPX top-cooled
GS66516T-MR
Mini-reel
top view
D
S
G
TP
TP = thermal pad - internally connected to
the source (S) and to the substrate.
G
GS66516T
Top cooled 650V enhancement mode GaN transistor
PRELIMINARY DATASHEET
Preliminary – Rev 150406
© 2009-2015 GaN Systems Inc.
2
This information pertains to a product under development. Its characteristics and specifications are subject to change without notice.
Electrical Characteristics (Typical values at TCASE= 25°C unless otherwise noted)
Parameters
Symbol
Value
Units
Conditions
Drain-to-Source Breakdown Voltage (Min.)
BVDSS
650
V
VGS =0V
Drain-to-Source On Resistance (TJ =25°C)
RDS(ON)
27
mΩ
VGS =7V, TJ=25°C
Drain-to-Source On Resistance (TJ=150°C)
70
mΩ
VGS =7V, TJ=150°C
Gate Threshold Voltage
VGS(th)
1.6
V
VDS =VGS
Drain to Source Leakage Current (TJ=25°C)
IDSS
4.0
µA
VDS=650V
VGS =0V, TJ=25°C
Drain to Source Leakage Current (TJ=150°C)
800
µA
VDS=650V
VGS =0 V, TJ=150°C
Gate to Source Current
IGS
80
µA
VGS=7V, VDS=0V
Gate Resistance
RG
1.5
Ω
f=1MHz, open drain
Gate Plateau Voltage
Vplat
3.0
V
VDS=400V
Source-Drain Reverse Voltage
VSD
2.8
V
VGS=0V, TJ =25°C
Input Capacitance
CISS
400
pF
VDS=400V
VGS=0V
f=1MHz
Output Capacitance
COSS
134
Reverse Transfer Capacitance
CRSS
4.0
Effective Output Capacitance, Energy Related
Co(er)
176
pF
VGS =0V
VDS=0 to 400V
Effective Output Capacitance, Time Related
Co(tr)
286
pF
ID =constant
VGS =0V
VDS=0 to 400V
Total Gate Charge
QG(TOT)
13.0
nC
VGS=0 to 7V
VDS=400V
Gate-to-Source Charge
QGS
2.8
nC
Gate-to-Drain Charge
QGD
5.6
nC
Reverse Recovery Charge
QRR
0
nC
Output Charge
QOSS
114
nC
GS66516T
Top cooled 650V enhancement mode GaN transistor
PRELIMINARY DATASHEET
Preliminary – Rev 150406
© 2009-2015 GaN Systems Inc.
3
This information pertains to a product under development. Its characteristics and specifications are subject to change without notice.
Package Dimensions
Recommended Minimum Footprint
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