DS92LV010A DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver Literature Number: SNLS007D DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver General Description Features The DS92LV010A is one in a series of transceivers designed specifically for the high speed, low power proprietary bus backplane interfaces. The device operates from a single 3.3V or 5.0V power supply and includes one differential line driver and one receiver. To minimize bus loading the driver outputs and receiver inputs are internally connected. The logic interface provides maximum flexibility as 4 separate lines are provided (DIN, DE, RE, and ROUT). The device also features flow through which allows easy PCB routing for short stubs between the bus pins and the connector. The driver has 10 mA drive capability, allowing it to drive heavily loaded backplanes, with impedance as low as 27 Ohms. The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high speed operation, while consuming minimal power with reduced EMI. In addition the differential signaling provides common mode noise rejection of 1V. The receiver threshold is 100mV over a 1V common mode range and translates the low voltage differential levels to standard (CMOS/TTL) levels. Bus LVDS Signaling (BLVDS) Designed for Double Termination Applications Balanced Output Impedance Lite Bus Loading 5pF typical Glitch free power up/down (Driver disabled) 3.3V or 5.0V Operation 1V Common Mode Range 100mV Receiver Sensitivity High Signaling Rate Capability (above 100 Mbps) Low Power CMOS design Product offered in 8 lead SOIC package Industrial Temperature Range Operation Connection Diagram 10005201 Order Number DS92LV010ATM See NS Package Number M08A Block Diagram 10005202 TRI-STATE(R) is a registered trademark of National Semiconductor Corporation. (c) 2007 National Semiconductor Corporation 100052 www.national.com DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver November 28, 2007 DS92LV010A Derate SOIC Package Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 4 sec.) Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) Enable Input Voltage (DE, RE) Driver Input Voltage (DIN) Receiver Output Voltage (ROUT) Bus Pin Voltage (DO/RI) Driver Short Circuit Current 6.0V -0.3V to (VCC + 0.3V) 8.2 mW/C +150C -65C to +150C 260C Recommended Operating Conditions -0.3V to (VCC + 0.3V) -0.3V to (VCC + 0.3V) -0.3V to + 3.9V Continuous >2.0 kV ESD (HBM 1.5 k, 100 pF) Maximum Package Power Dissipation at 25C SOIC 1025 mW Supply Voltage (VCC), or Supply Voltage (VCC) Receiver Input Voltage Operating Free Air Temperature Min 3.0 4.5 0.0 -40 Max Units 3.6 V 5.5 V 2.9 V +85 C 3.3V DC Electrical Characteristics (Notes 2, 3) TA = -40C to +85C unless otherwise noted, VCC = 3.3V 0.3V Symbol Parameter Conditions RL = 27, Figure 1 VOD Output Differential Voltage VOD VOD Magnitude Change VOS Offset Voltage VOS Offset Magnitude Change IOSD Output Short Circuit Current VO = 0V, DE = VCC VOH Voltage Output High VID = +100 mV Pin Min Typ Max Units DO+/RI+, DO-/RI- 140 250 360 mV 3 30 mV 1.25 1.65 V 5 50 mV -12 -20 mA 1 2.8 3 V Inputs Open I OH = -400 A 2.8 3 V Inputs Shorted 2.8 3 V Inputs Terminated, RL = 27 2.8 3 V 0.1 0.4 V -5 -35 -85 mA +100 mV VOL Voltage Output Low IOL = 2.0 mA, VID = -100 mV IOS Output Short Circuit Current VOUT = 0V, VID = +100 mV VTH Input Threshold High DE = 0V VTL Input Threshold Low IIN Input Current R OUT DO+/RI+, DO-/RI- -100 mV DE = 0V, VIN = +2.4V, or 0V -20 1 +20 A VCC = 0V, VIN = +2.4V, or 0V -20 1 +20 A 2.0 VCC V GND 0.8 V VIH Minimum Input High Voltage VIL Maximum Input Low Voltage DIN, DE, RE IIH Input High Current VIN = VCC or 2.4V 1 10 A IIL Input Low Current VIN = GND or 0.4V 1 10 A VCL Input Diode Clamp Voltage ICLAMP = -18 mA ICCD Power Supply Current DE = RE = VCC , RL = 27 20 mA -1.5 V CC -0.8 13 V ICCR DE = RE = 0V 5 8 mA ICCZ DE = 0V, RE = VCC 3 7.5 mA ICC DE = VCC, RE = 0V, RL = 27 16 22 mA Coutput Capacitance @ BUS Pins www.national.com DO+/RI+, DO-/RI- 2 5 pF (Notes 2, 3) TA = -40C to +85C unless otherwise noted, VCC = 5.0V 0.5V Symbol Parameter Conditions RL = 27, Figure 1 VOD Output Differential Voltage VOD VOD Magnitude Change VOS Offset Voltage VOS Offset Magnitude Change IOSD Output Short Circuit Current VO = 0V, DE = VCC VOH Voltage Output High VID = +100 mV Pin Min Typ Max Units DO+/RI+, DO-/RI- 145 270 390 mV 3 30 mV 1.35 1.65 V 5 50 mV -12 -20 mA 1 4.3 5.0 V Inputs Open IOH = -400 A 4.3 5.0 V Inputs Shorted 4.3 5.0 V Inputs Terminated, RL = 27 4.3 5.0 VOL Voltage Output Low IOL = 2.0 mA, VID = -100 mV IOS Output Short Circuit Current VOUT = 0V, VID = +100 mV VTH Input Threshold High DE = 0V VTL Input Threshold Low IIN Input Current VIH Minimum Input High Voltage VIL Maximum Input Low Voltage IIH Input High Current VIN = VCC or 2.4V IIL ROUT -35 DO+/RI+, DO-/RI- VCC = 0V, VIN = +2.4V, or 0V Input Low Current VIN = GND or 0.4V VCL Input Diode Clamp Voltage ICLAMP = -18 mA ICCD Power Supply Current DE = RE = VCC, RL = 27 0.4 V -90 -130 mA +100 mV -100 DE = 0V, VIN = +2.4V, or 0V DIN, DE, RE V 0.1 mV -20 1 -20 1 2.0 GND -1.5 V CC +20 A +20 A VCC V 0.8 V 1 10 A 1 10 A -0.8 V 17 25 mA ICCR DE = RE = 0V 6 10 mA ICCZ DE = 0V, RE = VCC 3 8 mA 20 25 mA DE = VCC, RE = 0V, RL = 27 ICC Coutput Capacitance @ BUS Pins DO+/RI+, DO-/RI- 5 pF Note 1: "Absolute Maximum Ratings" are these beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground except VOD, VID, VTH and VTL unless otherwise specified. Note 3: All typicals are given for VCC = +3.3V or 5.0 V and TA = +25C, unless otherwise stated. Note 4: ESD Rating: HBM (1.5 k, 100 pF) > 2.0 kV EAT (0, 200 pF) > 300V. Note 5: CL includes probe and fixture capacitance. Note 6: Generator waveforms for all tests unless otherwise specified: f = 1MHz, ZO = 50, tr, tf 6.0ns (0%-100%) on control pins and 1.0ns for RI inputs. Note 7: The DS92LV010A is a current mode device and only function with datasheet specification when a resistive load is applied between the driver outputs. Note 8: For receiver TRI-STATE(R) delays, the switch is set to VCC for tPZL, and tPLZ and to GND for tPZH, and tPHZ. 3.3V AC Electrical Characteristics (Note 6) TA = -40C to +85C, VCC = 3.3V 0.3V Symbol Parameter Conditions Min Typ Max Units 1.0 3.0 5.0 ns 1.0 2.8 5.0 ns DIFFERENTIAL DRIVER TIMING REQUIREMENTS RL = 27, Figures 2, 3 CL = 10 pF tPHLD Differential Prop. Delay High to Low tPLHD Differential Prop. Delay Low to High tSKD Differential SKEW |t PHLD - tPLHD| 0.2 1.0 ns tTLH Transition Time Low to High 0.3 2.0 ns tTHL Transition Time High to Low 0.3 2.0 ns 3 www.national.com DS92LV010A 5V DC Electrical Characteristics DS92LV010A Symbol Parameter Conditions RL = 27, Figures 4, 5 CL = 10 pF Min Typ Max Units 0.5 0.5 4.5 9.0 ns 5.0 10.0 ns tPHZ Disable Time High to Z tPLZ Disable Time Low to Z tPZH Enable Time Z to High 2.0 5.0 7.0 ns tPZL Enable Time Z to Low 1.0 4.5 9.0 ns 2.5 5.0 12.0 ns 2.5 5.5 10.0 ns DIFFERENTIAL RECEIVER TIMING REQUIREMENTS tPHLD Differential Prop. Delay High to Low tPLHD Differential Prop. Delay Low to High Figures 6, 7 CL = 10 pF tSKD Differential SKEW |t PHLD - tPLHD| 0.5 2.0 ns tr Rise Time 1.5 4.0 ns tf Fall Time tPHZ Disable Time High to Z tPLZ Disable Time Low to Z tPZH Enable Time Z to High tPZL Enable Time Z to Low RL = 500, Figures 8, 9 CL = 10 pF (Note 8) 5V AC Electrical Characteristics 1.5 4.0 ns 2.0 4.0 6.0 ns 2.0 5.0 7.0 ns 2.0 7.0 13.0 ns 2.0 6.0 10.0 ns Min Typ Max Units 0.5 2.7 4.5 ns 0.5 (Note 6) TA = -40C to +85C, VCC = 5.0V 0.5V Symbol Parameter Conditions DIFFERENTIAL DRIVER TIMING REQUIREMENTS RL = 27, Figures 2, 3 CL = 10 pF tPHLD Differential Prop. Delay High to Low tPLHD Differential Prop. Delay Low to High 2.5 4.5 ns tSKD Differential SKEW |t PHLD - tPLHD| 0.2 1.0 ns tTLH Transition Time Low to High 0.3 2.0 ns tTHL Transition Time High to Low 0.3 2.0 ns tPHZ Disable Time High to Z tPLZ Disable Time Low to Z tPZH tPZL RL = 27, Figures 4, 5 CL = 10 pF 0.5 3.0 7.0 ns 0.5 5.0 10.0 ns Enable Time Z to High 2.0 4.0 7.0 ns Enable Time Z to Low 1.0 4.0 9.0 ns 2.5 5.0 12.0 ns 2.5 DIFFERENTIAL RECEIVER TIMING REQUIREMENTS tPHLD Differential Prop. Delay High to Low tPLHD Differential Prop. Delay Low to High 4.6 10.0 ns tSKD Differential SKEW |t PHLD - tPLHD| 0.4 2.0 ns tr Rise Time 1.2 2.5 ns tf Fall Time 1.2 2.5 ns tPHZ Disable Time High to Z 2.0 4.0 6.0 ns tPLZ Disable Time Low to Z 2.0 4.0 6.0 ns tPZH Enable Time Z to High 2.0 5.0 9.0 ns tPZL Enable Time Z to Low 2.0 5.0 7.0 ns www.national.com Figures 6, 7 CL = 10 pF RL = 500, Figures 8, 9 CL = 10 pF (Note 8) 4 DS92LV010A Test Circuits and Timing Waveforms 10005203 FIGURE 1. Differential Driver DC Test Circuit 10005204 FIGURE 2. Differential Driver Propagation Delay and Transition Time Test Circuit 10005205 FIGURE 3. Differential Driver Propagation Delay and Transition Time Waveforms 5 www.national.com DS92LV010A 10005206 FIGURE 4. Driver TRI-STATE Delay Test Circuit 10005207 FIGURE 5. Driver TRI-STATE Delay Waveforms 10005208 FIGURE 6. Receiver Propagation Delay and Transition Time Test Circuit 10005209 FIGURE 7. Receiver Propagation Delay and Transition Time Waveforms www.national.com 6 DS92LV010A 10005210 FIGURE 8. Receiver TRI-STATE Delay Test Circuit 10005211 FIGURE 9. Receiver TRI-STATE Delay Waveforms TRI-STATE Delay Waveforms Typical Bus Application Configurations 10005212 Bi-Directional Half-Duplex Point-to-Point Applications 10005213 Multi-Point Bus Applications 7 www.national.com DS92LV010A TABLE 2. Transmitter Mode Application Information INPUTS There are a few common practices which should be implied when designing PCB for BLVDS signaling. Recommended practices are: * Use at least 4 layer PCB board (BLVDS signals, ground, power and TTL signals). * Keep drivers and receivers as close to the (BLVDS port side) connector as possible. * Bypass each BLVDS device and also use distributed bulk capacitance. Surface mount capacitors placed close to power and ground pins work best. Two or three multi-layer ceramic (MLC) surface mount capacitors (0.1 F, and 0.01 F in parallel should be used between each VCC and ground. The capacitors should be as close as possible to the VCC pin. * Use the termination resistor which best matches the differential impedance of your transmission line. * Leave unused LVDS receiver inputs open (floating) DE RE H DRIVER MODE H RECEIVER MODE L L TRI-STATE MODE L H LOOP BACK MODE H L DE DI DO+ DO- H L L H H H H L H 2 > & > 0.8 X X L X Z Z L = Low state H = High state TABLE 3. Receiver Mode INPUTS TABLE 1. Functional Table MODE SELECTED OUTPUTS OUTPUT RE (RI+)-(RI-) L L (< -100 mV) L L H (> +100 mV) H L 100 mV > & > -100 mV X H X Z X = High or Low logic state Z = High impedance state L = Low state H = High state TABLE 4. Device Pin Descriptions Pin Name Pin # Input/Output DIN 2 I DO/RI 6, 7 I/O LVDS Driver Outputs/LVDS Receiver Inputs ROUT 3 O TTL Receiver Output RE 5 I Receiver Enable TTL Input (Active Low) Driver Enable TTL Input (Active High) www.national.com Description TTL Driver Input DE 1 I GND 4 NA Ground VCC 8 NA Power Supply 8 DS92LV010A Physical Dimensions inches (millimeters) unless otherwise noted Order Number DS92LV010ATM See NS Package Number M08A 9 www.national.com DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.national.com/amplifiers WEBENCH www.national.com/webench Audio www.national.com/audio Analog University www.national.com/AU Clock Conditioners www.national.com/timing App Notes www.national.com/appnotes Data Converters www.national.com/adc Distributors www.national.com/contacts Displays www.national.com/displays Green Compliance www.national.com/quality/green Ethernet www.national.com/ethernet Packaging www.national.com/packaging Interface www.national.com/interface Quality and Reliability www.national.com/quality LVDS www.national.com/lvds Reference Designs www.national.com/refdesigns Power Management www.national.com/power Feedback www.national.com/feedback Switching Regulators www.national.com/switchers LDOs www.national.com/ldo LED Lighting www.national.com/led PowerWise www.national.com/powerwise Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors Wireless (PLL/VCO) www.national.com/wireless THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION ("NATIONAL") PRODUCTS. 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