© Semiconductor Components Industries, LLC, 2003
June, 2020 − Rev. 4
1Publication Order Number:
FDG6332C/D
MOSFET– N & P-Channel,
POWERTRENCH)
20 V
FDG6332C
General Description
T h e N & P −Channel MOSFETs are produced using
ON Semiconductor’s advanced POWERTRENCH process that has
been especially tailored to minimize on−state resistance and yet
maintain superior switching performance.
These devices have been designed to offer exceptional power
dissipation in a very small footprint for applications where the bigger
more expensive TSSOP−8 and SSOP−6 packages are impractical.
Features
•Q1 0.7 A, 20 V
♦RDS(ON) =300 mW @ VGS = 4.5 V
♦RDS(ON) = 400 mW @ VGS = 2.5 V
•Q2 −0.6 A, −20 V
♦RDS(ON) = 420 mW @ VGS = −4.5 V
♦RDS(ON) = 630 mW @ VGS = −2.5 V
•Low Gate Charge
•High Performance Trench Technology for Extremely Low RDS(ON)
•SC70−6 Package: Small Footprint (51% Smaller than SSOT−6); Low
Profile (1 mm Thick)
•These Devices are Pb−Free and are RoHS Compliant
Applications
•DC/DC Converter
•Load Switch
•LCD Display Inverter
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Symbol Parameter Q1 Q2 Units
VDSS Drain−Source Voltage 20 −20 V
VGSS Gate−Source Voltage ±12 ±12 V
IDDrain Current Continuous
(Note 1)
0.7 −0.6 A
Pulsed 2.1 −2
PDPower Dissipation for Single
Operation (Note 1)
0.3 W
TJ, TSTG Operating and Storage Junction
Temperature Range
−55 to 150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
SC−88/SC70−6/SOT−363
CASE 419B−02
www.onsemi.com
S
D
See detailed ordering and shipping information on page 2 of
this data sheet.
ORDERING INFORMATION
32 = Specific Device Code
M = Assembly Operation Month
MARKING DIAGRAM
G
DGS
32M
PIN CONNECTIONS
Pin 1
Complementary
6
5
4
2
1
3
FDG6332C
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2
THERMAL CHARACTERISTICS
Symbol Parameter Ratings Unit
RqJA Thermal Resistance, Junction−to−Ambient (Note 1) 415 _C/W
1. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. RqJC is guaranteed by design while RqCA is determined by the user’s board design. RqJA = 415°C/W on
minimum pad mounting on FR−4 board in still air.
ORDERING INFORMATION
Device Marking Device Reel Size Tape Width Shipping
†
32 FDG6332C 7” 8 mm 3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol Parameter Test Conditions Min Typ Max Unit
OFF CHARACTERISTICS
BVDSS Drain−Source Breakdown Voltage Q1 VGS =0V, I
D= 250 mA20 − − V
Q2 VGS =0V, I
D=−250 mA−20 − −
DBVDSS / DTJBreakdown Voltage Temperature
Coefficient
Q1 ID= 250 mA, Referenced to 25_C−14 −mV/_C
Q2 ID=−250 mA, Referenced to 25_C− −14 −
IDSS Zero Gate Voltage Drain Current Q1 VDS = 16V, VGS =0V − − 1mA
Q2 VDS =−16 V, VGS =0V − − −1
IGSSF / IGSSR Gate−Body Leakage, Forward VDS =±12 V, VGS =0V − − ±100 nA
IGSSF / IGSSR Gate−Body Leakage, Reverse VGS =±12 V, VDS =0V − − ±100 nA
ON CHARACTERISTICS (Note 2)
VGS(th) Gate Threshold Voltage Q1 VDS =V
GS, ID= 250 mA0.6 1.1 1.5 V
Q2 VDS =V
GS, ID=−250 mA−0.6 −1.2 −1.5
DVGS(th) / DTJGate Threshold Voltage
Temperature Coefficient
Q1 ID= 250 mA, Referenced to 25_C− −2.8 −mV/_C
Q2 ID=−250 mA, Referenced to 25_C−3−
RDS(on) Static Drain−Source
On−Resistance
Q1 VGS = 4.5 V, ID= 0.7 A −180 300 mW
VGS = 2.5 V, ID= 0.6 A −293 400
VGS = 4.5 V, ID= 0.7 A, TJ = 125_C−247 442
Q2 VGS =−4.5 V, ID=−0.6 A −300 420
VGS =−2.5 V, ID=−0.5 A −470 630
VGS =−4.5 V, ID=−0.6 A,
TJ = 125_C
−400 700
gFS Forward Transconductance Q1 VDS =5V, I
D= 0.7 A −2.8 −S
Q2 VDS =−5V, I
D=−0.6 A −1.8 −
ID(on) On−State Drain Current Q1 VGS = 4.5 V, VDS =5V 1− − A
Q2 VGS =−4.5 V, VDS =−5V −2− −
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance Q1 VDS =10V, V
GS = 0 V, f = 1.0 MHz −113 −pF
Q2 VDS =−10 V, VGS = 0 V, f = 1.0 MHz −114 −
Coss Output Capacitance Q1 VDS =10V, V
GS = 0 V, f = 1.0 MHz −34 −pF
Q2 VDS =−10 V, VGS = 0 V, f = 1.0 MHz −24 −
FDG6332C
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3
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (continued)
Symbol UnitMaxTypMinTest ConditionsParameter
DYNAMIC CHARACTERISTICS
Crss Reverse Transfer Capacitance Q1 VDS =10V, V
GS = 0 V, f = 1.0 MHz −16 −pF
Q2 VDS =−10 V, VGS = 0 V, f = 1.0 MHz −9−
SWITCHING CHARACTERISTICS (Note 2)
td(on) Turn-On Delay Time Q1 For Q1
VDS =10V, I
D=1A,
VGS = 4.5 V, RGEN =6W
For Q2
VDS =−10 V, ID=−1A,
VGS =−4.5 V, RGEN =6W
−5 10 ns
Q2 −5.5 11
trTurn-On Rise Time Q1 −7 15 ns
Q2 −14 25
td(off) Turn-Off Delay Time Q1 −9 18 ns
Q2 −6 12
tfTurn-Off Fall Time Q1 −1.5 3 ns
Q2 −1.7 3.4
QgTotal Gate Charge Q1 For Q1
VDS =10V, I
D= 0.7 A,
VGS = 4.5 V, RGEN =6W
For Q2
VDS =−10 V, ID=−0.6 A,
VGS =−4.5 V, RGEN =6W
−1.1 1.5 nC
Q2 −1.4 2
Qgs Gate−Source Charge Q1 −0.24 −nC
Q2 −0.3 −
Qgd Gate−Drain Charge Q1 −0.3 −nC
Q2 −0.4 −
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
ISMaximum Continuous Drain−Source
Diode Forward Current
Q1 − − 0.25 A
Q2 − − −0.25
VSD Drain−Source Diode Forward
Voltage
Q1 VGS =0V, I
S= 0.25 A (Note 2) −0.74 1.2 V
Q2 VGS =0V, I
S=−0.25 A (Note 2) − −0.77 −1.2
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%
FDG6332C
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4
TYPICAL PERFORMANCE CHARACTERISTICS: N−CHANNEL
0
1
2
3
4
0
VDS
ID, DRAIN CURRENT (A)
, DRAIN−SOURCE VOLTAGE (V)
2.0 V
3.0 V
VGS = 4.5 V
2.5 V
3.5 V
0.8
1
1.2
1.4
1.6
1.8
ID, DRAIN CURRENT (A)
DS(ON) , NORMALIZED
DRAIN−SOURCE ON−RESISTANCE
R
VGS = 2.5 V
3.0 V
4.0 V
3.5 V
4.5 V
0.6
0.8
1
1.2
1.4
1.6
−50 −25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE ( C)
°
DS(ON), NORMALIZED
DRAIN−SOURCE ON−RESISTANCE
R
ID = 0.7 A
VGS = 4.5 V
0
0.2
0.4
0.6
0.8
VGS
RDS(ON), ON−RESISTANCE (OHM)
, GATE TO SOURCE VOLTAGE (V)
ID= 0.4 A
TA = 125 C
TA = 25 C
0
0.5
1
1.5
2
2.5
0.5 1 1.5 2 2.5 3
VGS
ID, DRAIN CURRENT (A)
, GATE TO SOURCE VOLTAGE (V)
TA = −55 C25 C
125 C
VDS = 5 V
0.0001
0.001
0.01
0.1
1
10
0 0.2 0.4 0.6 0.8 1 1.2
VSD
IS, REVERSE DRAIN CURRENT (A)
, BODY DIODE FORWARD VOLTAGE (V)
TA= 125 C
25 C
−55 C
VGS
= 0 V
Figure 1. On−Region Characteristics Figure 2. On−Resistance Variation with
Drain Current and Gate Voltage
Figure 3. On−Resistance Variation with
Temperature
Figure 4. On−Resistance Variation with
Gate−to−Source Voltage
Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage
Variation with Source Current and Temperature
1234 01234
1234 5
°
°
°
°
°
°°
°
FDG6332C
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5
TYPICAL PERFORMANCE CHARACTERISTICS: N−CHANNEL (continued)
0
1
2
3
4
5
00.4
Qg
V
, GATE CHARGE (nC)
, GATE−SOURCE VOLTAGE (V)
GS
ID = 0.7 A VDS = 5 V
15 V
10 V
0
50
100
150
200
0 5 10 15 20
VDS
CAPACITANCE (pF)
, DRAIN TO SOURCE VOLTAGE (V)
CISS
CRSS
COSS
f = 1MHz
VGS = 0 V
0.01
0.1
1
10
0.1 1 10 100
VDS
ID, DRAIN CURRENT (A)
, DRAIN−SOURCE VOLTAGE (V)
DC
1 s
100 ms
100 ms
RDS(ON) LIMIT
VGS
= 4.5 V
SINGLE PULSE
RqJA = 415 C/W
TA = 25 C
10 ms
1 ms
0
2
4
6
8
10
0.001 0.01 0.1 1 10 100
t1
P(pk), PEAK TRANSIENT POWER (W)
, TIME (sec)
SINGLE PULSE
RqJA = 415°C/W
TA = 25°C
Figure 7. Gate Charge Characteristics Figure 8. Capacitance Characteristics
Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power
Dissipation
°
°
0.8 1.2 1.6
FDG6332C
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6
TYPICAL PERFORMANCE CHARACTERISTICS: P−CHANNEL
0
0.4
0.8
1.2
1.6
2
−VDS
−I
, DRAIN−SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
D
−3.5 V
−2.5 V
−2.0 V
VGS
= −4.5 V −3.0 V
0.8
1
1.2
1.4
1.6
1.8
0 0.5 1 1.5 2
−ID, DRAIN CURRENT (A)
DS(ON), NORMALIZED
DRAIN−SOURCE ON−RESISTANCE
R
VGS
= −2.5 V
−3.0 V
−3.5 V
−4.5 V
−4.0 V
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
−50 −25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
DS(ON), NORMALIZED
DRAIN−SOURCE ON−RESISTANCE
R
ID = −0.6A
VGS
= −4.5V
0.2
0.4
0.6
0.8
1
1.2
−VGS
RDS(ON) , ON−RESISTANCE (OHM)
, GATE TO SOURCE VOLTAGE (V)
ID = −0.3 A
TA = 125°C
TA = 25 °C
0
0.5
1
1.5
2
0.5 1 1.5 2 2.5 3
−VGS
−I
, GATE TO SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
D
TA = −55 C25 C
125 C
VDS = −5 V
0.0001
0.001
0.01
0.1
1
10
0 0.2 0.4 0.6 0.8 1 1.2
−VSD
−I
, BODY DIODE FORWARD VOLTAGE (V)
, REVERSE DRAIN CURRENT (A)
S
TA= 125 C
25 C
−55 C
VGS
= 0V
Figure 11. On−Region Characteristics Figure 12. On−Resistance Variation
with Drain Current and Gate Voltage
Figure 13. On−Resistance Variation with
Temperature
Figure 14. On−Resistance Variation
with Gate−to−Source Voltage
Figure 15. Transfer Characteristics Figure 16. Body Diode Forward Voltage
Variation with Source Current and Temperature
01 234
1234 5
°
°
°
°°
°
FDG6332C
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7
TYPICAL PERFORMANCE CHARACTERISTICS: P−CHANNEL (continued)
0
1
2
3
4
5
0 0.3
Qg
−V
, GATE CHARGE (nC)
, GATE−SOURCE VOLTAGE (V)
GS
ID = −0.6 A VDS = −5 V
−15 V
−10 V
0
40
80
120
160
0 5 10 15 20
−VDS
CAPACITANCE (pF)
, DRAIN TO SOURCE VOLTAGE (V)
CISS
CRSS
COSS
f = 1 MHz
VGS
= 0 V
0.01
0.1
1
10
0.1 1 10 100
−VDS
−I
, DRAIN−SOURCE VOLTAGE (V)
, DRAIN CURRENT (A)
D
DC
1 s
100 ms
10 ms
1 ms
100 ms
RDS(ON) LIMIT
VGS = −4.5 V
SINGLE PULSE
RqJA = 415 C/W
TA = 25 C
0
2
4
6
8
10
0.001 0.01 0.1 1 10 100
POWER (W)
SINGLE PULSE TIME (sec)
SINGLE PULSE
RqJA = 415 C/W
TA = 25 C
Figure 17. Gate Charge Characteristics Figure 18. Capacitance Characteristics
Figure 19. Maximum Safe Operating Area Figure 20. Single Pulse Maximum Power
Dissipation
°
°
0.6 0.9 1.2 1.5 1.8
°
°
0.001
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10
t1, TIME (sec)
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
100
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Thermal characterization performed using the conditions described in Note 1.
Transient thermal response will change depending on the circuit board design.
Figure 21. Transient Thermal Response Curve
P(pk)
t1 t 2
RqJA (t) = r(t) * RqJA
RqJA = 415°C/W
TJ − TA = P * RqJA (t)
Duty Cycle, D = t1 / t2
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
SCALE 2:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
Cddd M
123
A1
A
c
654
E
b
6X
XXXMG
G
XXX = Specific Device Code
M = Date Code*
G= Pb−Free Package
GENERIC
MARKING DIAGRAM*
1
6
STYLES ON PAGE 2
1
DIM MIN NOM MAX
MILLIMETERS
A−−− −−− 1.10
A1 0.00 −−− 0.10
ddd
b0.15 0.20 0.25
C0.08 0.15 0.22
D1.80 2.00 2.20
−−− −−− 0.043
0.000 −−− 0.004
0.006 0.008 0.010
0.003 0.006 0.009
0.070 0.078 0.086
MIN NOM MAX
INCHES
0.10 0.004
E1 1.15 1.25 1.35
e0.65 BSC
L0.26 0.36 0.46
2.00 2.10 2.20
0.045 0.049 0.053
0.026 BSC
0.010 0.014 0.018
0.078 0.082 0.086
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.65
0.66
6X
DIMENSIONS: MILLIMETERS
0.30
PITCH
2.50
6X
RECOMMENDED
TOP VIEW
SIDE VIEW END VIEW
bbb H
B
SEATING
PLANE
DETAIL A E
A2 0.70 0.90 1.00 0.027 0.035 0.039
L2 0.15 BSC 0.006 BSC
aaa 0.15 0.006
bbb 0.30 0.012
ccc 0.10 0.004
A-B D
aaa C
2X 3 TIPS
D
E1
D
e
A
2X
aaa H D
2X
D
L
PLANE
DETAIL A
H
GAGE
L2
C
ccc C
A2
6X
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ASB42985B
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
SC−88/SC70−6/SOT−363
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 3:
CANCELLED
STYLE 2:
CANCELLED
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
6. ANODE
STYLE 5:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 6:
PIN 1. ANODE 2
2. N/C
3. CATHODE 1
4. ANODE 1
5. N/C
6. CATHODE 2
STYLE 7:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
4. SOURCE 1
5. DRAIN 1
6. GATE 2
STYLE 8:
CANCELLED
STYLE 11:
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
STYLE 9:
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
5. BASE 2
6. COLLECTOR 2
STYLE 10:
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
4. DRAIN 1
5. DRAIN 2
6. GATE 2
STYLE 12:
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
STYLE 13:
PIN 1. ANODE
2. N/C
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 14:
PIN 1. VREF
2. GND
3. GND
4. IOUT
5. VEN
6. VCC
STYLE 15:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
STYLE 17:
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
5. EMITTER 2
6. COLLECTOR 1
STYLE 16:
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
5. EMITTER 1
6. COLLECTOR 1
STYLE 18:
PIN 1. VIN1
2. VCC
3. VOUT2
4. VIN2
5. GND
6. VOUT1
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
STYLE 20:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 22:
PIN 1. D1 (i)
2. GND
3. D2 (i)
4. D2 (c)
5. VBUS
6. D1 (c)
STYLE 21:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. N/C
6. CATHODE 1
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
4. N/C
5. CH2
6. N/C
STYLE 24:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 25:
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
5. EMITTER
6. COLLECTOR 1
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
STYLE 29:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 30:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ASB42985B
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
SC−88/SC70−6/SOT−363
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
www.onsemi.com
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