N24RF16E
www.onsemi.com
11
READ OPERATIONS
Immediate Read
To read data from memory, the Master creates a START
condition on the bus and then broadcasts a Slave address
with the R/W bit set to ‘1’. The Slave responds with ACK
and starts shifting out data residing at the current address.
After receiving the data, the Master responds with NoACK
and terminates the session by creating a STOP condition on
the bus (Figure 12). The Slave then returns to Standby mode.
Selective Read
To read data residing at a specific address, the selected
address must first be loaded into the internal address register.
This is done by starting a Byte Write sequence, whereby the
Master creates a START condition, then broadcasts a Slave
address with the R/W bit set to ‘0’ and then sends two
address bytes to the Slave. Rather than completing the Byte
Write sequence by sending data, the Master then creates a
START condition and broadcasts a Slave address with the
R/W bit set to ‘1’. The Slave responds with ACK after every
byte sent by the Master and then sends out data residing at
the selected address. After receiving the data, the Master
responds with NoACK and then terminates the session by
creating a STOP condition on the bus (Figure 13).
Sequential Read
If, after receiving data sent by the Slave, the Master
responds with ACK, then the Slave will continue
transmitting until the Master responds with NoACK
followed by STOP (Figure 14). During Sequential Read the
internal byte address is automatically incremented up to the
end of memory, where it then wraps around to the beginning
of memory.
I2C SECURITY
In the I2C mode it is possible to protect each memory
sector from user area against write operations. The sector
write access is controlled using the 16−bit I2C_Write_Lock
bit area and the 32−bit I2C password. There are two
commands to control the I2C password: I2C Present
Password and I2C Write Password.
I2C Present Password
The I2C Present Password command is used to modify the
write access rights of the sectors protected by the I2C
Write−Lock bits, including the password itself. N24RF16E
will allow this only if the correct password is presented, via
I2C bus. If the password is correct, the access rights remain
activated until a new I2C Present Password command is
received, or the device is powered off.
Following a Start condition, the master sends a write
instruction with the slave address with the Read/Write bit
equal to 0 and the A2 bit equal to 1 (system memory). The
device acknowledges this and expects two I2C password
address bytes, 09h and 00h. The device responds to each
address byte with an ACK. The device then expects the 4
password data bytes, the validation code, 09h, and a resend
of the 4 password data bytes. The most significant byte of the
password is sent first, followed by the least significant bytes.
The 32−bit password must be sent twice to prevent any
data corruption during the sequence. If the two 32−bit
passwords sent are not exactly the same, the command will
not be accepted.
When the bus master generates a Stop condition
immediately after the Ack bit, an internal delay equivalent
to the write cycle time is triggered. A Stop condition at any
other time does not trigger the internal delay. During that
delay, the N24RF16E compares the 32 received data bits
with the 32 bits of the stored I2C password.
If the values match, the write access rights to all protected
sectors are modified after the internal delay. If the values do
not match, the protected sectors remains protected.
During the internal delay, the SDA output is tri−stated and
the Slave does not acknowledge the Master.
I2C Write Password
The I2C Write Password command is used to overwrite the
32−bit I2C password block. This command is used in I2C
mode to update the I2C password value. It cannot be used to
modify any of the RF passwords. After the write cycle, the
new I2C password value is automatically activated. The I2C
password value can only be modified after issuing a valid
I2C Present Password command.
Following a Start condition, the master sends a write
instruction with the slave address with the Read/Write bit
equal to 0 and the A2 bit equal to 1 (system memory). The
device acknowledges this and expects two I2C password
address bytes, 09h and 00h. The device responds to each
address byte with an ACK. The device then expects the 4
password data bytes, the validation code, 07h, and a resend
of the 4 password data bytes. The most significant byte of the
password is sent first, followed by the least significant bytes.
N24RF16E is shipped with the default I2C password
00000000h. By default, the password is activated.
The 32−bit password must be sent twice to prevent any
data corruption during the sequence. If the two 32−bit
passwords sent are not exactly the same, the command will
not be accepted.
When the bus master generates a Stop condition
immediately after the Ack bit, the internal write cycle is
triggered. A Stop condition at any other time does not trigger
the internal write cycle.
During the internal write cycle, the SDA output is
tri−stated and the Slave does not acknowledge the Master.