MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT374/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
1JUNE 2002MILITARY AND COMMERCIAL TEMPERATURE RANGES
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2002 Integrated Device Technology, Inc. DSC-5423/2
FEATURES:
• IDT54FCT374 equal to FAST™ speed and drive
• IDT54/74FCT374A up to 30% faster than FAST
• IDT74FCT374C up to 50% faster than FAST
•IOL = 48mA (commercial) and 32mA (military)
• CMOS power levels (1mW typ. static)
• Edge-triggered master/slave, D-type flip-flops
• Buffered common clock and buffered common 3-state control
• MIlitary product compliant to MIL-STD-883, Class B
• Meets or exceeds JEDEC Standard 18 specifications
• Available in the following packages:
– Commercial: SOIC
– Military: CERDIP, LCC
FUNCTIONAL BLOCK DIAGRAM
IDT54/74FCT374/A/C
FAST CMOS OCTAL
D REGISTERS (3-STATE)
DESCRIPTION:
The FCT374 is an 8-bit register built using an advanced dual metal CMOS
technology. These registers consist of eight D-type flip-flops with a buffered
common clock and buffered 3-state output control. When the output enable
(OE) is low, the eight outputs are enabled. When the OE input is high, the
outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements of the D inputs
is transferred to the O outputs on the low-to-high transition of the clock input.
The FCT374 has non-inverting outputs with respect to the data at the D
inputs.
CP
O0O1O2O3O4O5O6O7
OE
D
Q
CP D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP CP CP CP CP CP CP
D0D1D2D3D4D5D6D7
MILITARY AND COMMERCIAL TEMPERATURE RANGES
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IDT54/74FCT374/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
PIN CONFIGURATION
CERDIP/ SOIC
TOP VIEW LCC
TOP VIEW
Symbol Rating Commercial Military Unit
VTERM(2) Terminal Voltage –0.5 to +7 –0.5 to +7 V
with Respect to GND
VTERM(3) Terminal Voltage –0.5 to VCC –0.5 to VCC V
with Respect to GND
TAOperating Temperature 0 to +70 –55 to +125 °C
TBIAS Temperature under BIAS –55 to +125 –65 to +135 °C
TSTG Storage Temperature –55 to +125 –65 to +150 °C
PTPower Dissipation 0.5 0.5 W
IOUT DC Output Current 120 120 mA
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Input and Vcc terminals only.
3. Output and I/O terminals only.
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 6 10 pF
COUT Output Capacitance VOUT = 0V 8 12 pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
1
23
4
5
7
9
6
810 11 12 13 14
15
16
17
18
1920
O6
D7
D6
O5
D5
OE
D
0
O
0
V
CC
O
7
O
3
GND
CP
O
4
D
4
INDEX
D1
O1
D3
O2
D2
2
3
1
16
15
14
11
19
18
20
17
13
12
5
6
7
4
8
9
10
D1
O0
D0
VCC
O1
D3
O2
D2
O3
GND
O7
O6
D7
D6
O5
O4
D5
D4
CP
OE
NOTE:
1 . H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
NC = No Change
↑ = LOW-to-HIGH transition
FUNCTION TABLE(1)
Inputs Outputs Internal
Function OE CP Dx Qx Qx
High-Z H L X Z NC
HHXZNC
Load L ↑LLH
Register L ↑HHL
H↑LZH
H↑HZL
Pin Names Description
Dx D flip-flop data inputs
CP Clock Pulse for the register. Enters data on LOW-to-
HIGH transition.
Ox 3-State Outputs (TRUE)
Ox 3-State Outputs (INVERTED)
OE Active LOW 3-State Output Enable Input
PIN DESCRIPTION
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT374/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
3
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V
VIL Input LOW Level Guaranteed Logic LOW Level — — 0 .8 V
IIH Input HIGH Current VI = VCC —— 5
VCC = Max. VI = 2.7V — — 5(4) µA
IIL Input LOW Current VI = 0.5V — — –5(4)
VI = GND — — –5
IOZH VO = VCC —— 10
Off State (High Impedance) VCC = Max. VO = 2.7V — — 10(4) µA
IOZL Output Current VO = 0.5V — — –10(4)
VO = GND — — –10
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
IOS Short Circuit Current VCC = Max., VO = GND(3) –60 –120 — mA
VOH Output HIGH Voltage VCC = 3V, VIN = VLC or VHC, IOH = –32µAVHC VCC —
VCC = Min IOH = –300µAVHC VCC —V
VIN = VIH or VIL IOH = –12mA MIL 2.4 4.3 —
IOH = –15mA COM'L 2.4 4.3 —
VOL Output LOW Voltage VCC = 3V, VIN = VLC or VHC, IOL = 300µA — GND VLC
VCC = Min IOL = 300µA — GND VLC(4) V
VIN = VIH or VIL IOL = 32mA MIL — 0.3 0.5
IOL = 48mA COM'L — 0.3 0.5
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC - 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ±5%, Military: TA = -55°C to +125°C, VCC = 5.0V ±10%
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not ttested.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
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IDT54/74FCT374/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for register devices (zero for non-register devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC - 0.2V
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
ICC Quiescent Power Supply Current VCC = Max. — 0.2 1.5 mA
VIN ≥ VHC; VIN ≤ VLC
∆ICC Quiescent Power Supply Current VCC = Max. — 0.5 2 mA
TTL Inputs HIGH VIN = 3.4V(3)
ICCD Dynamic Power Supply VCC = Max. VIN ≥ VHC — 0.15 0.25 mA/
Current(4) Outputs Open VIN ≤ VLC MHz
OE = GND
One Input Toggling
50% Duty Cycle
ICTotal Power Supply Current(6) VCC = Max. VIN ≥ VHC — 1.7 4 mA
Outputs Open VIN ≤ VLC
fCP = 10MHz (FCT)
50% Duty Cycle VIN = 3.4V — 2.2 6
OE = GND VIN = GND
fi = 5MHz
One Bit Toggling
VCC = Max. VIN ≥ VHC — 4 7.8(5)
Outputs Open VIN ≤ VLC
fCP = 10MHz (FCT)
50% Duty Cycle VIN = 3.4V — 6.2 16.8(5)
OE = GND VIN = GND
fi = 2.5MHz
Eight Bits Toggling
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT374/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
5
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
74FCT374A 74FCT374C
Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Unit
tPLH Propagation Delay CL = 50pF 2 6.5 2 5.2 ns
tPHL CP to Qx RL = 500Ω
tPZH Output Enable Time 1.5 6.5 1.5 5.5 ns
tPZL
tPHZ Output Disable Time 1.5 5.5 1.5 5 ns
tPLZ
tSU Set-up Time HIGH or LOW 2 — 2 — n s
Dx to CP
tHHold Time HIGH or LOW 1.5 — 1.5 — ns
Dx to CP
tWCP Pulse Width HIGH or LOW(3) 5—5—ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
54FCT374 54FCT374A
Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Unit
tPLH Propagation Delay CL = 50pF 2 11 2 7.2 ns
tPHL CP to Qx RL = 500Ω
tPZH Output Enable Time 1.5 14 1.5 7.5 ns
tPZL
tPHZ Output Disable Time 1.5 8 1.5 6.5 ns
tPLZ
tSU Set-up Time HIGH or LOW 2 — 2 — n s
Dx to CP
tHHold Time HIGH or LOW 1.5 — 1.5 — ns
Dx to CP
tWCP Pulse Width HIGH or LOW(3) 7—6—ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY
MILITARY AND COMMERCIAL TEMPERATURE RANGES
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IDT54/74FCT374/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
Pulse
Generator
RT
D.U.T
.
VCC
VIN
CL
VOUT
50pF 500Ω
500Ω
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONO U S CONT R OL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
tSU tH
tREM
tSU tH
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
tW
1.5V
1.5V
SAME PHASE
INPU T TRANSITION
3V
1.5V
0V
1.5V
VOH
tPLH
OUTPUT
OPPOSITE PHASE
INPU T TRANSITION
3V
1.5V
0V
tPLH tPHL
tPHL
VOL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
VOL
0.3V
0.3V
tPLZtPZL
tPZH tPHZ
3.5V
0V
1.5V
1.5V
ENABLE DISABLE
VOH
PRESET
CLEAR
CLOCK ENABLE
ETC.
Octal link
Octal l ink
Octal link
Octal l ink
Octal link
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuits for All Outputs
Enable and Disable Times
Set-Up, Hold, and Release Times
Pulse Width
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; ZO ≤ 50Ω; tF ≤ 2.5ns; tR ≤ 2.5ns.
Test Switch
Open Drain
Disable Low Closed
Enable Low
All Other Tests Open
SWITCH POSITION
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT374/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
7
ORDERING INFORMATION
CORPORATE HEADQUARTERS for SALES: for Tech Support:
2975 Stender Way 800-345-7015 or 408-727-6116 logichelp@idt.com
Santa Clara, CA 95054 fax: 408-492-8674 (408) 654-6459
www.idt.com
IDT XX
Temp. Range XXXX
Device Type XX
Package X
Process
SO Commercial Options
Small Outline IC
Fast CMOS Octal D Register (3-State)
54
74 – 55°C to +125°C
– 0°C to +70°C
D
L
Military Options
CERDIP
Leadless Chip Carrier
Blank
BCommercial
MIL-STD-883, Class B
FCT
374
374A
374C
