CLC1005, CLC1015, CLC2005 Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplifiers FE ATU R E S 260MHz bandwidth Fully specified at +2.7V and +5V supplies Output voltage range: 0.036V to 4.953V; V = +5; R = 2k S L Input voltage range: -0.3V to +3.8V; V = +5 S 145V/s slew rate 4.2mA supply current Power down to 127A 55mA linear output current 85mA short circuit current CLC2005 directly replaces AD8052/42/92 in single supply applications CLC1005 directly replaces AD8051/41/91 in single supply applications General Description The CLC1005 (single), CLC1015 (single with disable), and CLC2005 (dual) are low cost, voltage feedback amplifiers. These amplifiers are designed to operate on +2.7V to +5V, or 2.5V supplies. The input voltage range extends 300mV below the negative rail and 1.2V below the positive rail. The CLC1005, CLC1015, and CLC2005 offer superior dynamic performance with 260MHz small signal bandwidth and 145V/s slew rate. The amplifiers consume only 4.2mA of supply current per channel and the CLC1015 offers a disable supply current of only 127A. The combination of low power, high output current drive, and rail-to-rail performance make these amplifiers well suited for battery-powered communication/computing systems. The combination of low cost and high performance make the CLC1005, CLC1015, and CLC2005 suitable for high volume applications in both consumer and industrial applications such as interactive whiteboards, wireless phones, scanners, color copiers, and video transmission. A P P LICATION S A/D driver Active filters CCD imaging systems CD/DVD ROM Coaxial cable drivers High capacitive load driver Portable/battery-powered applications Twisted pair driver Telecom and optical terminals Video driver Interactive whiteboards Ordering Information - backpage 2nd & 3rd Harmonic Distortion; VS = +2.7V Output Swing -20 2.7 Vo = 1Vpp Rf = 1k Distortion (dBc) Output Voltage (0.5V/div) -30 -50 2nd RL = 150 -60 2nd RL = 2k -70 3rd RL = 2k -80 Vs = +2.7V RL = 2k G = -1 -90 0 0 5 10 15 20 Frequency (MHz) Time (0.5s/div) (c) 2007-2015 Exar Corporation 3rd RL = 150 -40 1 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Absolute Maximum Ratings Operating Conditions Stresses beyond the limits listed below may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Supply Voltage Range....................................................2.5 to 5.5V Operating Temperature Range..................................-40C to 85C Junction Temperature............................................................ 150C Storage Temperature Range....................................-65C to 150C Lead Temperature (Soldering, 10s).......................................260C VS.................................................................................... 0V to +6V VIN............................................................. -VS - 0.5V to +VS +0.5V Package Thermal Resistance JA (SOIC-8)......................................................................150C/W JA (MSOP-8)................................................................... 200C/W JA (TSOT23-5).................................................................215C/W JA (TSOT23-6).................................................................192C/W Package thermal resistance (JA), JEDEC standard, multi-layer test boards, still air. ESD Protection SOIC-8 (HBM)........................................................................2.5kV ESD Rating for HBM (Human Body Model) and CDM (Charged Device Model). (c) 2007-2015 Exar Corporation 2 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Electrical Characteristics at +2.7V TA = 25C, VS = +2.7V, Rf = 2k, RL = 2k to VS/2; G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response GBWP -3dB Gain Bandwidth Product 86 MHz UGBW Unity Gain Bandwidth(1) G = +1, VOUT = 0.05Vpp 215 MHz BWSS -3dB Bandwidth G = +2, VOUT = 0.2Vpp 85 MHz BWLS Large Signal Bandwidth G = +2, VOUT = 2Vpp 36 MHz tR, tF Rise and Fall Time (1) VOUT = 0.2V step; (10% to 90%) 3.7 ns tS Settling Time to 0.1% VOUT = 1V step 40 ns OS Overshoot VOUT = 0.2V step 9 % SR Slew Rate G = -1, 2.7V step 130 V/s Time Domain Distortion/Noise Response HD2 2nd Harmonic Distortion (1) 5MHz, VOUT = 1Vpp 79 dBc HD3 3rd Harmonic Distortion (1) 5MHz, VOUT = 1Vpp 82 dBc THD Total Harmonic Distortion 5MHz, VOUT = 1Vpp 77 dB en Input Voltage Noise >1MHz 16 nV/Hz in Input Current Noise >1MHz 1.3 pA/Hz XTALK Crosstalk CLC2005, 10MHz 65 dB (1) (1) DC Performance VIO Input Offset Voltage -1.6 mV dVIO Average Drift 10 V/C IB Input Bias Current 3 A dIB Average Drift 7 nA/C IOS Input Offset Current 0.1 A PSRR Power Supply Rejection Ratio 57 dB AOL Open Loop Gain 75 dB IS Supply Current 3.9 mA 150 ns DC 52 Disable Characteristics (CLC1015) TON Turn On Time TOFF Turn Off Time 25 ns OFFISO Off Isolation 5MHz, RL = 100 75 dB ISD Disable Supply Current DIS tied to GND 58 100 A Input Characteristics RIN Input Resistance 4.3 M CIN Input Capacitance 1.8 pF CMIR Common Mode Input Range -0.3 to 1.5 V CMRR Common Mode Rejection Ratio 87 dB DC, VCM = 0 to VS - 1.5V Output Characteristics RL = 10k to VS / 2 VOUT Output Swing RL = 2k to VS / 2 RL = 150 to VS / 2 IOUT Output Current ISC Short Circuit Current VS Power Supply Operating Range -40C to +85C VOUT = VS / 2 0.023 to 2.66 0.025 to 2.653 0.065 to 2.55 55 mA 50 mA V V V 85 2.5 2.7 mA 5.5 V Notes: 1. Rf = 1k was used for optimal performance. (For G = +1, Rf = 0) (c) 2007-2015 Exar Corporation 3 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Electrical Characteristics at +5V TA = 25C, VS = +5V, Rf = 2k, RL = 2k to VS/2; G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response GBWP -3dB Gain Bandwidth Product 90 MHz UGBW Unity Gain Bandwidth(1) G = +1, VOUT = 0.05Vpp 260 MHz BWSS -3dB Bandwidth G = +2, VOUT = 0.2Vpp 90 MHz BWLS Large Signal Bandwidth G = +2, VOUT = 2Vpp 40 MHz tR, tF Rise and Fall Time (1) VOUT = 0.2V step 3.6 ns tS Settling Time to 0.1% VOUT = 2V step 40 ns OS Overshoot VOUT = 0.2V step 7 % SR Slew Rate G = -1, 5V step 145 V/s Time Domain Distortion/Noise Response HD2 2nd Harmonic Distortion (1) 5MHz, VOUT = 2Vpp 71 dBc HD3 3rd Harmonic Distortion (1) 5MHz, VOUT = 2Vpp 78 dBc THD Total Harmonic Distortion 5MHz, VOUT = 2Vpp (1) 70 dB NTSC (3.85MHz), AC-Coupled, RL = 150 0.06 % NTSC (3.85MHz), DC-Coupled, RL = 150 0.08 % NTSC (3.85MHz), AC-Coupled, RL = 150 0.07 NTSC (3.85MHz), DC-Coupled, RL = 150 0.06 DG Differential Gain DP Differential Phase en Input Voltage Noise >1MHz 16 nV/Hz in Input Current Noise >1MHz 1.3 pA/Hz XTALK Crosstalk(1) CLC2005, 10MHz 62 dB DC Performance VIO Input Offset Voltage dVIO Average Drift IB Input Bias Current dIB Average Drift IOS Input Offset Current PSRR Power Supply Rejection Ratio AOL Open Loop Gain IS Supply Current -8 1.4 8 10 -8 3 -0.8 0.1 52 57 8 7 DC 68 A nA/C 0.8 A dB 78 4.2 mV V/C dB 5.2 mA Disable Characteristics (CLC1015) TON Turn On Time 150 TOFF Turn Off Time 25 ns ns OFFISO Off Isolation 5MHz, RL = 100 75 dB ISD Disable Supply Current DIS tied to GND 127 170 A Input Characteristics RIN Input Resistance 4.3 M CIN Input Capacitance 1.8 pF CMIR Common Mode Input Range -0.3 to 3.8 V CMRR Common Mode Rejection Ratio 87 dB DC, VCM = 0 to VS - 1.5V (c) 2007-2015 Exar Corporation 4 / 19 72 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Electrical Characteristics at +5V Continued TA = 25C, VS = +5V, Rf = 2k, RL = 2k to VS/2; G = 2; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Output Characteristics VOUT Output Swing RL = 10k to VS / 2 0.027 to 4.97 V RL = 2k to VS / 2 0.036 to 4.953 V RL = 150 to VS / 2 IOUT Output Current ISC Short Circuit Current VS Power Supply Operating Range 0.3 0.12 to 4.8 4.625 V 55 mA -40C to +85C 50 mA VOUT = VS / 2 85 mA 2.5 5 5.5 V Notes: 1. Rf = 1k was used for optimal performance. (For G = +1, Rf = 0) (c) 2007-2015 Exar Corporation 5 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 CLC1005 Pin Configurations CLC1005 Pin Assignments TSOT-5 TSOT-5 OUT 1 -Vs 2 +IN 3 5 + +Vs 4 -IN SOIC-8 Pin Name Description 1 OUT Output 2 -VS Negative supply 3 +IN Positive input 4 -IN Negative input 5 +VS Positive supply SOIC-8 NC 1 -IN 2 +IN 3 -Vs Pin No. + 4 8 NC 7 +Vs 6 OUT NC 5 Pin No. Pin Name Description 1 NC No Connect 2 -IN Negative input 3 +IN Positive input 4 -VS Negative supply 5 NC No Connect 6 OUT Output 7 +VS Positive supply 8 NC No Connect CLC1015 Pin Configurations CLC1015 Pin Assignments TSOT-6 TSOT-6 OUT 1 -Vs 2 +IN 3 + - 6 +Vs 5 DIS 4 -IN (c) 2007-2015 Exar Corporation Pin No. Pin Name 1 OUT Output 2 -VS Negative supply 3 +IN Positive input 4 -IN Negative input 5 DIS Disable pin. Enabled if pin is left open or tied to +VS, disabled if pin is tied to -VS (which is GND in a single supply application.) 6 +VS Positive supply 6 / 19 Description exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 CLC2005 Pin Configuration CLC2005 Pin Assignments SOIC-8 / MSOP-8 SOIC-8 / MSOP-8 OUT1 1 -IN1 2 +IN1 3 -Vs 4 + + Pin No. Pin Name Description 1 OUT1 8 +Vs 2 -IN1 Negative input, channel 1 7 OUT2 3 +IN1 Positive input, channel 1 4 -IN2 -VS 6 5 +IN2 Positive input, channel 2 +IN2 6 -IN2 Negative input, channel 2 7 OUT2 8 +VS 5 (c) 2007-2015 Exar Corporation 7 / 19 Output, channel 1 Negative supply Output, channel 2 Positive supply exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Typical Performance Characteristics TA = 25C, VS = +5V, RL = 2k to VS/2, G = +2, RF = 2k; unless otherwise noted. Inverting Frequency Response VS = +5V Normalized Magnitude (1dB/div) Normalized Magnitude (2dB/div) Non-Inverting Frequency Response VS = +5V G=1 Rf = 0 G=2 Rf = 1k G = 10 Rf = 2k G=5 Rf = 2k 0.1 1 10 G = -1 Rf = 2k G = -10 Rf = 2k G = -5 Rf = 2k G = -2 Rf = 2k 0.1 100 1 10 100 Non-Inverting Frequency Response VS = +2.7V Inverting Frequency Response VS = +2.7V Normalized Magnitude (1dB/div) Frequency (MHz) Normalized Magnitude (2dB/div) Frequency (MHz) G=1 Rf = 0 G=2 Rf = 1k G = 10 Rf = 2k G=5 Rf = 2k 1 0.1 10 G = -1 Rf = 2k G = -10 Rf = 2k G = -5 Rf = 2k G = -2 Rf = 2k 0.1 100 1 10 100 Frequency (MHz) Frequency (MHz) Magnitude (1dB/div) Magnitude (1dB/div) Frequency Response vs CL Large Signal Frequency Response CL = 100pF Rs = 25 CL = 50pF Rs = 33 + - CL 1kW 1kW 0.1 CL = 20pF Rs = 20 Rs 1 RL CL = 10pF Rs = 0 10 100 Vo = 2Vpp 0.1 Frequency (MHz) (c) 2007-2015 Exar Corporation Vo = 1Vpp 1 10 100 Frequency (MHz) 8 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Typical Performance Characteristics TA = 25C, VS = +5V, RL = 2k to VS/2, G = +2, RF = 2k; unless otherwise noted. Frequency Response vs. Temperature Input Voltage Noise vs Frequency 100 Magnitude (0.5dB/div) Voltage Noise (nV/Hz) 90 80 70 60 50 40 30 20 10 1 10 0 100 1k 10k 2nd & 3rd Harmonic Distortion VS = +5V -30 Distortion (dBc) -20 Vo = 2Vpp Rf = 1k 2nd RL = 150 -40 3rd RL = 150 -60 2nd RL = 2k 3rd RL = 2k -80 Vo = 1Vpp Rf = 1k -30 -50 -70 3rd RL = 150 -40 -50 2nd RL = 150 -60 2nd RL = 2k -70 3rd RL = 2k -80 -90 -90 0 5 10 15 0 20 5 Frequency (MHz) -20 Rf = 1k 20 2.0 2.5 Rf = 1k -30 -50 Distortion (dBc) 20MHz -40 10MHz -60 -70 5MHz -80 2MHz 20MHz -40 -50 10MHz -60 -70 5MHz -80 -90 2MHz -90 0.5 15 3rd Harmonic Distortion vs VO -20 -30 10 Frequency (MHz) 2nd Harmonic Distortion vs VO Distortion (dBc) 1M 2nd & 3rd Harmonic Distortion VS = +2.7V Distortion (dBc) -20 100k Frequency (Hz) Frequency (MHz) 1.0 1.5 2.0 2.5 0.5 Output Amplitude (Vpp) (c) 2007-2015 Exar Corporation 1.0 1.5 Output Amplitude (Vpp) 9 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Typical Performance Characteristics TA = 25C, VS = +5V, RL = 2k to VS/2, G = +2, RF = 2k; unless otherwise noted. PSRR CMRR -40 0 -10 -50 CMRR (dB) PSRR (dB) -20 -30 -40 -60 -70 -50 -80 -60 -90 -70 1k 0.01 0.1 1 10 0.01 100 0.1 Frequency (MHz) 80 0.8 70 0.6 |Gain| 40 30 10 0 Phase -45 Output Voltage (V) 60 20 -90 0 Linear output current 55mA 0.2 0 -0.2 Short circuit current 85mA -0.4 -135 -0.6 -20 -180 -0.8 -100 0.1 1 10 100 Frequency (MHz) Small Signal Pulse Response VS = +5V 0 50 100 Small Signal Pulse Response VS = +2.7V Rf = 1k Time (20ns/div) (c) 2007-2015 Exar Corporation -50 Output Current (mA) Output Voltage (0.05V/div) Output Voltage (0.05V/div) 100 0.4 -10 0.01 10 Output Current Phase (degrees) Open Loop Gain (dB) Open Loop Gain & Phase vs. Frequency 50 1.0 Frequency (MHz) Rf = 1k Time (20ns/div) 10 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Typical Performance Characteristics TA = 25C, VS = +5V, RL = 2k to VS/2, G = +2, RF = 2k; unless otherwise noted. Large Signal Pulse Response VS = +5V Output Swing Output Voltage (0.5V/div) Output Voltage (0.5V/div) 2.7 Rf = 1k Vs = +2.7V RL = 2k G = -1 0 Time (20ns/div) Time (0.5s/div) Channel Matching VS = +5V Magnitude (0.5dB/div) Rf = 1k RL = 2k G=2 Channel 1 Channel 2 0.1 1 10 100 Frequency (MHz) (c) 2007-2015 Exar Corporation 11 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Application Information +Vs General Description The CLC1005, CLC1015, and CLC2005 are single supply, general purpose, voltage-feedback amplifiers fabricated on a complementary bipolar process using a patented topography. They feature a rail-to-rail output stage and are unity gain stable. Both gain bandwidth and slew rate are insensitive to temperature. Input 0.1F + Output RL 0.1F The common mode input range extends to 300mV below ground and to 1.2V below Vs. Exceeding these values will not cause phase reversal. However, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices will begin to conduct. The output will stay at the rail during this overdrive condition. 6.8F G=1 -Vs Figure 3: Unity Gain Circuit +Vs The design is short circuit protected and offers "soft" saturation protection that improves recovery time. 6.8F + Figures 1, 2, and 3 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. Figure 4 shows the typical non-inverting gain circuit for single supply applications. +Vs 6.8F In 0.1F + Out - Rf Rg 6.8F Figure 4: Single Supply Non-Inverting Gain Circuit Input 0.1F + Output RL 0.1F Rg 6.8F -Vs Rf At non-inverting gains other than G = +1, keep Rg below 1k to minimize peaking; thus for optimum response at a gain of +2, a feedback resistor of 1k is recommended. Figure 5 illustrates the CLC1005, CLC1015 and CLC2005 frequency response with both 1k and 2k feedback resistors. G = 1 + (Rf/Rg) Figure 1: Typical Non-Inverting Gain Circuit R1 Input Rg Magnitude (1dB/div) +Vs 6.8F 0.1F + G=2 RL = 2k Vs = +5V Output Rf = 2k Rf = 1k RL 0.1F 6.8F -Vs Rf 1 10 100 Frequency (MHz) G = - (Rf/Rg) Figure 5: Frequency Response vs. Rf For optimum input offset voltage set R1 = Rf || Rg Figure 2: Typical Inverting Gain Circuit (c) 2007-2015 Exar Corporation 12 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Overdrive Recovery For an amplifier, an overdrive condition occurs when the output and/or input ranges are exceeded. The recovery time varies based on whether the input or output is overdriven and by how much the ranges are exceeded. The CLC1005, CLC1015, and CLC2005 will typically recover in less than 20ns from an overdrive condition. Figure 6 shows the CLC2005 in an overdriven condition. needs to be subtracted from the total power delivered by the supplies. PD = Psupply - Pload Supply power is calculated by the standard power equation. Psupply = Vsupply x IRMSsupply Vsupply = VS+ - VS- Input Voltage (0.5V/div) Power delivered to a purely resistive load is: RL = 2k Vin =2Vpp G=5 Rf = 1k Input Output Pload = ((Vload)RMS2)/Rloadeff The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, Rloadeff in Figure 3 would be calculated as: RL || (Rf + Rg) Time (20ns/div) These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from Figure 6: Overdrive Recovery PD = PQuiescent + PDynamic - Pload Enable/Disable Function The CLC1015 offers an active-low disable pin that can be used to lower its supply current. Leave the pin floating to enable to part. Pull the disable pin to the negative supply (which is ground in a single supply application) to disable the output. During the disable condition, the nominal supply current will drop below 127A and the output will be at a high impedance with about 2pF capacitance. Quiescent power can be derived from the specified IS values along with known supply voltage, Vsupply. Load power can be calculated as above with the desired signal amplitudes using: (Vload)RMS = Vpeak / 2 ( Iload)RMS = ( Vload)RMS / Rloadeff The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: Power Dissipation Power dissipation should not be a factor when operating under the stated 2k load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it's intended operating range. Maximum power levels are set by the absolute maximum junction rating of 150C. To calculate the junction temperature, the package thermal resistance value ThetaJA (JA) is used along with the total die power dissipation. PDynamic = (VS+ - Vload)RMS x ( Iload)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. The CLC1015 is short circuit protected. However, this may not guarantee that the maximum junction temperature (+150C) is not exceeded under all conditions. Figure 7 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. TJunction = TAmbient + (JA x PD) Where TAmbient is the temperature of the working environment. In order to determine PD, the power dissipated in the load (c) 2007-2015 Exar Corporation 13 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Layout Considerations Maximum Power Dissipation (W) 1.5 General layout and supply bypassing play major roles in high frequency performance. Exar has evaluation boards to use as a guide for high frequency layout and as an aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: SOIC-8 1 TSOT-6 MSOP-8 0.5 TSOT-5 Place the 6.8F capacitor within 0.75 inches of the power pin Place the 0.1F capacitor within 0.1 inches of the power pin 0 -40 -20 0 20 40 60 80 Ambient Temperature (C) Figure 7. Maximum Power Derating Include 6.8F and 0.1F ceramic capacitors for power supply decoupling Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 8. Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of these devices: Evaluation Board # Input + Rs Rf Output CL RL Products CEB002 CLC1005 and CLC1015 in TSOT CEB003 CLC1005 in SOIC CEB006 CLC2005 in SOIC CEB010 CLC2005 in MSOP Rg Figure 8. Addition of RS for Driving Capacitive Loads Table 1 provides the recommended RS for various capacitive loads. The recommended RS values result in approximately <1dB peaking in the frequency response. Evaluation Board Schematics Evaluation board schematics and layouts are shown in Figures 9-18. These evaluation boards are built for dualsupply operation. Follow these steps to use the board in a single-supply application: 1. Short -VS to ground. 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane. CL (pF) RS () -3dB BW (MHz) 22pF 0 118 47pF 15 112 100pF 15 91 492pF 6.5 59 Table 1: Recommended RS vs. CL For a given load capacitance, adjust RS to optimize the tradeoff between settling time and bandwidth. In general, reducing RS will increase bandwidth at the expense of additional overshoot and ringing. (c) 2007-2015 Exar Corporation 14 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Figure 11. CEB002 Bottom View Figure 9. CEB002 and CEB003 Schematic Figure 12. CEB003 Top View Figure 10. CEB002 Top View Figure 13. CEB003 Bottom View (c) 2007-2015 Exar Corporation 15 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Figure 16. CEB006 Bottom View Figure 14. CEB006 & CEB010 Schematic Figure 17. CEB010 Top View Figure 15. CEB006 Top View Figure 18. CEB010 Bottom View (c) 2007-2015 Exar Corporation 16 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Mechanical Dimensions TSOT-6 Package TSOT-5 Package (c) 2007-2015 Exar Corporation 17 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 MSOP-8 Package SOIC-8 Package (c) 2007-2015 Exar Corporation 18 / 19 exar.com/CLC1005 Rev 2D CLC1005, CLC1015, CLC2005 Ordering Information Part Number Package Green Operating Temperature Range Packaging CLC1005IST5X TSOT-5 Yes -40C to +85C Tape & Reel CLC1005IST5MTR TSOT-5 Yes -40C to +85C Mini Tape & Reel CLC1005IST5EVB Evaluation Board N/A N/A N/A CLC1005ISO8X SOIC-8 Yes -40C to +85C Tape & Reel CLC1005ISO8MTR SOIC-8 Yes -40C to +85C Mini Tape & Reel CLC1005ISO8EVB Evaluation Board N/A N/A N/A CLC1015IST6X TSOT-6 Yes -40C to +85C Tape & Reel CLC1015IST6MTR TSOT-6 Yes -40C to +85C Mini Tape & Reel CLC1015IST6EVB Evaluation Board N/A N/A N/A CLC2005ISO8X SOIC-8 Yes -40C to +85C Tape & Reel CLC2005ISO8MTR SOIC-8 Yes -40C to +85C Mini Tape & Reel CLC2005ISO8EVB Evaluation Board N/A N/A N/A CLC2005IMP8X MSOP-8 Yes -40C to +85C Tape & Reel CLC2005IMP8MTR MSOP-8 Yes -40C to +85C Mini Tape & Reel CLC2005IMP8EVB Evaluation Board N/A N/A N/A CLC1005 Ordering Information CLC1015 Ordering Information CLC2005 Ordering Information Moisture sensitivity level for all parts is MSL-1. Mini tape and reel quantity is 250. Revision History Revision 2D (ECN 1513-01) Date March 2015 Description Reformat into Exar data sheet template. Updated ordering information table to include MTR and EVB part numbers. Updated thermal resistance numbers and package outline drawings. Added CLC1015 back into data sheet. For Further Assistance: Email: CustomerSupport@exar.com or HPATechSupport@exar.com Exar Technical Documentation: http://www.exar.com/techdoc/ Exar Corporation Headquarters and Sales Offices 48760 Kato Road Tel.: +1 (510) 668-7000 Fremont, CA 94538 - USA Fax: +1 (510) 668-7001 NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. (c) 2007-2015 Exar Corporation 19 / 19 exar.com/CLC1005 Rev 2D Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Exar: CLC2005IMP8EVB CLC2005ISO8EVB CLC1005IST5EVB CLC1005ISO8EVB