Advanced Power N-CHANNEL ENHANCEMENT MODE
Electronics Corp. POWER MOSFET
▼ Low Gate Charge BVDSS 100V
▼ Single Drive Requirement RDS(ON) 160mΩ
▼ Surface Mount Package ID3A
▼ Halogen Free & RoHS Compliant Product
Description
Absolute Maximum Ratin
g
s
Symbol Units
VDS V
VGS V
ID@TA=25℃A
ID@TA=70℃A
IDM A
PD@TA=25℃W
TSTG ℃
TJ℃
Symbol Value Unit
Rthj-a Maximum Thermal Resistance Junction-ambient350 ℃/W
Data and specifications subject to change without notice
Halogen-Free Product
1
AP18T10GM-HF
201004141
Parameter Rating
Drain-Source Voltage 100
Gate-Source Voltage +20
Continuous Drain Current3, VGS @ 10V 3
Continuous Drain Current3, VGS @ 10V 2.1
Pulsed Drain Current112
Total Power Dissipation 2.5
-55 to 150
Operating Junction Temperature Range -55 to 150
Thermal Data
Parameter
Storage Temperature Range
G
D
S
SSSG
DDDD
SO-8
Advanced Power MOSFETs from APEC provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
The SO-8 package is widely preferred for commercial-industrial
surface mount applications and suited for low voltage applications
such as DC/DC converters.
Electrical Characteristics@Tj=25oC(unless otherwise specified)
Symbol Parameter Test Conditions Min. Typ. Max. Units
BVDSS Drain-Source Breakdown Voltage VGS=0V, ID=250uA 100 - - V
VGS=10V, ID=3A - - 160 mΩ
VGS=4.5V, ID=2A - - 225 mΩ
VGS(th) Gate Threshold Voltage VDS=VGS, ID=250uA 1-3V
gfs Forward Transconductance VDS=10V, ID=3A -4-S
IDSS Drain-Source Leakage Current VDS=80V, VGS=0V - - 10 uA
IGSS Gate-Source Leakage VGS=+20V, VDS=0V --+
100 nA
QgTotal Gate Charge2ID=3A - 5.5 8.8 nC
Qgs Gate-Source Charge VDS=50V - 1.5 - nC
Qgd Gate-Drain ("Miller") Charge VGS=4.5V -3-nC
td(on) Turn-on Delay Time2VDS=50V - 4.5 - ns
trRise Time ID=1A -6-ns
td(off) Turn-off Delay Time RG=3.3Ω-16-ns
tfFall Time VGS=10V - 5.5 - ns
Ciss Input Capacitance VGS=0V - 400 640 pF
Coss Output Capacitance VDS=25V -75-pF
Crss Reverse Transfer Capacitance f=1.0MHz - 45 - pF
RgGate Resistance f=1.0MHz - 1.5 - Ω
Source-Drain Diode
Symbol Parameter Test Conditions Min. Typ. Max. Units
VSD Forward On Voltage2IS=1.9A, VGS=0V - - 1.3 V
trr Reverse Recovery Time2IS=3A, VGS=0V,-40-ns
Qrr Reverse Recovery Charge dI/dt=100A/µs - 70 - nC
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse test
3.Surface mounted on 1 in2 copper pad of FR4 board ; 125℃/W when mounted on min. copper pad.
THIS PRODUCT IS SENSITIVE TO ELECTROSTATIC DISCHARGE, PLEASE HANDLE WITH CAUTION.
USE OF THIS PRODUCT AS A CRITICAL COMPONENT IN LIFE SUPPORT OR OTHER SIMILAR SYSTEMS IS NOT AUTHORIZED.
APEC DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED
HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
APEC RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN.
2
AP18T10GM-HF
RDS(ON) Static Drain-Source On-Resistance2
A
P18T10GM-H
F
Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics
Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance
v.s. Junction Temperature
Fi
g
5. Forward Characteristic o
f
Fig 6. Gate Threshold Voltage v.s.
Reverse Diode Junction Temperature
3
0
4
8
12
16
20
02468
VDS , Drain-to-Source Voltage (V)
ID , Drain Current (A)
10V
7.0V
6.0V
5.0V
VG=4.0V
TA=25oC
0
4
8
12
16
036912
VDS , Drain-to-Source Voltage (V)
ID , Drain Current (A)
TA=150oC10V
8.0V
7.0V
6.0V
VG=5.0V
0
2
4
6
8
0 0.2 0.4 0.6 0.8 1 1.2 1.4
VSD , Source-to-Drain Voltage (V)
IS(A)
Tj=25oC
Tj=150oC
0.3
0.8
1.3
1.8
2.3
-50 0 50 100 150
Tj , Junction Temperature ( oC)
Normalized RDS(ON)
I
D=3A
VG=10V
100
120
140
160
180
200
246810
VGS , Gate-to-Source Voltage (V)
RDS(ON) (m
Ω
)
I
D=2A
TA=25oC
0.3
0.6
0.9
1.2
1.5
-50 0 50 100 150
Tj , Junction Temperature ( oC)
Normalized VGS(th) (V)
AP18T10GM-H
F
Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics
Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance
Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform
4
Q
VG
4.5V
QGS QGD
QG
Charge
0
100
200
300
400
500
600
1 5 9 1317212529
VDS , Drain-to-Source Voltage (V)
C (pF)
f
=1.0MHz
Ciss
Coss
Crss
0
2
4
6
8
10
0246810
QG , Total Gate Charge (nC)
VGS , Gate to Sourc e Voltage ( V)
I
D=3A
VDS =50V
0.001
0.01
0.1
1
10
100
0.01 0.1 1 10 100 1000
VDS , Drain-to-Source Voltage (V)
ID (A)
100us
1ms
10ms
100ms
1s
DC
TA=25oC
Single Pulse
0.001
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10 100 1000
t , Pulse Width (s)
Normalized Th e rmal Re sponse (Rthja)
0.01
0.05
0.1
0.2
Duty factor=0.5
Single Pulse
PDM
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja = 125℃/W
tT
0.02
td(on) trtd(off) tf
VDS
VGS
10%
90%
Operation in this area
limited by RDS(ON)
