This is information on a product in full production.
September 2013 DocID008216 Rev 3 1/13
HCF4021
Asynchronous parallel input or synchronous serial-in/serial-out
8-stage static shift register
Datasheet - production data
Features
Medium speed operation: 12 MHz (typ.) clock
rate at VDD - VSS = 10 V
Fully static operation
8 master-slave flip-flops plus output buffering
and control gating
Quiescent current specified up to 20 V
5 V, 10 V, and 15 V parametric ratings
Input leakage current II = 100 nA (max.) at
VDD = 18 V, TA = 25 C
100% tested for quiescent current
ESD performance
– CDM: 1 kV
– HBM: 2 kV
– MM: 200 V
Applications
Automotive
Industrial
Computer
Consumer
Description
The HCF4021 is a monolithic integrated circuit
fabricated in metal oxide semiconductor
technology available in PDIP-16 and SO-16
packages.
This device is an 8-stage parallel or serial-
input/serial-output register having common clock
and parallel/serial control inputs, a single serial
data input, and individual parallel "jam" inputs to
each register stage. Each register stage is a D-
type, master-slave flip-flop in addition to an output
from stage 8. "Q" outputs are also available from
stages 6 and 7. Serial entry is synchronous with
the clock but parallel entry is asynchronous.
In this device, entry is controlled by the
parallel/serial control input. When the
parallel/serial control input is low, data are serially
shifted into the 8-stage register synchronously
with the positive transition of the clock line. When
the parallel/serial control input is high, data are
jammed into the 8-stage register via the parallel
input lines and synchronous with the positive
transition of the clock line. The clock input of the
internal stage is “forced” when asynchronous
parallel entry is made. Register expansion using
multiple packages is permitted.
PDIP-16 SO-16
Table 1. Device summary
Order code Temperature range Package Packing Marking
HCF4021M013TR -55 ° C to +125 ° C SO-16
Tape & reel
HCF4021
HCF4021YM013TR(1)
1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC
Q001 & Q002 or equivalent.
-40 ° C to +125 ° C SO-16
(automotive grade)(1) HCF4021Y
HCF4021BEY -55 ° C to +125 ° C PDIP-16 Tube HCF4021BE
www.st.com
Contents HCF4021
2/13 DocID008216 Rev 3
Contents
1 Pin information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1 PDIP-16 (0.25) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2 SO-16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
DocID008216 Rev 3 3/13
HCF4021 Pin information
13
1 Pin information
Figure 1. Pin connections (top view)
Table 2. Pin description
Pin number Symbol Name and function
7, 6, 5, 4, 13, 14, 15, 1 PI-1 to PI-8 Parallel input
11 SERIAL IN Serial input
9PARALLEL/SERIAL
CONTROL Parallel/serial input control
10 CLOCK Clock input
2, 3, 12 Q6, Q7, Q8 Buffered outputs
8V
SS Negative supply voltage
16 VDD Positive supply voltage
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Functional description HCF4021
4/13 DocID008216 Rev 3
2 Functional description
Figure 2. Logic diagram
Figure 3. Input equivalent circuit
Table 3. Truth table
Clock Serial
input
Parallel/serial
control PI-1 PI-n Q1 (internal) Qn
X(1)
1. Don’t care
X(1) 10000
X(1) X(1) 10101
X(1) X(1) 11010
X(1) X(1) 11111
00X
(1) X(1) 0Q
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(1) X(1) 1Q
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DocID008216 Rev 3 5/13
HCF4021 Electrical characteristics
13
3 Electrical characteristics
Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. All voltage values are referred to
VSS pin voltage.
Table 4. Absolute maximum ratings (AMR)
Symbol Parameter Value Unit
VDD Supply voltage -0.5 to +22
V
VIDC input voltage -0.5 to VDD + 0.5
IIDC input current 10 mA
PD
Power dissipation per package 200
mW
Power dissipation per output transistor 100
Top Operating temperature -55 to +125
°C
Tstg Storage temperature -65 to +150
Table 5. Recommended operating conditions
Symbol Parameter Value Unit
VDD Supply voltage 3 to 20
V
VIInput voltage 0 to VDD
Top Operating temperature -55 to 125 °C
Electrical characteristics HCF4021
6/13 DocID008216 Rev 3
Table 6. DC specifications(1)
Sym. Parameter
Test condition Value
Unit
VI (V) VO (V) |IO| (A) VDD(V)
TA = 25 °C -40 to 85 °C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
IL
Quiescent
current
0/5 5
0.04
5 150 150
A
0/10 10 10 300 300
0/15 15 20 600 600
0/20 20 0.08 100 3000 3000
VOH
High-level
output
voltage
0/5
<1
5 4.95 4.95 4.95
V
0/10 10 9.95 9.95 9.95
0/15 15 14.95 14.95 14.95
VOL
Low-level
output
voltage
5/0
<1
5
0.05 0.05 0.0510/0 10
15/0 15
VIH
High-level
input
voltage
0.5/4.5
<1
5 3.5 3.5 3.5
1/9 10 7 7 7
1.5/13.5 15 11 11 11
VIL
Low-level
input
voltage
4.5/0.5
<1
5 1.5 1.5 1.5
9/1 10 3 3 3
13.5/1.5 15 4 4 4
IOH
Output
drive
current
0/5
2.5
<1
5
-1.36 -3.2 -1.1 -1.1
mA
4.6 -0.44 -1 -0.36 -0.36
0/10 9.5 10 -1.1 -2.6 -0.9 -0.9
0/15 13.5 15 -3.0 -6.8 -2.4 -2.4
IOL
Output sink
current
0/5 0.4
<1
5 0.44 1 0.36 0.36
0/10 0.5 10 1.1 2.6 0.9 0.9
0/15 1.5 15 3.0 6.8 2.4 2.4
II
Input
leakage
current
0/18 Any input 18 10-5 0.1 11A
CI
Input
capacitance Any input 5 7.5 pF
1. The noise margin for both level "1" and "0" is: 1 V min. with VDD = 5 V, 2 V min. with VDD = 10 V, and 2.5 V min. with
VDD = 15 V.
DocID008216 Rev 3 7/13
HCF4021 Electrical characteristics
13
Table 7. Dynamic electrical characteristics (Tamb = 25 °C, CL = 50 pF, RL = 200 k, tr =
tf = 20 ns)
Symbol Parameter
Test condition Value(1)
1. The typical temperature coefficient for all VDD values is 0.3 %/°C.
Unit
VDD (V) Min. Typ. Max.
tPLH, tPHL Propagation delay time
5 160 320
ns
10 80 160
15 60 120
tTHL, tTLH Transition time
5 100 200
10 50 100
15 40 80
fCL(2)
2. If more than one unit is cascaded, trCL should be made less than or equal to the sum of the transition time
and the fixed propagation delay of the output of the driving stage of the estimated capacitive load.
Maximum clock input frequency
536
MHz10 6 12
15 8.5 17
twClock pulse width
5 180 90
ns10 80 40
15 50 25
tr , tfClock input rise or fall time
5
15 s10
15
ts
Minimum setup time, serial input
tH 200 ns
(ref to CL)
5 120 60
ns
10 80 40
15 60 30
Minimum setup time, parallel
inputs
tH 200 ns
(ref to P/S)
55025
10 30 15
15 20 10
th
Hold time, serial in, parallel in,
parallel/serial control
5
010
15
tWH P/S pulse width
5 160 80
10 80 40
15 50 25
trem
P/S removal time
ref to CL)
5 280 140
10 140 70
15 100 50
Electrical characteristics HCF4021
8/13 DocID008216 Rev 3
Figure 4. Test circuit
1. Legend: CL = 50 pF or equivalent (includes jig and probe capacitance), RL = 200 KRT = ZOUT of pulse
generator (typically 50 )
Figure 5. Waveform 1: propagation delay times, clock pulse width
(f = 1 MHz; 50 % duty cycle)
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DocID008216 Rev 3 9/13
HCF4021 Electrical characteristics
13
Figure 6. Waveform 2: setup and hold times (SI to CLOCK)
(f = 1 MHz; 50 % duty cycle)
Figure 7. Waveform 3: setup and hold time (PI to P/S)
(f = 1 MHz; 50 % duty cycle)
Figure 8. Waveform 4: pulse width and removal time (P/S to clock)
(f = 1 MHz; 50 % duty cycle)
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Package information HCF4021
10/13 DocID008216 Rev 3
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.1 PDIP-16 (0.25) package information
Figure 9. PDIP-16 (0.25) package mechanical drawing
Table 8. PDIP-16 (0.25) package mechanical data
Ref
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
a1 0.51 0.020
B 0.77 1.65 0.030 0.065
b 0.5 0.020
b1 0.25 0.010
D 20 0.787
E 8.5 0.335
e 2.54 0.100
e3 17.78 0.700
F 7.1 0.280
I 5.1 0.201
L 3.3 0.130
Z 1.27 1.27 0.050 0.050
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DocID008216 Rev 3 11/13
HCF4021 Package information
13
4.2 SO-16 package information
Figure 10. SO-16 package mechanical drawing
Table 9. SO-16 package mechanical data
Ref
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45 45
D 9.8 10 0.385 0.393
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 8.89 0.350
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.62 0.024
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Ordering information HCF4021
12/13 DocID008216 Rev 3
5 Ordering information
6 Revision history
Table 10. Order codes
Order code Temperature range Package Packing Marking
HCF4021M013TR -55 ° C to +125 ° C SO-16
Tape & reel
HCF4021
HCF4021YM013TR (1) -40 ° C to +125 ° C SO-16
(automotive grade)(1)
1. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening
according to AEC Q001 & Q002 or equivalent.
HCF4021Y
HCF4021BEY -55 ° C to +125 ° C PDIP-16 Tube HCF4021BE
Table 11. Document revision history
Date Revision Changes
Sep-2001 1 Initial release.
18-Feb-2013 2
Document template and layout updated
Removed “B” from part number
Updated package names (PDIP-16 and SO-16 instead of DIP-16
and SOP-16).
Added Applications
Added Device summary
Updated symbol names in Table 7
Added Section 5: Ordering information
12-Sep-2013 3
Added ESD performance to Features
Updated footnote 1 of Table 1
Updated footnote 1 of Table 10
DocID008216 Rev 3 13/13
HCF4021
13
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