SIEMENS
SIMATIC S5
1P
243
Analog
Module
with FB 160/
FB 161
Equipment Manual
Order No: 6ES5998–0KF21
Subject to change without notice
@
Siemens
AG 1989, All rights reserved
Application and Application Area
1
Mechanical Construction
2
Function Description
3
Interrupt Processing
4
Putting into Operation 5
Technical
Specifications
6
Programming Instructions
7
8
9
10
@
Copyright Siemens AG 1989 All Rights Reserved
Passing on and reproduction of these documents, or utilization and disclosure of their con-
tents is prohibited unless specifically authorized. Violations are cause for damage
liability.
All rights reserved, particularly in the event a patent is issued or a utility–model patent regis-
tered.
SIEMENS
Warning
Risks involved in the use of so-called SIMATIC–compatible modules of non-Siemens
ma-nufacture
“The manufacturer of a product
(SIMATIC
in this case) is under the general obligation to give
warning of possible risks attached to his product. This obligation has been extended in recent
court rulings to include parts supplied by other vendors. Accordingly, the manufacturer is obliged
to observe and recognize such hazards as may arise when a product is combined with products
of other manufacture.
For this reason, we feel obliged to warn our customers who use SIMATIC products not to
install so-called SIMATIC–compatible modules of other manufacture in the form of re-
placement or add–on modules in SIMATIC systems.
Our products undergo a strict quality assurance procedure. We have no knowledge as to wheth-
er outside manufacturers of so–called SIMATIC–compatible modules have any quality assur-
ance at all or one that is nearly equivalent to ours. These so–called
SIMATIC–
compatible mod-
ules are not marketed in agreement with
Siemens;
we have never recommended the use of so–
called SIMATIC– compatible modules of other manufacture. The advertising of these other man-
ufacturers for so–called SIMATIC–compatible modules wrongly creates the impression that the
subject advertised in periodicals,
catalogues
or at exhibitions had been agreed to by us. Where
so–called SIMATIC– compatible modules of non–Siemens manufacture are combined with our
SIMATIC
automation systems, we have a case of our product being used contrary to recommen-
dations. Because of the variety of applications of our
SIMATIC
automation systems and the large
number of these products marketed worldwide, we cannot give a concrete description specifical-
ly analyzing the hazards created by these so–called SIMATIC– compatible modules. It is beyond
the manufacturer’s capabilities to have all these so–called
SIMATIC–compatible
modules
checked for their effect on our
SIMATIC
products. If the use of so–called SIMATIC– compatible
modules leads to defects in a
SIMATIC
automation system, no warranty for such systems will be
given by
Siemens.
In the event of product liability damages due to the use of so–called SIMATIC–compatible mod-
ules,
Siemens
is not liable since we took timely action in warning users of the potential hazards
involved in so–called SIMATIC– compatible modules. ”
@)
Siernem
AG
1990, All rights rexwed
R02192
Contenta
1
2
2.1
2.2
2.3
2.4
2.5
3
3.1
3.2
3.3
3.3.1
3.3.2
3.3.3
3.3.4
3.4
3.4.1
3.4.2
3.4.2.1
3.4.2.2
3.4.2.3
3.4.3.
3.4.3.1
3.4.3.2
3.4.3.3
3.4.4
3.4.4.1
3.4.4.2
3.5
3.5.1.
3.5.2
3,5.3
3.6
3.6.1
3.6.2.
3.6.3
3.6.4
3.6.4.1
3.6.4.2
3.6.4.3
3.6.4.4
3.7
3.7.1
3.7.2
3.7.3
Application and Application Area
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–1
Mechanical Construction
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–1
Dimensions and Mechanical Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 –
1
Overview of thelndividual Variants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1
Block Diagram
1P
243 – IAA, Full Configuration . . . . . . . . . . . . . . . . . . . . . . . . . 2 – 3
Block Diagram
1P
243 – IAB, Partial Configuration . . . . . . . . . . . . . . . . . . . . . . . 2 – 4
Block Diagram
1P
243 – IAC, Partial Configuration . . . . . . . . . . . . . . . . . . . . . . . 2 – 5
Function Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
3–1
Binary Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 –
1
Binary Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2
Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3
Rated Input Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3
Conversion of the Analog input Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4
InputCircuitry
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5
Digital Representation ofMeasuring Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5
Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–7
Jumpering
ofAnalog
Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–7
Digitai/Analog Convertersl and2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–7
Rated Output Range and Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–7
Writing theAnalog Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–7
Digital Representation
ofAnalog
Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–8
Digital/Analog Converter3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–9
Rated OutputRangeand Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–9
WritingtheAnalog Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–9
Digital Representation
ofAnalog
Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–9
Analog OutputAmplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–10
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–10
Circuihy
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–10
Analog Value Conditioning Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–11
Operating Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–11
Functioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–11
InputCircuitry
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–13
Comparatorsand
Gating Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–14
input Signal Range and PossibleCircuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–14
InputCircuitry
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–15
Reading the
Comparatorsand
the Gating Logic . . . . . . . . . . . . . . . . . . . . . . . . . . 3–15
Evaluation ofthe Comparator States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–16
Representation ofComparator States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–16
ValueTableforComparators
land2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–17
Explanation oftheValueTable and the lndividualValues . . . . . . . . . . . . . . . . . . . 3–18
Representation intheTime/Voltage Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–19
DifferenceAmplifier(P Controller) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
3–20
input Signal Range
andAmplification
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–20
InputCircuitry
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–20
Circuitry Possibilities and Output Signal Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–20
lP243 Equipment Manual
o–1
@.SiemensAG 1989, ClrderNo:6ES5 gg8-0KF21
Contenta
R02192
4
4.1
4.2
4.3
4.3.1
4.3,2
4.4
4.4,1
4.4.2
4.4,3
5
5.1
5.2
5.3
5.4
5.5
5.5.1
5.5.2
5.6
5.7
5.8
6
6.1
7
7.1
7.2
7.3
7.4
7.5
Interrupt Processing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
General Conditions for Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Possibilities for Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DirectBusAccess . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
lnterruptProcessing
intheS5–1
15U/H
. . . . . . . . . . .
.
. . . . . . . . . . . . . . . . . . . . . .
lnterruptProcessing
intheS5–135U with CPU 9220rCPU 928A/B . . . . . . . . .
Separate interrupt lnputModule . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
InterruptProcessing
inthe S5–135U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
lnterruptProcessing
inthe
S5-150U/S
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
InterruptProcessing
inthe
S5–155U/H
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–1
4–1
4–1
4–1
4–2
4–6
4–12
4–12
4–16
4–21
Putting into Operation
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5–1
BasicConnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–1
Front Plate and FrontConnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–1
Explanation ofthe Signal Names andAbbreviations . . . . . . . . . . . . . . . . . . . . . . . 5–3
LayoutofSetting Elementsand Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–4
Jumpering oftheAnaIog Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–5
CircuitryoftheAnalog
SignalJumpering
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–5
Soldering Base PinAssignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–6
Jumpering ofthe BinarySignaIs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–8
lnterruptJumpering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5–9
Setting the ModuleAddress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–11
Technical Specifications
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–1
lnWhich
Slots
CanthelP243
Analog Module BeUsed? . . . . . . . . . . . . . . . . . . 6–6
Programming Instructions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7–1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7–1
Function Block FB160(PER:ANL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7–2
Function Block
FB161
(PER:ANS)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7–7
Example
.....,..
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7–12
ProgrammingwithoutFB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7–19
O–ii
lP243 Equipment Manual
@.SiemensAG 1989j0rderNo: 6ES5998-0KF21
R
02/92
Contents
Texts in these boxes contain important information/instructions which must abso-
lutely be observed/followed to ensure correct function or protection of the module.
For clarity’s sake, this equipment manual does not contain complete, detailed information and
cannot cover every conceivable operating situation.
Contact your local
Siemens
office if you require additional information or if a special problem ari-
ses which is not covered in sufficient detail by this equipment manual.
In addition, be aware that the contents of this documentation do not constitute a part of a previous
or existing agreement, promise, or a legal relationship, and are not intended to alter same.
All obligations on the part of
Siemens
are based on the respective purchase order which also con-
tains the complete and solely valid warranty provisions. This
1P
243 equipment manual neither
widens nor restricts these contractual warranties.
1P
243 Equipment Manual
@
Siemens
AG
1989, Order No: 6ES5 998-0KF21 o –
Ill
R 02/92 Application and Application Area
1
The
1P
243 is a module for input and output, for preliminary processing, and forjumpering of ana-
log signals within short processing times. The
submodule
in its full configuration has eight quick
analog input channels with max. 35
psec.
conversion time, four input channels with analog value
conditioning and four analog output channels. Two comparators allow the comparison of analog
values with each other and via two value difference amplifiers, the signals can be amplified up to
20 times their original strength. All analog signals can be freely jumpered via soldering bases on
the circuit board. This means that as a user you can decide about the individual combinations of
the available hardware components.
Furthermore, eight digital inputs and eight outputs with direct bus access are available. Custom-
er–specific interrupt processing can be effected by means of the jumpering base.
The
1P
243
submodule
can be used for the following programmable controllers:
– S5–115U/H
S5–135U
s5–150s/u
S5–155U/H
or expansion units (see section 6.1).
For the programmable S5–115U, an adapter casing is required. No fan assembly is required.
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21 1–1
R02192 Mechanical Construction
2
Mechanical Construction
2.1
Dimensions and Mechanical Data
The
1P
243 is a printed circuit board in double European format, with dimensions of 233.4 mm x
160 mm (DIN 41494). In accordance with the
SIMATIC
S5 compact peripheral system, the PCB
takes up one slot in the rack. It has a width of 1–1/3
SPS1
(20 mm). 42 Faston connector pins (2.4
mm x 0.8 mm) are located on the front plate. The bus connection is made via a second row,
48–way base connector. The base connector is located on the upper half. Ground
(Mext)
connec-
tion is provided via contact strips in the guide rails.
Overview of the Individual Variants
The
1P
243 is available in one full–configuration version and two different part-configuration ver-
sions. The full–configuration module has the following independent functions:
– 1 Analog/digital converter, 8 channels, 12 bits, 35
psec.
conversion time,
bipolar or
unipolar
– 2 Digital/analog converters, 12 bits, bipolar
– 1 Digital/analog converter, 8 bits,
unipolar
– 1 Analog output amplifier
– 4 Analog value conditioning circuits with operating point and amplifier setting
– 2 Difference amplifiers (P controllers) with adjustable gain
– 2 comparators with
gating
logic connected in series, can be read in statically
and/orwith
inter-
rupt generation (interrupt evaluation is only possible for the
SIMATIC
S5–150U/S and
S5–155U
with externally-wired digital input module for interrupt generation).
– 8 binary inputs can be read in statically and/orwith interrupt generation (interrupt evaluation is
only possible for the
SIMATIC
S5– 150U/S and S5–155U with externally–wired digital input
module for interrupt generation).
– 8 binary outputs, 24 V, 200 mA, switching to P potential, not current–limited.
The inputs and outputs of the analog function groups are routed to the analog signal jumper
block. This makes it possible to combine the individual functions to suit user requirements. All
signals are nonfloating.
1
s~ndard plug–in station
1P
243 Equipment Manual
@
%311WIIS
AG 1989, Order No: 6ES5
998-0KF21 2–1
Mechanical Construction R 02/92
The following table shows which components are for the part-configuration versions:
Full Con figura- Part Configura- Part Configura-
tion Module
tion
Module
tion
Module
Type
243- IAA
243-IAB
243–1
AC
ND
converter, 12 bits
11
D/A converter, 12 bits
2
2
D/A converter,
8 bits
1
1
(with driver)
Analog value conditioning circuit
44
2
Difference amplifier (P controller)
2
2
Comparators (alarm generation)
2
Binaty
inputs
8
Binaty
outputs
8
Interrupt/alarm
x
2–2
1P
243 Equipment Manual
@SiemensA(31989, Order No: 6ES5998-0KF21
R 02/92
Mechanical Construction
2.3 Block Diagram
1P
243 – IAA, Full Configuration
tiEzizl
8binary
inputs
.
.
1P
243 Equipment Manual
@
Siemens
AG
1989, order No:
6ES5
998-0KF21 2–3
Mechanical Construction
R
02/92
2.4 Block Diagram
1P
243- IAB, Partial Configuration
Ll-
4+1
Measuring
sockets
El-
4 analog
actual
values
IEEl-
0
Analog
value
condi–
tioning
Analog signal
jumpering
(Soldering base)
2–4
1P
243 Equipment Manual
@
Siemens
AG
1989, Order No: 6ES5
998-0KF21
R02192 Mechanical Construction
EE@zl
w
2 Difference
amplfiers
(P controllers)
Analog Analog signal jumpering
;ca;~;og
-
value
values
condi–
tioning
(Soldering base)
m“
*
Analog
m“
-
(driver)
amplifier
1P
243 Equipment Manual
@
Siemens
AG 1969, Order No: 6ES5 998-0KF21
*
m
m
DAC
8 bits
+
2–5
R
02/92
Function Description
3 Function Description
3.1
Binary Input
The characteristics of the eight digital input channels
BIO
to
B17
are:
– Rated input voltage : 24 V DC
– Input voltage for signal”1” : 12.7 Vto 30 V
– No potential isolation
– Pole protection available
– Input filtering: Typical delay time 2.7
msec.
Inputs selectable for interrupt generation (therefore, input filtering time is relevant.)
Input circuitry for one input
1
A
8.2 k
BIO
to
B17
74LS245
+
0.33
WF
1.5 k
Mew
m
1P
243 Equipment Manual
@
Siemens
AG
1989, Order No: 6ES5 998-0KF21 3–1
Function Description
R
02/92
I
3.2 Binary Output
Eight digital output channels (BOO to B07) are available which, however, are only used for trigger-
ing of indicator elements ( e.g., lights). Contrary to the standard S5 set–up no BASP signal is
generated. Other characteristics:
– P switching “open emitter”
– Not “short–circuit proof”
– After return of voltage all channels carry the signal “O”
– Output current per BO: maximum of 200
mA
– Output total current (for all 8
BOS):
maximum of 600
mA
Output circuitry per output:
74LS273
1
T+*4V
Front connector
BOO to
B07
3–2
1P
243 Equipment Manual
@.SiemensA(31989, Order No: 6ES5998-0KF21
R02/92
Function Description
3.3 Analog Input
3.3.1 Rated Input Ranges
The analog input is applicable to the following voltage ranges:
–5 v to +5
v
–lo v to +10 v
o v to +10 v
The ranges can be set via jumpers on the module (seethe layout plan in section 5.4, Setting Ele-
ments and Jumpers). Upon delivery the jumpers are set for the voltage range O V to 10 V. The
jumper settings for the respective rated input ranges must be made as follows:
Rated input range
–5 v to +5 v
–lo v to +10 v
o v to +10 v
p:
-+
Jumper installed
+
Unipolar
Bi -+
Bipolar
1P
243 Equipment Manual
@.SiemensA(31989,
Order
No:
6ES5998-0KF21 3–3
R 02/92
Function Description
3.3.2 Conversion of the Analog Input Signals
The central circuit of the analog input is the analog/digital converter which converts an applied
setpoint in a maximum of 35
~sec.
with a resolution of 12 bits. An analog eight–channel multiplex-
er is connected on the input side of the converter. The conversion of the analog input values takes
place in three stages:
1) Select the channel
2) Output the conversion command
3) Read the result
1)
2)
3)
Select the channel:
The multiplexer is addressed under the module address +7. The channel to be converted
(O to 7) is selected by writing the three data bits 2°, 2
1
, and 2
2
.
Channel selection: (in the byte module address +7)
D7
DO
LOG
STR
xxx
2222°
I
1
1
If the same channel is read in several times in sequence, it need not be selected each time. In
such a case it suffices when the active values are converted and read out. The selected chan-
nel remains current until a different channel number is written.
The current channel selected by the program is indicated by the three yellow LEDs on the mod-
ule front plate.
Output the conversion command:
The conversion command is given by writing the module address +6, whereby the written data
is irrelevant.
Read the result:
The result can be read immediately in the peripheral word module address +6 as the “Ready”
signal is only generated when the ADC has completed the conversion (i.e., after a maximum of
35
psec.).
No additional waiting time is required. It is also possible to process other parts of the
user program within the 35
psec.
period.
3–4
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Function Description
3.3.3 Input Circuitry
At the pins
AR1
to
AR8
of the analog signal jumping block, the analog input AIO to
A17
can be not
only active, but they can also be switched to the inputs of the analog–value conditioning circuit or
to the outputs of the difference amplifiers.
Input circuitry of the multiplexer input (per input)
Front connector
100
Q
I
$%:;7
n
AR1
to
AR8
+15
v
–15 v
CMOS–
Multiplexer
3.3.4 Digital Representation of Measuring Values
For representation of the analog values in digital form, two bytes (per word) are required.
HIGH byte
LOW byte
I
Module address +6
I
Module address +7
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243 Equipment Manual
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Function Description
R 02/92
The coding of the analog input signals is accomplished by accepting only the positive values in
the range O V to 20 V (rated input range &10 V) respectively O V tol O V (rated input range i-5 V).
The digital values are then referred to the rated input range and are allocated in accordance with
the following table.
Units
~048
+2047
+2000
+1000
+1
Switch pt.
o
Switch pt.
1
-1000
–2000
–2048
-2049
‘w&a
[v]
*1O v
~lo.oor)r)
+9.9951
+9.7656
+4.8828
+0.0049
+0.0024
o
– 0.0024
-0.0049
– 4.6628
– 9.7656
–10.0000
–10.0049
+4.9976
i-4.8828
+2.4414
+0.0024
+0.0012
o
-0.0012
-0.0024
-2.4414
–4.8828
-5.0000
-5.0024
HIGH
LOW
Conversion
In
ut
voltage in
Byte Byte of bit pattern
f
re erence to range
2“2’5
92
d
26213222
00000
0 Vto +20 v
o v to +1OV
1 1 1 1 1 1 1 1 1 1 1 1 0000
~4r3g8
220.000
>lr).r)fjo
1 1 1 1 1 1 1 1 1 1 1 1 0000 4095
19.9951
9.9976
1 1 1 1 1 1 0 1 00 0 00000
4048
19.7656
9.8828
1 0 1 1 1 1 1 0 1 0000000
3048
14.8828
7.4414
1
00 00 0 0 000 0 1 0000
2049
10.0049
5.0024
10.0024
5.0012
1 000 0 0 000000 0000
2048
10.0000
5.0000
9.9976 4.9966
0 1 1 1 1 1 1 1 1 1 1 1 0000
2047
9.8951
4.9976
0 1 00000 1 1 0000000
1048
5.1172 2.5566
000000 1 1 00000000
48 0.2344 0.1172
0000000000000000
0
0.0000 0.0000
0000000000000000III
Attention: By
adding
8000H
to the digital values, the values can be converted
to a dual–complement format.
In the input voltage range O V to 10 V, the active analog value is represented directly as an amount
(without sign).
Units
&4r)gf3
+4095
+4000
+2000
+1
o
~
–1
Input voltage [V]
o
v
to
+1
o v
2+1
0.0000
+9.9976
+9.7656
+4.8828
+0.0024
o
s
–0.0024
111111111111 0000
111111111111 0000
1111 1010 00000000
0111 1101 00000000
00000000 0001 0000
00000000 00000000
00000000 00000000
3–6
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243 Equipment Manual
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Function Description
I
3.4 Analog Output
B
,..
,
4
,.
.,.
,$
3.4.1 Jumpering of Analog Output
Five channels are available (AO1 to
A05)
which can be freely distributed via the soldering base. It
is possible to output analog values (provided by the D/A converters) on a certain channel, and
transfer this signal simultaneously to different outputs. In the same way, for instance, the outputs
of the difference amplifiers (P controllers) or conditioned analog values can be directly output as
analog values. Attention must be paid to the input side of the analog output
A05
to make sure that
an analog amplifier is connected. It is not only able to amplify the value provided by DAC3, but also
a value which, via an analog input, is present as an actual–value conditioning input on the P con-
troller. Three digital/analog converters, which are described in more detail below, convert binary
values into analog signals.
3.4.2 Digital/Analog Converters 1 and 2
3.4.2.1 Rated Output Range and Resolution
Digital/analog converters
DAC1
and
DAC2
are systems independent from each other. The resolu-
tion is 11 bits plus sign. Bipolar analog values in the range of
*1
O V can be output.
3.4.2.2 Writing the Analog Outputs
DAC1
is addressed under the module address +0 and
DAC2
under the module address +2. The
binary value should be transferred to
DAC1/2
by a word statement to prevent possible peaks du-
ring byte-wise write procedures.
Example: S5
: TPW address
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Function Description
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02/92
3.4.2.3 Digital Representation of Analog Values
Two bytes are required for representing the values, the output from
DAC1
and
DAC2,
in digital
form.
HIGH byte
LOW byte
X: irrelevant
DAC1:
Module address +0
Module address
+1
DAC2:
Module address +2
Module address +3
The representation of the digital values in the bit pattern is to be interpreted in a way that the output
voltage range
*1
O V is only considered as a positive range within O V to +20 V.
The 12th bit is cutoff and written separately as sign bit at position 2
1
5. The highest representable
value FFF
H
, at a resolution of 12 bits, corresponds to the maximum voltage +20 V, but it is adapted
to the output voltage range and is converted to the negative voltage –10
V.
The digital representation of analog values over the entire rated output range appears as follows:
Units
+2047
+2000
+1000
+1
o
-1
–1000
–2000
–2048
output
voltage
rJl
+9.9951
+9.7656
+4.8828
+0.0049
o
-0.0049
–4.8828
–9.7656
–10.0000
HIGH Byte
LOW Byte
SN X X X X
2
‘~
~
~
272
!2
%
?
232 2
0
0
Xxxx
o 0 0 0 0 0 0 0 0 0 0
0
Xxxx
o 0 0 0 0 1 0 1 1 1 1
0
Xxxx
1 0 0 0 0 0 1 0 1 1 1
0
Xxxx
1 1 1 1 1 1 1 1110
0
Xxxx
1 1 1 1 1 1 1 1111
1
Xxxx
o 0 0 0 0 0 0 0 0 0 0
1
Xxxx
o 1 1 1 1 1 0 0 1 1
1
1
Xxxx
1
1
1 1 1 0 0 1 1 1 1
1
Xxxx
1 1 1 1 1 1 1 1111
Amount of
bit pattern
(including
sign)
o
47
1047
2046
2047
2048
3047
4047
4095
Output voltage in
reference to range
o v to +20 v
0.0049
0.2344
5.1172
9.9951
10.0000
10.0049
14.8628
19.7656
20.0000
Attention: If a value provided in the two’s complement form by the programmable
controller is output as an analog value, this value must first be converted
to a format suitable for a
DAC1
or
DAC2.
For this purpose the sign bit
215
must at first be saved, then the bit pattern must be inverted (command
CFW)
and the sign bit must be written back.
Attention: When the power supply of the programmable controller is initially turned
on, or when the voltage returns after power–off,
DAC1
and
DAC2
are pre-
set with the value 000000000000 = +9.9951. This value remains until it
3–8
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243 Equipment Manual
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Function Description
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3.4.3. Digital/Analog Converter 3
3.4.3.1 Rated Output Range and Resolution
The digital/analog converter
DAC3
has an 8–bit resolution.
Unipolar
analog values in the range O
V to +10 V can be output. The analog output amplifier should be added on the output side
of
DAC3
to amplify the analog output signal, as output current from
DAC3
is too low to carry a load.
3.4.3.2 Writing the Analog Output
DAC3
is addressed under the module address +4. The command TPY suffices, since only 8 bits
need to be transferred to the output.
3.4.3.3 Digital Representation of Analog Values
The digital value to be converted to an analog voltage has a 1–byte format:
D7
DO
272625242322
2’
2°
Module address +4
The value to be output is represented as an amount (without
sign)
in the following bit pattern:
Units
Output voltage
Byte
272
‘??
52
??
232 2
0
255
9.961
11111111
200
7.812
1100 1000
100
3.906
0110 0100
1
0.039
0000 0001
0 0
0000 0000
Attention: When the power supply of the programmable controller is initially turned
on, or when the voltage returns after
power–off,
DAC3
is not preset. It can
assume anv value which remains until it is overwritten.
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Function Description
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3.4.4 Analog Output Amplifier
3.4.4.1
Description
Mainly in cases where
DAC3
is used for analog output, the analog output amplifier is added on the
output side of the digital/analog converter as a voltage booster. This is necessary because the
converter is not permanently “short–circuit proof” and the short circuit current is not defined.
It is possible, however, to route signals other than those of
DAC3
to the output amplifier, via ana-
log–signal
jumpering.
The voltage booster has a 1:1 amplification.
3.4.4.2
Circuitry
The analog output amplifier has the following circuitry:
Analog–signal
22
k!il
jumpering
1
I
I
m
AA5
AR29
+
F
Front connector
3 – 10
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Function Description
3.5 Analog Value Conditioning Circuit
3.5.1 Operating Elements
The four inputs of the analog value conditioning circuits are meant to standardize the voltages
provided by encoders to the O V to +10 V range, and are conditioned in accordance with the set-
ting of the trimming potentiometer on the module front plate. Conversion in the O to +10 V range is
not possible unless input voltage > –4 V. Conditioning is always necessary when negative volt-
ages are processed and routed via the comparators. The
comparators are designed for positive voltages so that the input voltages must be transformed to
the positive range.
In addition to the 4 trimming potentiometers for setting the amplification and the offset, there are
four measuring sockets on the front plate via which the conditioned analog values can be
scanned. A socket (socket 6) is also available. This socket is connected to analog ground M
ari
a.
This socket can be used as the ground connection for a graphic recorder which records the condi-
tioned analog signals.
Attention: Socket5 hasnofixed internal connection toaspecificsignal. Itis located
on the analog–signal
jumpering
space AR32. This socket is free for
switching, either for a signal from an
1P
243. The conditional socket (i.e.,
the component routed to the soldering base) or for another external sig-
3.5.2 Functioning
On the front plate of the
1P
243 there is one trimming potentiometer per input (AV1 to AV4) for the
offset of the operation point by a binary amount between –2 V and +2 V and for setting the amplifi-
cation (gain) as a factor in the range from 1 to 10.
First, the active analog value is multiplied by the fixed factor 0.5 specified by the module. Then, the
set offset is added, and finally this value is multiplied by the desired gain factor. The possible total
gain is between 0.5 and 5.
1P
243 Equipment Manual
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Function Description
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02/92
The following block diagram shows the operating method of the analog value conditioning circuit:
O crating point
#o set
Front connector
–2
v
to
Gain setting
+2 v
Input time Analog signal
AVI
to
AV4 constant
Multiplication constsnt
+
x 1 to 10
Y
*
jumpering
m
IL
AR13 toAR16
XO.5
T SpprOX,
0.1
msec.
n
Analog
value
Measuring socket
conditioning 1 to 4
Example:
An input voltage which can vary in the range from –1 V to –1.5 V is to be compared in terms of
hardware with an input voltage from –0.5 V to –2 V.
Both signals are routed through the analog value conditioning circuit. The following settings are
possible:
Offset = +2
Gain = 3
–1 .0 v x 0.5
–1.5 v x 0,5
–0.5 v x 0.5
=–0.50 v
+2.00 v
+1
.50 v x 3
=–0.75 v
+2.00 v
+1.25
V X 3
=–0.25 V
+2.00 v
+1 .75 v x 3
= +4.50 v
=
+3.75
v
= +5.25 V
–2.0 v x 0.5=–1 .00 v
+2.00 v
+1 .00 v x 3= +3.00 v
Accordingly, the voltages 3.75 V to 4.5 V on one side are compared with
3.0
V to 5.25 V on the
other side.
There are many possibilities for setting the trimming potentiometers. The user decides which con-
version is most suitable.
3 – 12
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Function Description
3.5.3 Input Circuitry
Input circuitry for value conditioning (per input)
?;
~-
EEiEEEa+”v
“5”
100kS2
‘“’to’”-
‘M
+
I
1
nF
56kQ
ma
Attention:
The input constant of approximately 0.1 msec. was selected to filter out
possible interferences. The delay is approximately proportional to the ca-
pacitor 1
nF.
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243 Equipment Manual
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Function Description
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02/92
3.6 Comparators and
Gating
Logic
3.6.1 Input Signal Range and Possible Circuitry
The two comparators are designed to compare positive voltages in the range of O V to +10 V. If
negative input voltages need to be compared, they must be routed through the analog value con-
ditioning circuit and converted to a positive value.
The inputs of the comparators are connected with analog–signal jumpering via a filter circuit
(AR17 to
AR20).
Depending on the application, the comparator inputs can be connected with two signals each that
are routed through the soldering base.
Via
gating
logic, the current comparator status can be read in, and/or an interrupt can be gener-
ated.
In case of interrupt processing, be aware that a hardware interrupt, fed
directly from the module to the bus, can only be processed by the con-
trollers S5–115U/H and S5–135U with CPU 922 or CPU
928AJB.
(For
interrupt processing with different programmable controllers, see sec-
3 – 14
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243 Equipment Manual
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Function Description
3.6.2. Input Circuitry
Input
circuitty
for each comparator
M
alla
1
M~
2.2
k~
I
+5
v
COMP+
AR17/20
+15
v
22
k~
Xl 9 Pins 7/8
Analog signal Gating
*
jumpering logic
output
gating
logic
COMP-
AR18/19
22
k~
I
o
(ARCOMP)
MM
.“=
Cs
ma
Data bus
CS
= Chip Select
*routed to interrupt
jumpering
base
Attention: When comparators are used to compare voltages, the circuit specific,
absolute hysteresis of approximately
4.4Y0
of the voltage difference
between comparator output (O V/5
V)
and input COMP+ (O V to 10
V)
must be considered.
3.6.3 Reading the Comparators and the
Gating
Logic
The two comparators are addressed under module address +5. The data bits O to 3 contain infor-
mation about the current comparator status. The data bits are identified by the characters A, B, C,
and D.
Read module address +5
D7
DO
1 1 1 1
D
c
B
A
Byte module address +7 not only specifies the analog input channel which is to be converted by
the ADC, but also specifies the status of the signals LOG and STROBE. The bit LOG switches the
gating
logic from rising to falling edge, while STROBE locks or releases an interrupt.
1P
243 Equipment Manual
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Function Description
R
02/92
Write to module address +7
D7
DO
4
LOG
STR
xxx22
2’
TT
~
ADC channel selection at multiplexer
IL
STROBE for comparator
gating
logic interrupt, signal
STR
O = locked, 1 = released
I
Changeover of
gating
logic, signal LOG
O = rising edge of comparator output, 1 = falling edge of comparator output
The default status of the STROBE signal is”1”.
Attention: The signals LOG and STROBE must be allocated together for both
comparators. Separate addressing is not possible.
3.6.4 Evaluation of the Comparator States
3.6.4.1 Representation of Comparator States
As already mentioned in section 3.6.3., information about current comparator status is read in
byte module address +5. In this case, only the bits 2°, 21, 22, and 23 (now represented by the
characters A, B, C, and D) are relevant.
D7
DO
1
11
1
D
c
B
A
Data bits
Data bits
Module address +5
DO = A and
D1
= B are allocated to comparator 1
D2 = C and
D3 = D are allocated to comparator 2
The status of the evaluative bits A, B, C, and D of the respective comparator and the pertaining
gating
logic depends on the input voltage at the comparator ( +comparator and –comparator)
and the selection of the signal states for LOG and STROBE. The individual possibilities are shown
in the table in section 3.6.4.2.
3 – 16
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3.6.4.2 Value Table for Comparators 1 and 2
Function Description
Signals Input voltage at
Bits
Status
comparators 1 and 2
Comparator
~M;g~ogic
STROBE
LOG
+
Comp
Comp
A/c
BID status 1 and 2
11
u,
U*
1
0
0
1
1 1
U*
u,
1
1
1
0
1
0
u, u,
1 1
0
0
1
0
u,
u,
o
1 1 1
0
1
u,
u,
1
0 0 0
0
1
U*
u,
1
1
1
0
0
0
u,
u,
1
1
0
0
0
0
U2
u,
o
1 1
0
Attention: The input voltages applied at the comparators are identified as U
1
and
U
2
in the value table where U
2
is always greater than U
1
.
Explanation of signal names:
STROBE:
LOG:
+
Comp:
Comp:
Enable/Inhibit a hardware interrupt in case of exceeding or dropping below the
setpoint
O = Interrupt inhibited
1
= Interrupt enabled
Changeover of the
gating
logic as a reaction (interrupt) to rising or falling edge (i.e.,
exceeding or dropping below a
setpoint).
O = Rising edge
1 = Falling edge
“+” input of the comparator with the rated input range O V to
+1
O V;
–“ input of the comparator with the rated input range O V to
+1
O V;
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3 – 17
Function Description
R 02/92
3.6.4.3 Explanation of the Value Table and the Individual Values
Some important deductions can be drawn from the value table presented below. A clear definition
of the status of the comparators and
gating
logic is dependent on the evaluation of “bits” A, B, C,
and D. The easiest way to evaluate the “bits” is to apply the conditions necessary to make the
status of one “bit” (i.e., either A or B, or C or D) equal to “O”.
Ntention:
The text of section 3.6.4.3 applies when STROBE = 1. If STROBE = O,
then
gating
logic 1/2 = O. The comparator outputs
comp.
1/2, however,
react the same way as when STROBE = 1.
A becomes O only if:
LOG = O and +
comp.
>
comp.
>
comp.
1
becomes 1
>
gating
logic 1
becomes 1
>
interrupt is possible
B becomes O only if:
LOG = 1 and +
comp.
<
comp.
>
comp.
1
becomes O
>
gating
logic 1
becomes 1
>
interrupt is possible
D becomes O only if:
C becomes O only if:
LOG = O and +
comp.
>
comp.
>
comp.
2
becomes 1
>
gating
logic 2
becomes 1
>
interrupt is possible
LOG = 1 and +
comp.
e
comp.
>
comp.
2
becomes O
>
gating
logic 2
becomes 1
>
interrupt is possible
Summarized statements:
Gating
logic 1/2 = 1 if LOG
<>
comp.
1/2
Comp.
1/2 = 1 if +
comp.
>
comp.
3 – 18
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243 Equipment Manual
@.SiemensA(31989,
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Function Description
Representation in the Time/Voltage
L
/
.-
– Comparator
Diagram
r
——
1
+ Comparator
L
rl
r
—-1
t
LOG
I
“Bits” A/C
1-
“Bits” B/D
1!1
L
Comp.
~
STROBE
Gating
logic
Interrupt
IR
S5
1
Interrupt
extension module
The signals LOG and STROBE were selected randomly for this example.
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Function Description
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3.7 Difference Amplifier (P Controller)
3.7.1 Input Signal Range and Amplification
Voltages in the range from – 10Vto + 10 V can be applied at the input of the two difference amplifi-
ers. The desired amplification is set via the trimming potentiometer. For each of the two P control-
lers, one trimming potentiometer is available on the module front plate, and amplification factors
from 1.1 to 20 can beset. The difference between the input voltages applied at P+ and P– is am-
plified.
3.7.2 Input Circuitry
Since the two P controllers are built as device amplifiers, both input values have the same polarity.
Input circuitry of the difference amplifiers (for each amplifier)
Difference +
Difference –
AR9/11
22
k~
22
k~
22
k~
I
M
arm
3.7.3 Circuitry Possibilities and Output Signal Range
The inputs and outputs of the difference amplifiers are routed to the analog jumpering block and
can be connected to other analog signals also running to this same soldering base. Amplifier input
values, for example, can be signals coming via the channels of the analog value conditioning cir-
cuits, or values provided by the digital/analog converters. Again, the respective output of the P
controller can be either applied to the digital/analog converter or to the comparators, or it can im-
mediately be used as an analog output. The output signal range of the difference amplifiers is
within
+1
O V.
3 – 20
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R02/92
Interrupt Processing
4
Interrupt Processing
4.1
General Conditions for Interrupt Processing
This section now covers specific characteristics of interrupt processing in relation to the individual
programmable controllers. Interrupt
jumpering
on the
1P
243 is described in section 5.7.
An interrupt can only be triggered by the comparators or the
gating
logic on the output side. The
condition for generating an interrupt is its enable by the signal STROBE. The corresponding pa-
rameter assignment is described in section 3.6, as well as a description of the switching of
gating
logic between rising edge and falling edge (signal LOG).
This makes alarm processing only possible when the
1P
243–lAA.. module is fully
configured.
4.2 Possibilities for Interrupt Processing
In principle, interrupts can be evaluated in any programmable controller which allows operation
with the
1P
243. In practice, however, this evaluation depends on the type of controller. Only with
the S5–115U/H and
S5–135U
with CPU 928A/B or with CPU 922, is direct access to the bus with
interrupt lines possible. For all other programmable controllers, a separate digital input module
with interrupt–generating capability must be used. This module must be externally wired with the
binary outputs of the
1P
243.
4.3 Direct Bus Access
Direct access to the interrupt lines is only possible for programmable controllers with
edge–
triggering. This means that the central unit reacts only to edge changes without regard to specific
status levels. This applies to allCPUSoftheS5–115U/H series, CPU 922 and the
928NB
CPUS of
the
S5–135U
series. If interrupts are triggered via direct bus access, the memory latch
D9
may
D@
be exchanged for the soldering base D9, included with delivery.
1P
243 Equipment Manual
@
Siemens
AG
1989, Order No: 6ES5
998-0KF21 4–1
Interrupt Processing
R 02/92
4.3.1
Interrupt Processing in the
S5-l15U/H
In the S5–115U with CPU 941A, interrupt lines
~Aand
~B
are available for CPU
941B,
942–7UH....
From CPU 942A/B on, the four interrupt
lines-~~,
~B,
~?
and
~Don,
which in-
terrupts can be initiated, are available. The two pins
IRF
and
~Gon
the
interrupt–jumper~g
block
X19may
not be used; they must always be grounded on M (pin 6). The same applies to
IRC
and
~Dwhen
CPU 941A is installed. Furthermore, all process interrupts which are not used must
be connected to grounding M. An organization block is allocated to each interrupt in the
S5–1 15U. The organization block must be programmed for interrupt evaluation. The following
relations apply:
Interrupt
~%
– OB 2
Interrupt
~B
– OB 3
Interrupt
~C
– OB 4
Interrupt
~D
– OB 5
Each interrupt line should be allocated to only one interrupt–generating
1P
243. In the case of
several accessing modules, it would require considerable software effort to determine which
1P
243 triggered an interrupt (no evaluation possible via peripheral byte
O!).
Attention;
Interrupt requests can be processed only in the central unit. The
interru
t program structure and
interrupt–OB
handling are found
~
in the 5–115U manual or the S5–115H manual.
Exception:
Alarm processing in the expansion device is possible with EG 701 –3
(from release
6ES5
701–31A13) or EG
186U,
when
Iigth
wave conductor
interfaces 6ES5307–3UA1 1 and
6ES5
317–3UA11 are used.
II
Example:
The two analog input channels AlO and All are compared with each other by comparator 1
(AIOto
+Comp.
and All to
-Comp.).
As soon as All exceeds the value of AIO, this is indicated by
a signal light connected to the binary output B02 of the
1P
243. At the same time channel A13 is
read in once in the interrupt program. The module starting address is given as 144, and interrupt
line
~Bisselected.
Only in the case of parameterization for falling edge can a reasonable evalua-
tion of the interrupt request be made.
4–2
1P
243 Equipment Manual
@ Siemens AG 1989, Order No:
6ES5
998-0KF21
R02/92
Interrupt Processing
The required solder connections on the
jumpering
block for analog signals are:
Front connector
S5 bus
Socket 6
Socket 5
Socket 4
Socket 3
Socket 2
Socket 1
Pin Signal
20 + 15 v
21-15 v
23 Maria
24
AV1
25
AV2
26
AV3
27
AV4
M
ma
,
Diff. Diff.
Comp. Comp.
amp. amp.
1
2
1
2
m
+-A
+–A
+- +-
4
4
4
10923121124
20
1! 17
31
+
32
AV1
-
D
16
AV2
9
15
AV3
*
~
14
AV4
A
D
13
Sensor
1 –
34AI0
2 –
35A11
36
A12
3 – 37A13
38A14
39
A15
40
A16
41
A17
Diff.
amp. =
Comp.
=
Chan.
=
21
22
Sog;gase
30
J
I
I
;2345678
-u<
DACI
12 bits
U(!.
DAC2
12 bits
A
r
DAC3
8 bits
v
m
D
Chan.
1
s
-
Chan.
2
ww
.
Chan.
3
+
ADC
-
Chan.
4
T
12 bits
w
-
Chan.
5
v
D
Chan.
6
*
Chan.
7
Difference amplifier
Comparator
Channel
4–3
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5
998-0KF21
Interrupt Processing
R 02/92
The pins of the binary signal/interrupt
jumpering
are connected as follows:
Front connector
~~
Signal
1
;24V
2
+24V
I
11
610
12 Bll
13 B12
14
613
15
614
16
615
17
616
16
617
Indicator light
3 BOO
@
4601
— 5602
6603
7604
8605
9606
10607
42 M
~ti
43 M
,ti
4–4
/’
S5 bus
/
-1
Binary input 2
m
Binary input 3
*
Binary input 4
Buffer
Binary input 5
Binary input 6
Binary input 7
1’‘‘
‘1
+
Comparator 1
=1
10-11
Comparator 2
9
I
Gating
logic 2
8
Sokk:ng base
12
Gating
logic 1
l?
7
1
r
:4
Q
D
Interrupt
driver
4
Binary output O
e
2
a
Binary output 1
*
5
4
Binary output 2
-
6
Memory
4
~p•
Binary output 3
*9
latch
D9
4
Binary output 4
*
12
4
Binary output 5
a
15
4
Binary output 6
*
16
4
Binary output 7
m
19
IP
243 Equipment Manual
@SiernensA(21989,
Order
No:
6E!35998-I)KF21
R 02/92
Interrupt Processing
The Step 5 program can have the following structure:
NETWORK 1
0000
0000 :
0001
:L KM 1
IXXXXXX
0003
:T PY 151
0004 :
0005 :
0006
:BE
(2!3s
NETWORK 1
0000
0000
:JU
FB X
0001 NAME :SAVE
0002 :
0003
:L
PY 149
0004
:T
m
100
0005
:AN F 100.1
0006 := F 102.2
0007
IA
F 102.2
0008
:JC
FB Z
0009 NAME
:INTERRUPT
OOOA
:
OOOB
:JU
FB Y
OOOC
NAME :LOAD
OOOD
:BE
FB Z
NETWORK 1
0000
NAME
:INTERRUPT
0005
0006
0007
0009
OOOA
OOOB
Oooc
OOOD
:L
a
102
:T
m
149
:L
KM 1
IXXXO1l
:T
E
151
:T
m
150
:L
Pw 150
:T
Fw 104
:BE
OB 1
for S5–115U
Enable Interrupt (“STROBE”=l ) and
Reaction to falling edge
(“LOG’’=1)
Interrupt
OB
forS5–115U
Save scratchpad flag
Load comparator states
Evaluate parameter bit “B”
Set flag for output
Interrupt reaction (S5–11
5U)
Load scratchpad flag
Interrupt reaction (S5–1
15U)
Write binary outputs
Read in A13
Select
ADC
Convert
ADC
Read
ADC
Store value
Attention: Save the scratchpad flag bytransferring itto a data block. Atthe
end, the
scratchpad flag must be read into the interrupt processing. The flag bytes
FY
200
to FY
255 are
defined as scratchpad flags.
1P
243 Equipment Manual
4–5
@
Siemens AG 1989, Order No: 6ES5 998-0KF21
Intermpt
Processing R 02/92
4.3.2 Interrupt Processing in the
S5–135U
with CPU 922 or CPU 928A/B
In the multiprocessor system S5–135U, the four interrupt lines
~A,
~B,
~G
and
ED
are
allocated to one CPU slot per tine:
CPU
1
Interrupt
IZRl
CPU 2 – Interrupt
~B
CPU 3
Interrupt IRC
CPU 4
– Interrupt
~D
An interrupt organization block OB 2 can be filed in each of the central modules.
Pttent
on
i
;
The presetting of data block DX O for “edge-triggered interrupt process-
ing” is mandatory to work with direct hardware interrupts. In the
S5–135U,
interrupt processing is also only possible in the central rack.
Exception:
Alarm processing in the expansion device is possible with EG 701–3
(from release 6ES5 701–3M13) or EG
186U,
when
Iigth
wave conductor
interfaces 6ES5307–3UA1 1 and 6ES5317–3UA11 are used.
~
Only
~
1P
243 should access an interrupt line. Otherwise, no evaluation or only limited
evaluation is possible (see also section 4.3.1).
See the appropriate equipment manual for a description of interrupt handling in the S5–135U with
CPU 922 or CPU 928A/B.
Example :
The S5–135U is operated with two central processors, (i.e., a
CPU
922
ad
a
Cpu
928AM.
com-
parator
of the
IP243
compares thetwovalues AVl and All (All to
+comp.,
AV1
to
–comp.).
The
+comp. of comparator 2 is connected with A12 which is compared with a user–specified value
(KF = +5000). As soon as the two analog input channel values exceed the correlated “setpoints”,
an interrupt is generated. In case of an interrupt from
gating
logic 1,
AV1
is read in at the ADC of
CPU 922 and a check is made to see
ifthe
value exceeds KF = + 3000. If so, an output is set. If
gating
logic 2 reports an interrupt, the binary inputs
B13
to
B15
of the
IP
243 are read into
CPU 928A/B. As soon as one of the inputs has the signal”1”, the output byte 4 is overwritten with
OOFFH.
The module starting address is given as 128, the parameter setting on rising edge.
4–6
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No:
6ES5
998-0KF21
R 02/92 Interrupt Processing
Analog signal jumpering:
IGzEEIl
Socket 6
Socket 5
Socket 4
Socket 3
Socket 2
Socket 1
Pin Signal
20 + 15 v
21 – 15V
23 M
ana
24
AV1
d
AV1
25
AV2
AV2
26
AV3
AV3
27
AV4
AV4
a
15
14
13
32 A05
33 M
ana
---ELI
34AI0
35 AH
36
A12
37
A13
38
A14
39
A15
40
A16
41
A16
Multiplexer
ww
*
Chan.
1
*
Chan.
2
T
Chan.
3
WI
I
1
Chan.
4
Chan.
5
~chan”
7
Diff.
amp. =
Comp.
=
Chan.
=
Difference amplifier
Comparator
Channel
ADC
12 bits
4–7
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5
998-0KF21
Interrupt Processing
Binary signal/interrupt
jumpering:
R 02/92
Pin Signal
No.
1 +24 V
2 +24 V
11
BIO
Binary input O
12 Bll
Binary input 1
13
B12
Binary input 2
14
B13
Binary input 3
Buffer
15
B14
Binary input 4
16
B15
Binaty
input 5
Binary input 6
~
17
B16
18
B17
Binary input 7
It
,4
>1
M
I
,,,
Comparator 1
. , 06-5
Comparator 2
~
Sold;;;g
base
!’
Interrupt
w~G
12
Gating
logic 2
I
driver
8for
+~F
Gating
logic 1
:
‘~
13
7S5-135U
-
K
;4
~~;&B
-R
15
and 922)
*
~B
– CPU
928AJB
16
*FA
– CPU 922
Indicator
light
--- 3BO0
4
BO1
5 B02
6 B03
7 B04
8 B05
9 B06
10 B07
42
M
,ti
43
M
~ti
~
Binary output O 2
~
Binary output 1
+
5
~
Binary output 2
4
6
-
9
Memory
~
Binary output 3
~
Binary output 4
a
12
latch D9
~
Binary output 5
*
15
~
Binary output 6
@
16
Binary output 7
t-
19
I
4–8
1P
243 Equipment Manual
@
Siemens AG 1989, Order No: 6ES5
998-0KF21
R 02/92
Interrupt
Processing
At first, the DX O for the CPU 928A/B and the CPU 922 must be parameterized for edge–triggered
interrupt processing. The DX O for the two central processors is as follows:
m
O : KH = 4D41 >
1 : KH = 534B
> Start identification
2 : KH = 5830
3 : KH = 0601
;Iock
identification/length
4 : KH = 2001
Edge–triggered interrupt processing
5 : KH = EEEE End identification
The user programs for the CPU 922 and for the CPU 928A/B can look like this:
QEL!
NETWORK 1
0000
OB
1 for CPU 922
0000 :
0001 :L
KM OIXXXXXX
Enable interrupt (“STROBE” = 1) and
0003
:T
PY 135
Reaction to rising edge
0004 :
(“LOG” = O)
0005 :
0006
:BE
Q!32
NETWORK 1
0000
0000
:JU
FB X
0001 NAME :SAVE
0002 :
0003
:L
PY 133
0004
:T
B
50
0005
:AN F 50.0
0006
:JC
FB Z1
0007 NAME
:INTERRUPT
922
0008 :
0009
:JC
FB Y
OOOA
NAME :LOAD
OOOB
:BE
Interrupt
OB
for CPU 922
Save scratchpad flag
Load comparator states
Evaluate parameter bit
“A’
Interrupt reaction (CPU 922)
Load scratchpad flag
1P
243 Equipment Manual
@SiemensA(31989,
Order
No:
6ES5
gg8-0KF21
4–9
Interrupt Processing
R 02/92
FB Z1
NETWORK 1
0000
NAME
:INTERRUPT
922
0005
0007
0008
0009
OOOA
Oooc
OOOD
OOOE
:L
KM OIXXXOO1
:T PY
135
:T
PY 134
:L
Pw 134
:L
KF +3000
:>F
.—
.—
Q 12.0
:BE
m
NETWORK 1
0000
0000 :
0001
:L
KM
OIXXXXXX
0003
:T
PY 135
0004 :
0005
:L
KF +4000
0007
:T
PW 128
0008
:BE
Q!32
NETWORK 1
0000
0000
:JU
FB X
0001 NAME :SAVE
0002 :
0003
:L
PY 133
0004
:T
a
60
0005
:AN F 60,2
0006
:JC
FB Z2
0007 NAME :lNTERRUPT 928A/B
0008 :
0009
:JU
FB Y
OOOA
NAME
:LOAD
OOOB
:BE
4 – 10
Interrupt reaction
(CPU 922)
Read in All
Select
ADC
Convert
ADC
Read
ADC
Load KF = +3000
Compare for excess value
Set output
OB 1 for CPU 928A/B
Enable interrupt (“STROBE”=l ) and
Reaction to rising edge
(“LOG’’=1)
Load KF = +4000
Write DAC1
Interrupt OB for CPU 928A/B
Save scratchpad flag
Load comparator states
Evaluate parameter bit “C”
Interrupt reaction (CPU 928A/B)
Load scratchpad flag
1P
243 Equipment Manual
@SiemensA(31989, order
No:
6ES5998-I)KF21
R 02/92
Interrupt Processing
FB Z2
NETWORK
1
0000
NAME
:INTERRUPT
928A/B
0005
0006
0007
0008
0009
OOOA
OOOB
Oooc
OOOD
OOOF
0010
Interrupt reaction
(CPU 928A/B)
Read binary inputs
Evaluate B13, B14,
B15
:L
PY 132
:T
m
65
:0 F 65.3
:0 F 65.4
:0 F 65.5
.—
-—
F 66.0
:AN F 66.0
:BEB
:L
KH OOFF
Load KH=OOFF
:T
QB
12
Overwrite
QB
12
:BE
For the saving and loading of scratchpad flags, the system organization blocks
OB
190 to
OB 193
in the CPU 922 and CPU 928A/B of the
S5–135U
can be used.
1P
24S Equipment Manual
@SiemensA(31989, Order No: 6ES5998-0KF21 4 – 11
Interrupt Processing
R 02/92
4.4 Separate Interrupt Input Module
If a programmable controller is designed for fundamental mode operation (level–triggered
mode), i.e., the CPU only reacts when a certain level is active on the interrupt lines, or if a control
without interrupt lines on the S5 bus is involved, interrupts can only be evaluated by means of a
separate binary input module with process interrupt generation. The
CPUS
of systems
S5–135U
(CPU 922 and CPU 928A/B when
parameterized
accordingly) and S5–155WH oPerate in
level–triggered mode. For devices without interrupt lines, the interrupt scan is made via the input
byte O. This applies to the
S5–150S
and
S5–150U
controllers. If interrupt processing is desired
for one of the aforementioned systems, replace the memory latch
D9
on the
1P
243 with the
soldering base
D9,
included with delivery. In addition an interrupt module is required.
4.4.1 Interrupt Processing in the
S5–135U
In the S5–135U programmable controller, both CPU 922 and CPU 928A/B operate in
level–
triggered mode. The
CPUS,
however, can also be
parameterized
for edge–triggered processing.
In case of level–triggered operation, the digital input module6ES5432–4UA11 must be addition-
ally inserted. On the
1P
243 module, the comparator outputs and the interrupt–generating out-
puts of the
gating
logic must be jumper–connected to the soldering base
D9,
which in turn is
connected with the binary outputs of the
1P
243. Furthermore, the jumper connections on the sol-
dering base X19 (pins 11, 12, 13, 14, 15 and 16 connected to grounding M, pin 6) may not be
changed from their original delivery condition. Then the binary outputs are externally connected
to the inputs of the interrupt module. The interrupt triggering is handled exclusively by the module
6ES5432-4UA1 1. A description is found in the appropriate equipment manual.
When working with a separate interrupt input module, the
1P
243 can
operate from any
1P
slot, whether in the central unit or in an expan– sion
unit. The interrupt module 6ES5432–4UA1 1, however, must always be
inserted in the central unit.
Several interrupts from one
1P
243 or from different IPs 243 can be routed to a digital module with
the capability of process interrupt generation.
Example:
In the
S5–135U
with CPU 922the two analog input values AIOand All are applied tothe difference
amplifier. The amplifier output runs to +comp. and is compared with –comp. which is connected
to the input
A16.
If the value at the
A16
channel exceeds the output voltage at the difference amplifi-
er, an interrupt is generated and a value which was previously filed in FW 120 is output at A02 via
DAC2.
The module address is given as 160; parameterization is for falling edge.
4 – 12
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5
998-0KF21
R 02/92 Interrupt Processing
Analog signal
jumpering:
Socket 6
Socket 5
Socket 4
Socket 3
Socket 2
Socket 1
Pin Signal
20 + 15 v
21 – 15 v
23 M
ma
24
AV1
25
AV2
26
AV3
27
AV4
28 AO1
29 A02
30 A03
31 A04
32 A05
33
M
ma
34
AIO
35 AH
36
A12
37
A13
38
A14
39
A15
40
A16
41
A17
M
ana
Elm
m
7T3-
10923 1211242019 1718
~:
L
‘:
31
32
AV1
16
AV2 15
AV3
14
Solderin
base
AV4
13
X2W?32
25
26
P
DAC1
21
12 bits
I’-El
DAC2
22
12 bits
4
27
*
28
Analog
a
output
*
29
r
-
DAC3
amplifier 30 8 bits
1 23 45678
Multiplexer
*
Chan.
O
w
-
Chan.
1
v
*
Chan.
2
w
D
Chan.
3
T
m
Chan.
4
~
ADC
12 bits
*
o
Chan.
5
9
Chan.
6
-lchan71
I
Diff.
amp. =
Comp. =
Chan.
=
Difference amplifier
Comparator
Channel
1
1P
243 Equipment Manual
@.SiernensA(31989,
Order
No:
6Es!j
998-I)KF21
4 – 13
Interrupt Processing R 02/92
Binary signal interrupt jumpering:
1 +24V
2 +24V
11
BIO
12 Bll
13
B12
14
B13
15
B14
16
S15
17
S16
IB
B17
Sinary input
1
D
Birmy
input.2
D
Binary input 3
-
Binary input 4
m
Binary input 5
m
Binwy input 6
D
Binary input 7
D
I
Wwwv
Buffer
3 BOO
4 BO1
5 B02
6 B03
7 B04
6 S05
9 B06
10 S07
i 61 234
51
Comparator 1
-
,0
~
11
Comparator 2
9
*
l#e~ruPt
*%G
9
Soldering base
{z
Gating
logic 2
F
6
X19
Gating
logic 1
m
13
*HY
7
{4
*TZ
15
*TZ
16
z
D9 I
r
I
I
m
I
Sinaty
w+.put
7
P
I
19
F-t
F-
L-
1
2
3
4
5
6
7
8
9
10
11
12
=4
0
1
2
3
4
I
+
5
6
7
.
.
.
.
.
.
Interrupt module
6ES5432-4UA1 1
4 – 14
IP
243 Equipment Manual
@SiemensA(31989,
Order
No:
6ES5
gg8-0KF21
R02/92
Interrupt Processing
On the interrupt module6ES5432-4UA1 1 various presetting are required. For the relevant input
in this case the setting “rising edge” was selected. The module address is given as 128. For a
more detailed description of interrupt procedures, see the appropriate equipment manual.
Simplified user program for scanning the interrupt inputs:
m
NETWORK 1
0000
0000 :
0001 :L
KM 1
IXXXXXX
0003
:T
PY167
0004 :
0005 :
0006
:BE
Q!3-2
NETWORK 1
0000
0000
:JU
FB X
0001 NAME :SAVE
0002 :
0003
:L
PW 128
0004
:T
Fw 114
0005
:L
Pw 130
0006
:T
FW 116
0007
:L
PY 165
0008
:T
Fw 110
0009
:AN F 110.1
OOOA
:A
F 114.0
OOOB
:JC
FB
Z
OOOC
NAME
:INTERRUPT
922
OOOD
:
OOOE
:JU
FB Y
OOOF
NAME
:LOAD
0010
:BE
w
NETWORK 1
NAME
:INTERRUPT
922
0005
:L
Fw 120
0006
:T
PW 162
0007
:BE
OB
1 for CPU 921
Enable interrupt (“STROBE” = 1) and
Reaction to falling edge
(“LOG” = 1)
Interrupt OB for CPU 921
Save scratchpad flag
Read in interrupt module
Read in interrupt module
Load comparator states
Evaluate parameter bit “B”
Evaluate interrupt input
Interrupt reaction (CPU 922)
Load scratchpad flags
Interrupt reaction (CPU 922)
Write DAC2
In addition, system organization blocks
OB
190 to
OB
193 are available in
CPUS
922 and 928A/B
for saving and loading the scratchpad flags.
1P
243 Equipment Manual
@
Siemens AG 1989, Order No: 6ES5
888-0KF21
4 – 15
Interrupt Processing R 02/92
4.4.2 Interrupt Processing in the
S5–150U/S
The systems
S5–150U/S
have no interrupt lines. In this case an interrupt signal is only possible
via evaluation of the peripheral byte O. For details of this procedure seethe appropriate equipment
manual.
An interrupt OB is allocated to each bit of the input byte O, as follows:
10.0 – OB 2
10.1 – OB3
10.2 – OB 4
10.3 – OB 5
10.4 – OB 6
10.5 – OB 7
10.6 – OB 8
10.7 – OB 9
In case of a signal change for a bit of IBO, a branch to the correlated interrupt block takes place.
Generally an interrupt module is used for interrupt generating (for the
S5–
150U this is the module
6ES5432–4UA1 1, and for the
S5–
150S it is the module6ES5432–3BA11 ). See the appropriate
equipment manual for specifications and operation.
On the
1P
243 itself, the memory latch
D9
must be replaced by the soldering base
D9.
The
interrupt–generating outputs of the
gating
logic are connected with the binary outputs BOO to
B07 via the soldering base
D9.
Then the outputs are externally connected with the inputs of a
binary input. The solder connections on soldering base Xl 9 remain in their original delivery state
(all interrupt lines to grounding M).
Attention:
With
the
systems
S5–150U/S,
interrupt
processing is only possible in an
expansion rack. The same applies to the use of IPs.
All interrupt–generating modules must be located in the same expansion rack.
Example:
In theS5–150U an
1P
243 is operated under the following conditions:
A value stored in
EJ!Y
78 is output on DAC2 and stored on the difference amplifier. Difference + is
connected with
AV3.
The amplifier output value is compared with the analog input channel
A15
at comparator 1, whereby
A15
is also read in on
ADC.
If
A15
is less than the value of the signal at
+comp,
A12
is first converted three times, then AV4 twice on the
ADC.
The module address is
given as 240; parameterization is for rising edge.A6ES5432-4UA11 interrupt module is used
and parameterized accordingly.
4 – 16
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
Interrupt Processing
R
02/92
Analog signal jumpering:
U(J
DAC3
8 bits
M
ma
Socket 6
Socket 5
Socket 4
Socket 3
Socket 2
Socket 1
.,
1109231211
?4
2019
718
21
L
22
~:
AV1
AV2
AV3
AV4
31
32
16
15
14
A
Pin Signal
20 + 15 v
21 – 15V
23 M,m
24
AV1
25
AV2
26
AV3
27
AV4
28 AO1 13
25
1r
Solderin
base
X291X f/2
3C
1
12345678
I
Hffwf
Multiplexer
[
ADC
12 bits
Chan.
O
Chan.
1
Chan.
2
Chan.
3
Chan.
4
Chan.
5
Chan.
6
Chan.
7
34 AlO
35A11
36A12
37
A13
38
A14
39
A15
40
A16
41
A17
Q
Diff.
amp. =
Difference amplifier
Comp.
=
Comparator
Chan.
=
Channel
4 – 17
IP
243 Equipment Manual
@
Siemens
AG 1989,
Order
No: 6ES5
998-0KF21
Interrupt Processing
R 02/92
Binary signal/interrupt
jumpering:
Pin Signal
No.
1 +24V
2 +24V
h
t
b
11
BIO
12
Bll
13
B12
14
B13
15
B14
16
B15
17
B16
18
B17
m
Binary input O
Binary input 1
m
Binary input 2
D
Binary input 3
0
Buffer
*
Binary input 4
D
Binary input 5
m
Binary input 6
Binary input 7 ,
w
T
m
T
I
Comparator 1
Comparator 2
Gating
logic 2
Gating
logic
1
3 BOO
3
Binary output O
4 BO1 Binary output 1
5 B02
Binary output 2
-6 B03
Binary output 3
7 B04
Binary output 4
8 B05
Binary output 5
9 B06
Binary output 6
D9
I
2
5
a
6
Jumpering
block
9-
for
interrupt processing
12
SIMATIC
S5
*
15
10 B07
4
19
42 M
43 M
~;
F+
F–
L–
1
2
3
4
5
6
7
8
9
10
11
12
r-r
I
1
I
+
4
5
--i
6
7
.
.
.
.
.
.
Interrupt Module
6ES5432–4UA1 1
4 – 18
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
R 02/92
Interrupt Processing
User
Proaram
m-l
NETWORK 1
0000 :
0001 :L
0003
:T
0004 :
0005
:T
0006
:L
0007 :
0008 :
0009
:L
OOOA
:T
OOOB
:
Oooc
:BE
0000
KM O1XXX1O1
PY
247
PY
246
PW 246
Fw 90
FW 78
PY
242
m
NETWORK 1
0000
0000
:JU
FB X
0001 NAME :SAVE
0002 :
0003
:L
PY
245
0004
:T
B
120
0005
:AN F 120.0
0006
:JC
FB Z
0007 NAME
:INTERRUPT
150
0008 :
0009
:JU
FBY
OOOA
NAME :LOAD
OOOB
:BE
1P
243 Equipment Manual
@
.Wrnens
AG
1989,
Order
No:
GE%
gg8-0KF21
OB
1 for
S5–150U/S
Enable interrupt (“STROBE”= 1) and
Reaction to rising edge
(“LOG’ ’= O); selection of channel A15
Convert
ADC
Read
ADC
Store
converted value
Load value to be converted
Write DAC2
Interrupt
OB
for S5– 150U/S
Save scratchpad flag
Load comparator states
Evaluate parameter bit “A”
Interrupt reaction (S5–150U)
Load scratchpad flag
4 – 19
Interrupt Processing
R 02/92
NETWORK 1
0000
NAME
:INTERRUPT
150
0005
:L
0007
:T
0008
:T
0009
:L
OOOA
:T
OOOB
:T
Oooc
:L
OOOD
:T
OOOE
:T
OOOF
:L
0010
:T
0011
:L
0013
:T
0014
:T
0015
:L
0016
:T
0017
:T
0018
:L
0019
:T
OOIA :BE
4 – 20
KM O1XXXO1O
PY 247
PY 246
PW 246
Fw 70
PY 246
PW 246
FW 72
PY 246
PW 246
Fw 74
KM 01)()()(011
PY 247
PY 246
PW 246
FW 76
PY 246
PW 246
FW 78
Interrupt reaction S5–1
50U/S
Select channel
A12
at the
ADC
Convert
A12
Read
A12
Store converted value
Convert
A12
Read
A12
Store converted value
Convert
A12
Read
A12
Store converted value
Select channel 3 (AV4) at the
ADC
Convert
A13
Read
A13
Store converted value
Convert
A13
Read
A13
Store converted value
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
R 02/92
Interrupt Processing
4.4.3 Interrupt Processing in the
S5–155U/H
With the S5–155U, the evaluation of interrupts is accomplished the same way as with the
S5–150U/S
(i.e., by scanning the input byte O
[S5–150U
mode]). The
S5–155U
system offers
the additional possibility of interrupt requests via interrupt lines, but it cannot be put to use directly
in connection with the
1P
243, as the hardware interrupts operate in level–triggered mode.
Proceed as described in section 4.3.2 when using a CPU 922 or a CPU 928A/B
(edge-
triggered) in PLC
S5-155U.
Indirect operation via the interrupt lines is possible, if the parameters in DX O were assigned
accordingly. This is only possible with an interrupt–capable, digital–input module to which the
desired
1P
243 signals are routed externally. The blocks OB 2 to OB 5 are defined as interrupt
blocks (S5-150U/S mode).
If interrupt evaluation in this manner is desired, see the S5–155U or S5–155H equipment
manual.
The evaluation of the input byte O is accomplished in the same way as in the
S5–
150U/S systems;
for each bit of input byte O, an interrupt OB is allocated where the respective interrupt reaction is
filed.
A process interrupt is always initiated by a binary input (e.g., from the interrupt module
6ES5
432–4UA11. Again, this input is set by one of the binary outputs of the
1P
243. On the
1P
243, the
memory latch D9 must be exchanged for the soldering base
D9
(included with delivery), which
serves as a connecting link between the binary signal/interrupt jumpering and the binary outputs.
The jumpers between the interrupt–line pins and the grounding contact M may not be altered
from their factory-delivered condition.
Attention: Operation of the
1P
243 and of the interrupt module 432-4 is possible in
the central or expansion rack. The
1P
243 and the interrupt module can also
be located in different module racks.
Example:
In the
S5–
155U system, the difference amplifier 2 of an
1P
243 is connected to a conditioned ana-
log value
AV1
and to the analog input channel A15. The output of the difference amplifier is
checked for exceeding or dropping below certain values. If the output exceeds a value furnished
by DAC2, previously filed in FW 190, then the output of the difference amplifier and the input
chan-
nel
AV1
are read in at the ADC and stored in the flag area. Depending on the signal status of the
binary input B12, either KF = +800 (status “O”) or KF = +1000 (status “l”) is active at DAC1. If the
respective value drops too low, a voltage of 5.85 V is output at
DAC3.
The module address is given
as 176; parameterization is for falling edge.
On the module 432–4, the presetting must be set according to the operating instructions.
4 – 21
IP
243 Equipment Manual
@
Siemens
AG 1989, Order No:
6ES5
998-0KF21
Interrupt Processing
R
02/92
Analog signal
jumpering:
Socket 6
Socket 5
Socket 4
Socket 3
Socket 2
Socket 1
Pin Signal
20 + 15 v
21 – 15 v
23 Maria
24
AV1
25
AV2
26
AV3
27
AV4
28 AO1
29 A02
30 A03
31 A04
32A05
33 M.M
34AI0
35A11
36A12
37A13
38A14
39A15
40A16
41
A17
DIff
DIff
Comp
Comp
amp amp
*
+l–A
1
2
+~A
+– +–
4
4
-
10923 1211242019 1718
30
~
DAC3
8
bits
I
12345678
4AA
AA
Multiplexer
‘“~
+
Chan
O
Chan
1
Chan
2
Chan
3
ADC
Chan
4
12 bts
Chan
5
Chan
6
Chan
7
Diff.
amp. =
Comp.
=
Chan.
=
Difference amplifier
Comparator
Channel
4 – 22
1P
243 Equipment Manual
@
Siemens
AG
1989, Order No: 6ES5
998-0KF21
R 02/92
Interrupt Processing
Binary signal/interrupt
jumpering:
2
+24
v
11 BIO
~
Binary input O
m
12
Bll
Binary input 1
13
B12
~
Binary input 2
14
B13
~
Binary input 3
15
B14
Buffer
D
Binary input 4
*
16
615
~
Binary input 5
m
17
B16 m
Binary input 6
D
18
B17
~
Binary input 7
iwlt
m
>1
M
I
,,,,
Comparator 1
.
,()
‘~:
Comparator 2
D
9
Solj:rp
base
:2
-Yz4
Gating
logic 2
D
8
I
D
-z
Gating
logic 1
D
13
0
Interrupt
7
driver
*W
~4
*
-7X
15 m
b7m
:6
eDim-
D9
3 BOO
~
Binary output O 2
4
BO1
~
Binary output 1
5-
5 B02
~
Binary output 2
0
.
6—
6 B03
~
Binary output 3
4
9
Jumpering
block
7 B04
~
Binary output 4
*
12 for
8 B05
~
Binary output 5
4
15
interrupt
9 B06
~
Binary output 6
,6 processing
*
10 B07
~
Binary output 7
,9
SIMATIC
55
42 M
...+
F+
F-
L-
1
2
3
4
5
6
7
8
9
10
11
12
0
1
2
3
+
4
5
6
71
.
.
.
.
.
.
Interrupt Module
6ES5432–4UA1 1
4 – 23
IP
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
Interrupt Processing
QJM
NETWORK 1
0000
R 02/92
OB 1 for
S5–155U
0000 :
0001 :L
KM
1lXXXXXX
0003
:T
PY 183
0004 :
0005
:L
Fw 190
0006
:T
PW 178
0007
:L
PY 180
0008
:T
m
192
0009
:A
F 192.2
OOOA
:JU
FB A
OOOB
NAME
:SIGNAL
1
Oooc
:AN
F 192.2
OOOD
:JU
FB B
OOOE
NAME
:SIGNALO
OOOF
:BE
NETWORK
1
0000
NAME
:SIGNAL
1
0005
:L
KF +1000
0007
:T
PW 176
0008
:BE
Enable interrupt
(“STROBE’’=1)
and
Reaction to falling edge
(“LOG’’=I)
Load stored value
Write
DAC2
Read binary inputs
Scan
B12
Value for
B12
= “1”
Scan
B12
Value for
B12
= “O”
Value for
B12
= “1”
Load KF=+1OOO if
B12
= “l”
Write
DAC1
H
NETWORK 1
0000
NAME
:SIGNAL
O
Value for
B12
= “O”
0005
:L
KF +800
Load KF=+800 if
B12
= “O”
0007
:T
PW 176 Write
DAC1
0008
:BE
m
NETWORK 1
0000
0000
:JU
FBX
0001 NAME :SAVE
0002 :
0003
:L
PY 181
0004
:T
B
194
0005
:AN
F 194.3
0006
:JC
FB Z2
0007 NAME
:INTERRUPT
2
0008 :
0009
:JU
FB Y
OOOA
NAME
:LOAD
Interrupt OB(S5–155U) at value drop
Save scratchpad flag
Load comparator states
Evaluate parameter bit “D”
Interrupt reaction at value drop
Load scratchpad flag
4 – 24
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
R 02/92
OOOB
:BE
QB_5
NETWORK 1
0000
0000
:JU
FB X
0001 NAME :SAVE
0002 :
0003
:L
PY
181
0004
:T
B
196
0005
:AN F 196.1
0006
:JC
FB
Z1
0007 NAME
:INTERRUPT
1
0008 :
0009
:JU
FB Y
OOOA
NAME
:LOAD
OOOB
:BE
FB
Z1
NETWORK 1
0000
NAME
:INTERRUPT
1
0005
0007
0008
0009
OOOA
OOOB
OOOD
OOOE
OOOF
0010
0011
FB Z2
:L
KM 1IXXX101
:T PY
183
:T PY
182
:L
PW 182
:T
Fw 200
:L
KM 1
IXXXO1l
:T PY
183
:T PY
182
:L
PW 182
:T
Fw 202
:BE
NETWORK 1
NAME
:INTERRUPT
2
0005
:L
KM 10010110
0007
:T PY
180
0008
:BE
1P
243 Equipment Manual
@ Siemens AG 1989, Order No: 6ES5 998-0KF21
Interrupt Processing
Interrupt
OB
(S5– 155U) at excess value
Save scratchpad flag
Load comparator states
Evaluate parameter bit “B”
Interrupt reaction at excessive value
Load scratchpad flag
Excess value:
Diff
>
DAC2
Enable interrupt (“STROBE
n
=l )
and select channel 5 at the
ADC
Convert output difference 2
Read output difference 2
Store value in FW 200
Select channel 3 at the
ADC
Convert
AVI
Read
AV1
Store value in FW 202
Value drop:
Diff
e
DAC1
Load 5.85 V =150 units
Write
DAC3
4 – 25
R 02/92
Putting into Operation
5 Putting into Operation
5.1
Basic Connector
Any of the three
1P
243 versions (i.e., with full or part configuration) has a basic connector which
provides the link to the
SIMATIC
S5 bus, and the S5 bus, respectively. This connector is located on
the upper half of the module.
d
bz
2
M
+5
v
4
PESP
6
AB O
CPKL
8
AB 1
-R
10
AB 2
-w
12
AB 3
WY
14
~A
AB 4
DBO
16
~B
AB 5
DB1
18
Fc
AB 6 DB2
20
~D
AB 7
DE33
22 AB 8 DB4
24
~F
AB 9
DB5
26
KG
AB 10 DB6
28
AB 11
DB7
30
32
M
Basic connector pin assignment
5.2 Front Plate and Front Connector
The required 43-way front connector is available in versions for crimp connection or screw
connection:
– Crimp connection:
Order No.
6XX3068
– Screw connection:
Order No.
6XX3081
1P
243 Equipment Manual
@
Siemens AG 1989, Order No: 6ES5
998-0KF21 5–1
Putting into Operation
Schematic diagram of the front connector:
R 02/92
+ 24
V
external
8 binary
outputs
8 binary
inputs
Ground
analog
Ground
analog
3 – BOO
4 – BO1
5 – B02
6 – B03
7 – B04
8 – B05
9 – B06
10 – B07
11 –
BIO
12 – Bll
13 –
B12
14 –
B13
15 –
B14
16 –
B15
17 –
B16
18 –
B17
19 –
Man.
.20 – + 15 v
21 – – 15 v
22
23
M...
24 – AVI
5analog
output
channels
Ground
analog
:::flog
channels
Ground
external
digital
5–2
~
27 –
AV4
I
H
28 – AO1
29 – A02
30 – A03
31 –
A04
32 – A05
33
M.
a
@—
@——
@—
@—
o—
o—
o—
o—
o—
o—
0—
0—
0—
0—
@—
0—
0—
0—
34-
AIO
0—
35 – All
0—
36 –
A12
37 –
A13
38 –
A14
39 –
A15
40 –
A16
41 –
A17
42 –
M.xt
43 –
M..
LED areen:
+ 24 V external existing, fuse okay
a
LED
ve
Ilow:
diaital
indication of
the
presentlv selected
analoa
channel at
w
LED 1 = 2°
LED 2 = 2’
LED 3 = 22
Measurina
sockets for
analoa
value
conditionmq
Socket 1: analog value acquisition 1
Socket 2: analog value acquisition 2
Socket 3: analog value acquisition 3
Socket 4: analog value acquisition 4
Socket 5: free measuring point of analog
signal routing
Socket 6:
c;;~~~ion
point for analog
Trimmina
DO
tentiometers for
analoa
value
acquisition. each with 4
trimmina
~otentio–
meters for zero
~oint
conditioning and 4
sockets for
multmlication
Trimmer: Working point analog value 1
Trimmer: Amplification analog value 1
Trimmer: Working point analog value 2
Trimmer: Amplification analog value 2
Trimmer: Working point analog value 3
Trimmer: Amplification analog value 3
Trimmer: Working point analog value
4
Trimmer: Amplification analog value 4
Trimmina potentiometers for
difference
amdifiers
Trimmer: Amplification difference amplifier 1
Trimmer: Amplification difference amplifier 2
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
R 02/92
Putting into Operation
5.3 Explanation of the Signal Names and Abbreviations
+24
V
M,fl
M
ana
BOO to 607
610
to
617
AW
to
AV4
AO1 to A05
AIO
to A17
&15
v
Supply voltage +24 V DC
O V reference potential (M from +24 V supply)
O V reference potential (analog)
Binary outputs O to 7
Binary inputs O to 7
Analog input channels 1 to 4 with analog value condition
Analog output channels
1
to 5
Analog input channels O to 7
Sensor power supply
Attention: No load should be hooked up to the sensor power supply of
unless it is ensured that the supply voltage doesn’t exceed U
p
=
+24
V
k
10’%.
and that the consumption does not exceed 50
mA
with a fully
configured system and 70
mA
with a partly configured version. If these
values are not observed, this can cause an overload of the
DC/DC converter and thus a function breakdown of the module.
i
Attention:
Do not connect Maria and
Meti,
since a separation between the analog
and the digital section must be maintained.
u
1P
243 Equipment Manual
@
%31TKMS
AG 1989, Order No: 6ES5 998-0KF21
5–3
R 02/92
5.4 Layout of Setting Elements and Jumpers
5–4
Jumper A–B closed: S5 central rack
open:
ex~ansion
rack
i
x5
X6
X8
x9
Xlo
3
R42
R38
R39
R44
R40
R45
R41
3
R50
R49
PP
18
10 A Q
,Vl
,V2
,V3
,V4
R
!
ma
Offaat
AVl
Amplification
AVl
Y&4
AV2
hplification AV2
Maat
AV3
hnplification
AV3
)ffaat
AV4
4mDlification
AV4
amplification difference 1
knplifcation difference 2
‘9
%=3
1
10
16 9
X19
n
INTERRUPT
JUMPERING
1
8
17
24
r
1
8
X29
X32
R81
R27
R82
R28
xl
25
RI
R46
R46 R47
m
Selection of the
input voltage range
0@
0-0-00 -0-0
UNI
Bi
10 V 20 V
m
0000
Offaat
iwlation
W#ar
Ei
olar
Amplifier
#
0
set DAC2 DACI
OAC2
OACI
Orraat
Amplification
amDlfier
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
R
02/92
Putting into Operation
5.5 Jumpering of the Analog Signals
5.5.1 Circuitry of the Analog Signal
Jumpering
The two soldering bases X29 and X32 (see section 5.1) form the basis for the
jumpering
of the
analog signals. Via these bases, by means of soldering in jumpers, the required analog signals or
the different internal module components can be connected in a user–specific way.
The following diagram shows all signals on the
jumpering
base which can be combined.
M
ma
Socket 6
Socket 5
Socket 4
Socket 3
Socket 2
Socket 1
Pin Signal
20 + 15 v
21 – 15V
23 M
~,
24
AV1
25
AV2
26
AV3
27
AV4
r
J
II
IEll=lFllcomp’l
*
I
+’-All
+:AII+’-II+2-I
F
109231 2112420 19 17 18
J
DAC1
31 21
12 bits
32
I
1234567 8
34 AlO
35A11
36A12
37
A13
38
A14
39
A15
40
A16
41
A17
R+
.rxv.
22 12 bits
30 DAC3
8 bits
HHHH
m
l--
Multiplexer
w
I I
II
e
Chan.
O
-
Chan.
1
m
*
*
Chan.
3
-
Chan.
4
h
Chan.
5
ADC
12 bits
——
Diff.amp.
= Difference amplification
Comp.
= Comparator
Chan.
= Channel
IP
243 Equipment Manual
@
Siemens
AG
1989, Order No: 6ES5
998-0KF21
5–5
Putting into Operation
R
02/92
5.5.2 Soldering Base Pin Assignment
The analog signal
jumpering
comprises the two 16–way soldering base X29 and X32 (see section
5.4, Layout of Setting Elements and Jumpers). The available 32 pins of the soldering bases have
the following signal assignment:
AR32: Socket 5 on front plate (free measuring wing point)
AR31: Socket 6 on front plate Maria
I
AR30: output of
DAC3
AR29: Analog output channel
A05
via an output amplifier
AR28: Analog output channel
A04
R
AR27: Analog output channel
A03
AR26: Analog output channel
A02
AR25: Analog output channel AO1
3231302928272625
I
1
2
I
Soldering base X29
-m’
222324192(
AR19: Input comparator 1 “-comparator”
k
~
AR24: Output difference amplifier 2
AR23: Output difference amplifier 1
AR22: output
DAC2
AR21 : Output
DAC1
AR20: Input comparator 1 “comparator”
AR18: Input comparator 2 “-comparator”
AR17:
Input comparator 2 “comparator”
5–6
1P
243 Equipment Manual
@
Siemens
AG
1989, Order No: 6ES5 998-0KF21
R 02/92
Putting into Operation
AR16:
Output analog value conditioning
AV1
socket 1
AR15: Output analog value conditioning
AV2
socket 2
I
AR14: Output analog value conditioning
AV3
socket 3
AR13:
Output analog value conditioning
AV4
socket 4
I I
I
AR9: Input difference amplifier 1 “ –difference”
1-
i
AR12:
Input difference amplifier 2”
+difference”
AR11: Input difference amplifier 2” –difference”
,—,
AR1O: Input difference amplifier 1 “
+difference”
I
161514131211109
I
34
-
n-)
Soldering base X32
6 78
L
I__
AR8: Analog input channel
A17/channel
7 of
ADC
AR7: Analog input channel
A16/channel
6 of
ADC
AR6: Analog input channel
A15/channel
5 of
ADC
AR5: Analog input channel
A14/channel
4 of
ADC
AR4: Analog input channel
A13/channel
3 of
ADC
AR3: Analog input channel
A12/channel
2 of
ADC
AR2: Analog input channel All/channel 1 of
ADC
AR1: Analog input channel AlO/channel O of
ADC
All analog components are designed in a way that the signals at the analog signal
jumpering
are
standardized in the ranges O V tol O V or
*1
O
V.
1P
243 Equipment Manual
@
.%31WIS
AG 1989, Order No: 6ES5
w8-0KF21
5–7
Putting into Operation
R
02/92
5.6 Jumpering of the Binary Signals
The binary signals are also conducted via a soldering base and can be interswitched in a
user–
specific way. If desired, the interrupt evaluation is also activated via the binary signal
jumpering.
The digital inputs and outputs can be directly read in or read out via the bus. For interrupt
processing, however, jumpers must be installed on the soldering base X19. The following
diagram shows the structure of the binary signal
jumpering:
,
r
$3
~
~
*
-
@
$-
@
$
~
@
~
.$
S5 bus
Pin Signal
No.
1 +24 V
2 +24 V
11
6[0
Binary input O
12
611
Binary input 1
w
13
612
m
Binary input 2 ?
14
B13
D
Binary input 3
Buffer
15
B14
Binary input 4
16
B15
*
Binary input 5
17
B16
o
Binary input 6
:
18
617
Binary input 7
1
,,1
~1
M
61 2 34 5
Comparator 1
D
10 Interrupt
Comparator 2
D9
Solci;~ng
base
11
*
driver
_~G
12
for
Gating
logic 2
D
8
S5-115U
D=
13
-
S5-135U
-~D
Gating
logic 1
714
~%3;B
*TC
15 and
CPU 922)
-m
16
-=
D9
10607
~
42
Meti
43 Mea
Binary output O
Binary output 1
Binary output 2
Binary output 3
Binary output 4
Binary output 5
Binary output 6
Binarv
outrwt
7
=1
6
Memory or
9
w%%$ase
12 processing
-::
“MAT’CS5
5–8
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
R 02/92
Putting into Operation
5.7 Interrupt
Jumpering
If an interrupt evaluation is intended, this is possible with the programmable controllersS5–11 5U/
H and
S5–135U
with CPU 928A/B or CPU 922 (or same CPUS in PLC
S5–155U)
via direct bus
access to the interrupt lines. All other control devices require an additional binary input module
with process interrupt generation and external wiring. In this case, the intermediate memory latch
D9 must be replaced with the soldering base D9, included in the delivery. A detailed description of
the procedures for interrupt processing with the
1P
243 is given in section
4.
Here, reference is
made only to the pin assignment of the soldering base relevant to the
jumpering
of interrupts.
1,
16+5
‘t4
+3
W 11109
I
123 45 6 78
I
1
>1
Interrupt line
IR~
Interrupt line
IR~
Interrupt line
IR~
lnterru~t
line
IR~
Interrupt line
IR~
Interrupt line
IR=
Output of comparator 1
Output of comparator 2
Soldering base X19
Output of
gating
logic 2
Output of
gating
logic 1
Grounding M
Binary input
B17
Binary input
B16
Binary input
B15
Binary input
B14
Binary input
B13
Binary input
B12
Binary input
Bll
Binary input BIO
Attention: At
delivety,
the jumpers are installed as shown in the diagram:
~
-
~
-
~
-
~
-
~
-
~
- M (Pins 16-15-14-13-11 -6)
If the
1P
243 is used in
SIMATIC
S5 systems with
Ievel–tri
gered
c?
interrupt processing, these jumpers must not be change .
1P
243 Equipment Manual
@SiemensA(31989, Order No: 6ES5998-0KF21 5–9
Putting into Operation
If.
however, the module
R 02/92
is
o~erated
with a different
rxo~rammable
controller
which
allow
interrupt processing directly via the bus, then the corresponding pins of the interrupt lines must be
free from their soldered connections. All unused interrupt lines must retain their jumper
connection with grounding M.
In the programmable controllerS5–115U, an interrupt is activated on interrupt line B via
gating
logic 1.
The following jumpers must be established on the soldering base:
.
——
IRA
IRB
IRC
IRD
IRF
IRG
Compl
Cornpz
1.6
15
14 13.12.11 .10
!?
II
I
I
LkdL-1‘“
1
2345678
BIo O V Bll O V
B14
B15 B16 B17
B12
O V
6130
V
M
%!?
gw
As already mentioned, for interrupt
jumpering
in
SIMATIC
S5 units without direct bus access,
memory latch
D9
must be replaced by the soldering base D9. This soldering base has the
following pin assignment:
1
20191817161514131211
Binary output
B07
Binary output
B06
Binary output
B05
Binary output
B04
Soldering base
D9
Binary output
B03
Binary output
B02
Binary output
BO1
Binary output BOO
Attention: To evaluate interrupts with an additional interrupt module, the
interrupt–
generating outputs of the comparators or the
gating
logic must be con-
nected by jumpers from the soldering base Xl 9 to base
D9
to the binary
outputs of the
1P
243. These outputs are then connected externally to the
binary input module with process–interrupt generation.
5 – 10
1P
243 Equipment Manual
@
.%31TWS
AG 1989, Order No: 6ES5 998-0KF21
R 02/92
Putting into Operation
5.8 Setting the Module Address
The module address is set via the DIP FIX switch on the soldering base X2 (see the layout of setting
elements in section 5.4). Addressing in the 1/0 area is between the starting addresses 128 and
248. The address displacement is 8 (i.e., a maximum of 16 modules can be addressed).
Example:
First starting address 144
Second starting address 152
It should be noted that when the
1P
243 is used in a central rack (S5–115U/H, S5–135U or
S5–155U/H), the jumper A–B must be closed. In an expansion device, the jumper A–B I?WX
remain open.
The soldering base X2 appears as follows:
Address bit
ADB
3
ADB
4
ADB
5
ADB
6
ADB
7
ADB
8
ADB
9
ADB
10
ADB
11
Jumper
1–18
2–17
3–16
4–15
5–14
6–13
7–12
8–1 1
9–lo
Address
23 = 8
24= 16
25= 32
26=64
27= 128{
26= 256
{
This jumper must always be installed in the
P area as the module address is always
~
128.
With
SIMATIC
S5, this
“umper
is only installed
d
when the module is a dressed in Q area.
29= 512
~
20 = 1024
J
With
SIMATIC
S5 these jumpers are
always open.
2“ = 2048
Attention: Only the programmable controllers S5–135U, S5–150U/S
S5–155U/H
are capable of addressing the Q area. The module must be
inserted in an expansion rack. The Q area comprises the start adresses
1P
243 Equipment Manual
@
Siemens AG 1989, Order No: 6ES5 998-0KF21
5 – 11
Putting into Operation
R
02/92
Addressing at the
SIMATIC
S5 system bus appears as follows:
SUB SUB SUB
ADB ADB ADB ADB ADB ADB ADB ADB ADB
,tix,,ins:
+
x
~
:$
‘-+
‘::6n
4 3 -
;;:
&!”&j\j’,i:-
:#J==:i;h:nQarea
Module startin address
7
section 7.5.)
(jumper setting
Example:
Setting of module address 144
10 – – – – – – –O 18
2
()..__
—41
7
30 – – – – – – –O 16
40 – – – – – – –o 15
5
o——————————
-014
60 – – – – – – –O 13
70 – – – – – – –o 12
80 – – – – – – –O 11
90 – – – – – – –o 10
Base X2 assignment
5 – 12
ADB
3
ADB
4
ADB
5
ADB
6
ADB
7
ADB
8
ADB
9
ADB
10
ADB
11
@
Jumper
2 17 -t 24 = 16 and
:
p’
Jumper 5 –
14
-+27
= 128 installed
=
25
corresponds to the Sf3tthlg
‘nodule
=
26
address
144 (in the P
areea)
=
27
=
28
=
29
=
210
=
211
1P
243 Equipment Manual
@
Siemens AG 1989, Order No: 6ES5 998-OKF21
R
02/92
Technical Specifications
6Technical Specifications
Binary Inputs:
Rated Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .
Number oflnputs . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Galvanic Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Voltage Corresponding to:
“O” Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
“l” Signal , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
InputResistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Current (’’l’’ Signal) . . . . . . . . . . . . . . . . . . . . .
DelayTime . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Polarization Protection . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Permissible Cable Lengths:
– Unshielded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–Shielded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt–Generating Inputs (Optional)
Binary Outputs:
NumberofOutputs . . . . . . . . . . . . . . . . . . . . . . . . . . .
Outputvoltage
– Nominal Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–ForSignal
”O”
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–ForSignal
”l” . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output CurrentforSignal “1”
– Nominal Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
– Permissible range . . . . . . . . . . . . . . . . . . . . . . . . . .
Residual CurrentforSignal “O” . . . . . . . . . . . . . . . . .
Total Switching Current . . . . . . . . . . . . . . . . . . . . . . .
Switching FrequencywithoutLoad . . . . . . . . . . . . .
Galvanic Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Fuse (Externa124VSupply) . . . . . . . . . . . . . . . . . . .
Short-CircuitProtection . . . . . . . . . . . . . . . . . . . . . .
Maximum Permissible Cable Lengths:
–Unshielded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24VDC
8
no
open–circuitedor
–5Vto5.l
V
12.7vto30v
typically
lOkQ
typicaliy2.5mA
typicaily2.7msec
yes
400m
1000m
8
24V
maximumof3V
minimum of–l.9V
200mA
2t0200mA
maximumof250@
maximumof600mA
maximumofl kHz
no
0.8 A, medium slow
fuse
.
.
.
.
.
.
.
.
.
.
400m
–Shielded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1000m
lP243 EquipmentManual
@S@mensAG 1989,0rderN0:6ES5 998-0KF21 6–1
Technical Specifications
R
02/92
Analog Inputs:
Input Signal Ranges . . . . . . . . . . . . . . . . . . . . . . . . . .
*5
V
+1
o v
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
o v to +10 v
Number of Inputs . . . . . . . . . . . . . . . . . . . . . .. .....8
Digital Representation of Input Signal 11 bits and sign or 12 bits
Measuring Principle . . . . . . . . . . . . . . . . . . . . . . . . . . successive approximation
Galvanic Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . no
Conversion Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
35
psec.
1
Input Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . approximately 1
Mf2
Permissible Voltage between Input
and Earth (Destruction Limit) . . . . . . . . . . . . . . . . . .
*35
V
Maximum Permissible Voltage between
Two Inputs (Destruction Limit) . . . . . . . . . . . . . . . . . .
*35
V
Linearity Error. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
s
~3.1
0
–4
Zero Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
<
*5.1
0–4
Temperature Error . . . . . . . . . . . . . . . . . . . . . . . . . . . .
~
*3.1
0–5 pro Kelvin
Basic Error Limit (DIN 43745) . . . . . . . . . . . . . . . . . .
stO.6%0
Operational Error Limit
(between 0° C and +55° C) (DIN 43745) . . . . . . .
s&l.2%.
Maximum Permissible Cable Length
–Shielded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20m
12-Bit Analog Output:
Input Signal Range . . . . . . . . . . . . . . . . . . . . . . . . . . .
*1O
V
bipolar
Number of Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Digital Representation of Output Signal . . . . . . . . . 11 bits and sign
Galvanic Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . no
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A5
mA
Burden Resistance . . . . . . . . . . . . . . . . . . . . . .. ....22
kQ
Burden Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . burden connected to OV
Short-Circuit Protection . . . . . . . . . . . . . . . . . . . . . . yes
Short-Circuit Current . . . . . . . . . . . . . . . . . . . . . . . . .approximately 25
mA
Settling Time to 99% of Rated Output
Value for a Cable Length of 20 M .. . . . . .. .......5
psec.
Linearity Error. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
<
*3.1
0–4
Zero Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
s
~5.10–4
Temperature Error . . . . . . . . . . . . . . . . . . . . . . . . . . . .
<*2.1 0–6 pro Kelvin
Basic Error Limit (DIN 43745) . . . . . . . . . . . . . . . . . .
<&O.6%0
Operational Error Limit
(between 0° C and +55° C DIN 43745) . . . . . . . . .
s~O.85%0
Maximum Permissible Cable Length
–Shielded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20m
I
Thecommand processing
times for the selection of
measuring points and the
start of coding are not
included here.
6–2
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5998-OKF21
R 02/92
Technical Specifications
8–Bit Analog Output:
Output Signal Range . . . . . . . . . . . . . . . . . . . . .. ...0 V to +10 V,
unipolar
Number of Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Digital Representation of
Output Signal . . . . . . . . . . . . . . . . . . . . . . . . .. ......8 bits
Galvanic Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . no
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*5
mA
Burden Resistance . . . . . . . . . . . . . . . . . . . . ... ... .>2
kQ
Burden Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . burden connected to O V
Short-Circuit Protection . . . . . . . . . . . . . . . . . . . . . .
temporary
Short-Circuit Current . . . . . . . . . . . . . . . . . . . . . . . . . undefined
Settling
Time
tO
9W0
Of
Rated Output Value for a
Cable Length of 20 M . . . . . . . . . . . . . . . . . . . . . . . . . 10
psec.
Basic Error Limit (DIN 43765) . . . . . . . . . . . . . . . . . .
s*2%
Operational Error Limit
(between 0° C and +55° C) (DIN 43765) . . . . . . . .
s*4%
Maximum Permissible Cable Length
–Shielded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20m
Analog Output Amplifier
Output Signal Range . . . . . . . . . . . . . . . . . . . . . . . . .
A1OV
bipolar
Number of Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Galvanic Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . no
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.i5
mA
Burden Resistance . . . . . . . . . . . . . . . . . . . . . .. ....22
kQ
Burden Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . burden connected to O V
Short-Circuit Protection . . . . . . . . . . . . . . . . . . . . . . yes
Short-Circuit Current . . . . . . . . . . . . . . . . . . . . . . . . .approximately 20
mA
Maximum Permissible Cable Length
–Shielded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20m
8–Bit Analog Output with Analog Amplifier Series:
Output Signal Range . . . . . . . . . . . . . . . . . . . . . . . ..0 Vto 10 Y
unipolar
Number of Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Digital Representation . . . . . . . . . . . . . . . . . . . . . . . . 8 bits
Galvanic Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . no
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
L5
mA
Burden Resistance . . . . . . . . . . . . . . . . . . . . . . .. ....22
k!2
Burden Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . burden connected to O V
Short-Circuit Protection . . . . . . . . . . . . . . . . . . . . . . yes
Short-Circuit Current . . . . . . . . . . . . . . . . . . . . . . . . .approximately 20
mA
Settling Time to 99% of Rated Output
Value for a Cable Length of 20 M . . . . . . . . . . . . . . . 10
psec.
Error Limit at 25° C . . . . . . . . . . . . . . . . . . . . . . . . . . .
s
~0.2%
Error Limit between 0° C and +55° C
s
tO.4Y0
Maximum Permissible Cable Length
–Shielded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20m
1P
243
Equipment Manual
@
Siemens AG 1989, Order No: 6ES5
998-0KF21 6–3
Technical Specifications
R
02/92
Analog Value Conditioning Circuits:
Input Signal Range . . . . . . . . . . . . . . . . . . . . . . . . . . .
~10
V
Number oflnputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Galvanic Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . no
Input Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . typically 200
kQ
Input Time Constant . . . . . . . . . . . . . . . . . . . . . . . . . . typically 110
psec.
Setting Range for Zero Displacement –2 Vto +2 V
(Operating Point)
Amplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 to 5
Voltage between Input and
0 V Connection (Destruction Limit) . . . . . . . . . . . . . maximum .&35 V
Difference Amplifier (P controller):
Input Signal Range . . . . . . . . . . . . . . . . . . . . . . . . . . .
~10
V
Output Signal Range . . . . . . . . . . . . . . . . . . . . . . . . .
A1OV
Number of Controllers . . . . . . . . . . . . . . . . . . . . . . . . 2
Galvanic Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . no
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . &5
mA
Amplification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 to 20
Input Time Constant . . . . . . . . . . . . . . . . . . . . . . . . . . typically 500
psec.
Input Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . typically 1
MQ
Burden Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . .
22
kQ
Short-Circuit Protection . . . . . . . . . . . . . . . . . . . . . . yes
Short-Circuit Current . . . . . . . . . . . . . . . . . . . . . . . . .approximately 50
mA
Voltage between Two Inputs
(Destruction Limit) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
*35
V
Voltage between input and
0 V connection (Destruction Limit) . . . . . . . . . . . . . .
*35
V
Comparators:
Input Signal Range . . . . . . . . . . . . . . . . . . . . .. .....0 V to +10 V
Number oflnputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Input Time Constant . . . . . . . . . . . . . . . . . . . . . . . . . . typically 250
psec.
Input Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . typically44
kQ
Voltage between Two Inputs
(Destruction Limit) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
maximumi35
V
Voltage between Input and
OVConnection (Destruction Limit) . . . . . . . . . . . . .
~35V
Interrupt–Generating Option
6–4
1P
243 Equipment Manual
@
Siernens
AG
1989,
order
No:
6E.S5998-I)KF21
R 02/92 Technical Specification
Power Supply Voltage UP:
Rated value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24VDC
Ripple
U~~
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . maximum 3.6 V
Permissible Range (Including Ripple) .. . . .......20 Vto 30 V DC
Value for t
e
0.5 sec. . . . . . . . . . . . . . . . . . . . . . . . . . maximum 35V
Current Consumption:
Internal +5 V Supply . . . . . . . . . . . . . . . . . . . . . . . . . typically 600
mA
External +24 V Supply
(without Sensor Power Supply
and Total Switching Current) . . . . . . . . . . . . . . . . . . . typically 270
mA
External Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . +20 V DC to +30 V
Power Loss
–Full Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.8 W
(6ES5243-lAA1 1)
–Part Configuration, Al Only .. .................4.6 W
(6ES5243-lAB1l)
–Part Configuration, AO Only .. ................6.1 W
(6ES5243-lACI 1)
Mechanical Data:
Dimensions
(W
x H x D) . . . . . . . . . . . . . . . . . . . . . . . 20 mm x 244 mm x 202 mm
Mounting Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1/3 SPS =
1
module slot
Weight . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
approximately 0.46 kg (6ES5243-lAA11)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
approximately 0.38 kg (6ES5243–lAB11)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
approximately 0.39 kg
(6ES5
243–1AC11 )
Ambient Conditions:
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . 0° to +55° C
Storage and Transport Temperature . . . . . . . . . . . . –40° to +70° C
1P
243 Equipment Manual
@
Siemens AG 1989, Order No: 6ES5
998-0KF21 6–5
Technical Specifications R 02/92
6.1
Programmable Controller
Slot
Designa-
in Module Rack
_
Q
ORerationoflp 243
inthkslot~ossible
Ps
CPU
I
o
I
1
2 3
IM
CR
700–OIA
Ps
CPU
I
o
CR
700–OLB
Central
Controller
Ps
CPU
CR 700–1
S5–115U
Ps
CPU
I
o
CR 700–2
Ps
CPU Io
CR 700–3
Expansion
Device
Central Controller S5–1
35L
Central Controller S5–1
55L
3
Expansion Device
S5–183U
Expansion
Device
S5–
1841
Expansion
Device
S5–
1851
Expansion Device@
3
I
19
131 I
147
63
S5–186U
1
: The
1P
243 analog module cannot be inserted in central unit S5–150U/S or in ‘:
expansion devices ER 701 –1, ER 701 –2, and
187U.
1. Interrupts can be processed in expansion devices starting at release
6ES5
701–31A13 when
optical fiber links 6ES5307–3UAI 1 and 6ES5317–3UA11 are used.
2. Functionality very restricted since no interrupt lines available
3. Functionality restricted since not all interrupt lines available
4. Changing of jumpers on the bus PCB is required.
6–6
1P
243 Equipment Manual
@ Siemens AG 1989, Order No:
6ES5
998-0KF21
R 02/92
Table of Contents
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
7.4
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.4.6
7.4.7
7.4.8
7.4.9
7.5
7.5,1
7.5.2
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Function Block
FB160(PER:ANL)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.
Function Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Calling the Function Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Explanation ofParameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ParameterAssignment
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data
AreaAssignment
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Function
BlockApplication
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Function Block
FB161
(PER:ANS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Function Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Calling the Function Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Explanation ofParameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ParameterAssignment
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data
AreaAssignment
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Function
BlockApplication
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Device Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JumperAssignmentoftheAnalog Module . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Assignmentofthe lnputsand Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Turn–On, Start-UpBehavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reading the Binarylnputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reading theAnalogValue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Checking theComparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Writing the Binary Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Writing theAnalogValue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ProgrammingWithoutFB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AddressAssignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reading and Writingthelnputs and Outputs . . . . . . . . . . . . . . . . . . . . . . . . . .
7–1
7–2
7–2
7–2
7–3
7–4
7–4
7–5
7–6
7–7
7–7
7–7
7–8
7–8
7–9
7–lo
7–11
7–12
7–12
7–13
7–14
7–15
7–15
7–16
7–17
7–17
7–18
7–19
7–19
7–20
lP248 EquipmentManual
@SiemensAG 1989,
OrderNo:
6ES5998-0KF21
7–1
R02/92
Programming Instructions
7.1
Overview
These programming instructions describe the following standard function blocks:
FB 160 (PER:ANL)
“Read analog module”
FB 161
(PER:ANS)
“Write analog module”
The function blocks, together with the
1P
243 analog module,
are used in the following programmable controllers.
FB 160
FB 161
PLC/CPU
xxS5-115U (CPU 941A/B to CPU 944A/B)
xxS5-115H (CPU 942–7UH...)
xx
S5-135U
(CPU 922, CPU 928A/B)
xx
s5-150u/s
xx
S5-155U/H
These programming instructions require users to be familiar with sections 1 through 6 and with
the programmable controllers they are using.
The following example shows a test assembly (with the analog module
1P 243)
for easily testing
the jumper assignments and functions. This test program can also be used as the basis for a fu-
ture automation task.
The
S5–DOS
floppy disk contains the files of the function blocks with example, and the English
and French commentary blocks for the respective programmable controllers.
I
File
Function Block Commentary Block
PLC
S5–
German
English French
S5MXXXSTS5D ECMXXXSTS5D FCMXXXSTS5D
115U/H S5MA50ST.S5D
ECMA50ST.S5D FCMA50ST.S5D
135U
S5MB22ST.S5D ECMB22ST.S5D FCMB22STS5D
15ou/s
S5MA40STS5D
ECMA40ST.S5D
FCMA40STS5D
155
U/Ht)
S5MA60ST.S5D
ECMA60ST.S5D FCMA60ST.S5D
Copy the commentary block to the
S5MXXXSTS5D
file to obtain the commentary in your language
when the example is printed out. Use the
S5MXXXDR.INI
for the printout.
The appropriate title block file are:
S5MX)O(F1
.INI
ECMXXXF1
.INI
FCMXXXF1
.INI
1) Use the
XXMB22STS5D
files when a CPU 922 or 928A/B is used in
PLC
S5–155U.
1P
248 Equipment Manual
@
.%311WIS
AG 1989, Order No: 6ES5 998-0KF21
7–1
Programming Instructions
R 02/92
7.2 Function Block FB 160
(PER:ANL)
7.2.1 Function Description
The function block “Read analog module” (when the module is outfitted accordingly) accepts the
selected analog value and outputs it either as a bit pattern, the way it arrives from the module, or as
a 16–bit fixed point numeral, standardized to the respective nominal value.
Furthermore, the binary inputs and the comparator outputs can be read with this function block.
Prior to reading the comparator outputs, the
gating
logic is switched over.
Function
FB 160 reads the analog and binary inputs, switches over the
gating
logic and reads the com-
parator outputs.
7.2.2 Calling the Function Block
In the
STL
(statement list):
S5-115U/H
NAME
BGKN
BT
NORM
DEL
KP L
LOG
STR
ADU
DE
KOMP
PAFE
:JU
FB160
:PER:ANL
S5–135U
s5-150u/s
S5-155U/H
:JU
FB160
NAME
:PER:ANL
BGKN
:
P/Q :
BT :
NORM :
DEL :
KP L :
LOG :
STR
:
ADU
:
DE :
KOMP
:
PAFE
:
In the
IAD/CSF
(Ladder diagram/
control system flowchart)
FB 160
PER:ANL
BGKN ADU
BT DE
NORM KOMP
DEL
PAFE
KP L
LOG
STR
FB
~60 PER:ANL
BGKN ADU
P/Q
DE
BT
KOMP
NORM
PAFE
DEL
KP L
LOG
STR
7–2
1P
243 Equipment Manual
@ %3fIN3flS AG 1989, Order No: 6ES5 998-0KF21
R
02/92
Programming Instructions
7.2.3 Explanation of Parameters
I
NAME
I
CLASSI
TYPE
I
DESIGNATION
I
I
BGKNI D
I
KY
I
Specificationof
themoduleaddressand channel number
I
I
P/Q
I
D
I
KS
I
Specification
ofl/Oarea
I
BT
I D I ‘F
I
Specification of module type (nominal range)
I
NORMI I
I
BI
I
Switchovertoinputof
standardizedvalues
I
I
DEL
I
I
I
BI
I
Readdigitalinputs
I
I
KPL
I
I
I
BI
I
Readcomparatoroutputs
I
I
LOG
!
I
!
BI
!
Switching over the
gating
logic
I
I
STR
I
1
I
BI
I
Enable signal
forcomparator
interrupt
I
I
ADU
I
Q
I
W
I
Analogvalueoutput
I
I
DE
I
Q
I
BY
I
Outputtingthedi$jitalinputs
I
I
KOMPI Q
I
BY
I
Outputtingthecomparatoroutputs
I
I
PAFE
I
Q
I
Parameterization error
1
This parameter is not available on the S5–115U/H
addressed in the P area.
1P
248 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
programmable controller.
It can only be
7–3
Programming Instructions
R 02/92
7.2.4 Parameter Assignment
BGKN
: KY = x, y x = Module address
128< X
~
248
for P/Q :
KS=P
0< X
<248
for P/Q: KS=Q
y = Channel number
o5y57
P/Q :
BT :
PAFE :
KS = P
Normal 1/0 area
KS = Q
Expanded 1/0 area
KF = X
Module type; Specification of the nominal range
x = O
unipolar
O V to
10
v
x = 1 bipolar –10 V to +10 V
x = 2 bipolar –5 V to +5 V
In case of illegal parameterization the signal status is”1”. The recog–
nized error is then shown by the assignment of the flag byte
FY
255:
F 255.0
F 255.1
F 255.2
F 255.3
F 255.4
F 255.5
F 255.6
F 255.7
The module address is outside of the specified area or is
not within the 8–bit grid pattern
(first part of parameter
BGKN)
The
parameter
P/Q is not set with ‘P-’ or
‘Q-’.
(Does not apply to programmable controller S5-115U/H.)
QVZ, no module found under this address.
(first part of parameter
BGKN)
(only set with
S5-155U/H)
The channel number is outside the specified range
(second part of parameter
BGKN)
The parameter BT is outside the specified range.
7.2.5 Data Area Assignment
No data blocks are addressed.
Addressing the Module in S5–155/H
For proper operation of the function block, the analog module
1P 243
must be addressed in the
address range from KH =
FF080
to KH =
FF1
FE
This corresponds to the 1/0 area from
KH =
FF080
to KH = FFOFF (byte number 128 to 255) and to the Q range from KH = FF1OO to
KH =
FF1
FF (byte number O to 255).
7–4
1P
243 Equipment Manual
@
Siemens
AG
1989, Order No: 6ES5 998-0KF21
R
02/92
7.2.6 Technical Specifications
Programming Instructions
Block no. 160
Block name PER:ANL
PLC
S5–
115U 135U
15ou/s
155U
Library no. P71200–S...
51 60–A–2 9160–A–1 4160–A–1 61 60–6–1
Call length (in words)
13
14
Block length (in words) 165 180
222
Processing time
(in msec)
CPU 941A/B CPU 922
Without standardization
8.2/4.9
1.8
0.4 0.69
With standardization
11.115.9
2.1
0.5 0.74
CPU 942A/B CPU 928A/B
Without standardization
5.4/4.9
1 .1/1.0
With standardization
6.4/5.9
1 .2/1.1
CPU 943A/B
Without standardization 3.3/4.1
With standardization
4.5/5.5
CPU 944A/B
Without standardization
0.5/0.3
With standardization 2.1/1 .7
Nesting depth
1
0
Blocks called
FB 242
(inte-
None
grated in
PLC)
Data areas used
Flag areas used
FY
238 to
FY
244 to
FY
255
FY
255
System instructions None
Other
1)
I
I
2)
1) Interruptions (interrupts and wake–up alarms) are temporarily disabled in the block with the
AS/AF
commands. This cancels out any “AS” command which you may have programmed.
2) All interruptions (process alarms, interrupts and wake–up alarms) are disabled in the block
for approximately 42 pee.
1P
243 Equipment Manual
@
Siemens AG 1989, Order No: 6ES5 998-0KF21 7–5
Programming Instructions
R 02/92
7.2.7 Function Block Application
The module basic address and the channel number for the analog value are specified by parame-
ter BGKN. Depending on the channel number, the function block reads an analog value from the
module and outputs it at parameter
ADC.
The representation of the analog value depends on the NORM parameter:
NORM = “O”:
The analog value read at the module is output unchanged at parameterADC (as a
bit pattern according to the description in the operating instructions).
NORM = “1“
The analog value read at the module is converted to the nominal range. The nomi-
nal range is defined by the values at parameter
BT
The conversion formulas are:
for BT = O (Nominal range O V to 10 V):
20000
ADC
= rough value x
~192
for BT = 1 (Nominal range –10 Vto +10 V):
20000
ADC
= rough value x
~096
for BT = 2 (Nominal range –5 V to +5 V):
20000
ADC
= rough value x
~192
The analog value is output as a 16–bit fixed–point numeral for the unit
mv.
When parameter DE–L has the signal status”1”, the binary module inputs are read and then out-
put at parameter DE. If the module has no binary inputs, signal status “O” is output to all bits.
When parameter KP–L has the signal status”1”, the comparator outputs of the module are read
and then output at parameter
KOMI?
The bits now required, LOG and
STR,
are set in accordance
with the parameters LOG and
STR,
and they are transferred to the module during channel selec-
tion.
7–6
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
R 02/92
Programming Instructions
7.3 Function Block FB 161
(PER:ANS)
7.3.1 Function Description
The function block “Write analog module” either transfers a specified bit pattern or a 16–bit
fixed–point numeral, standardized to the nominal value, to the module. The function block can
also control the binary outputs if the module is outfitted accordingly.
Function
FB
161 outputs an analog value and the 8 binary outputs.
7.3.2 Calling the Function Block
In the STL (statement list):
S5-115U/H
:JU
FB161
NAME
:PER:ANS
BGKN
:
NORM :
DAC
:
DAS
:
DA :
PAFE
:
In the IAD/CSF (Ladder diagram/
control system flowchart):
FB 161
n
PER:ANS
BGKN PAFE
NORM
DAC
DAS
DA
S5-135U,
S5-150U/S,
S5–155U/H
:JU
FB161
NAME
:PER:ANS
BGKN
:
P/Q :
NORM :
DAC
:
DAS
:
DA :
PAFE
:
FB 161
r
PER:ANS
BGKN PAFE
P/Q
NORM
DAC
DAS
DA
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21 7–7
Programming Instructions
R 02/92
7.3.3 Explanation of Parameters
NAME
I
CLASS I TYPE
I
DESIGNATION
1
1
I
I
BGKN
I
D
!
KY
!
Specification of the module address and channel number
I
.
P/Q
I
D
I
KS
I
Specification of 1/0 area ‘
I
NORM I I
I
BI
I
Switchovertoinputof
standardizedvalues
I
1
DAU
I
w
Specification of the 1/0 area
DAS
I
BI
Write digital outputs
DA
I
BY
Specification of the digital outputs
1
,
PAFE
Q
I
BI
I
Parameterization
error
I
1
This parameter is not available on the
S5–1
ICW+
Pmwrnrnable
controller.
[t
can
oniY
be
addressed in the P area.
7.3.4 Parameter Assignment
BGKN
:
KY
= X,
y
x
=
Module address
128< X
<248
for P/Q : KS=P
O
<X<
248
for P/Q:
KS=Q
P/Q :
PAFE
:
y
= Channel number
o<y57
KS = P Normal 1/0 area
KS = Q
Extended 1/0 area
In the event of illegal
parameterization,
the signal status is”1”. There-
cocmized
error is then indicated
bv
the assignment of the
flag
byte
FY
-
255:
F 255.0
F 255.1
F 255.2
F 255.3
F 255.4
F 255.5
F 255,6
F 255.7
The module address is outside the specified area or
not within the 8–bit grid pattern.
(first part of parameter
BGKN)
The parameter is not set with ‘P-’ or
‘Q–’.
(Does not apply to programmable controllerS5-115U/H)
QVZ, no module found under this address.
(first part of parameter
BGKN)
(only set with S5-155U/H)
The channel number is outside the specified range
(second part of parameter
BGKN)
7–8
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
R
02/92
Programming Instructions
7.3.5 Data Area Assignment
No data blocks are addressed.
Addressing the Module (S5–155U/H)
For proper operation of the function block, the analog module
1P 243
must be addressed in the
address range from KH =
FF080
to KH = FF1
FE
This corresponds to the 1/0 area from
KH =
FF080
to KH = FFOFF (byte number 128 to 255) and to the Q range from KH = FF1OO to
KH =
FFIFF
(byte number O to 255).
1P
248 Equipment Manual
@
.%3TWIS
AG 1989, Order No: 6ES5
998-0KF21 7–9
Programming Instructions
7.3.6 Technical Specifications
R 02/92
0.59
0.64
Block no.
161
Block name PER:ANS
PLC
S5–
115U 135U
150UIS
155U
Library no.
P71200–S...
5161 –A–O
9161 –A–1
4161 –A–O
6161 –B–1
Call length (in words) 8
9
Block length (in words) 158 170 195
Prcessing
time
(in
msec)
CPU 941A/B CPU 922
Without standardization
5.9/3.2
1.4
0.2
I
With standardization
9.6/3.5
1.7
0.3
(
CPU 942A/B CPU 928A/B
Without standardization
3.3/3.2
0.7/0.2
With standardization
4.4/3.5
1 .0/0.3
CPU 943A/B
Without standardization
2.8/2.6
With standardization
3.1/2.8
CPU 944A/B
Without standardization 0.3/< 0.1
With standardization
1.811.6
Nesting depth
1
0
Blocks called
FB242(inte-
None
grated in
PLC)
Data areas used
Flag areas used
FY
238 to
FY
248 to
FY
255
FY
255
System instructions None
Other
7 – 10
1P
243 Equipment Manual
@
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AG 1989, Order No: 6ES5 998-0KF21
R 02/92
Programming Instructions
7.3.7 Function Block Application
The module basic address and the channel number of the analog value to be
writien
are specified
at parameter BGKN. The value at parameter
DAU
is transferred to DAC1, DAC2, or DAC3 accord-
ing to the channel number.
The representation of the analog value
DAC
depends on the signal status at parameter NORM:
NORM = “O”:
The bit pattern at parameter
DAC
(in the case of channel 3, the left byte) is trans-
ferred to the module unchanged (bit assignment as shown in the operating in-
structions).
NORM = “1“:
The value at the parameter is interpreted as a standardized 16–bit fixed–point
number (nominal range with KN = 1 or 2:
*
10000 mV; with KN = 3: O to 10000
rev). Depending on the channel number KN, the analog value is computed ac-
cording to the following formula:
For channel number 1 or 2:
13422
Analog value =
DAC
x —
65536
For channel number 3: 1678
Analog value =
DAC
x —
65536
If the value is outside the currently valid nominal range, it is limited to an extreme
value.
If the parameter DA-S has signal status”1”, the value at parameter DA is transferred to the binary
module outputs. If the module has no binary outputs, the command is ineffective.
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21 7 – 11
Programming Instructions R 02/92
This example shows the operation of the analog module 1P 243. By means of a simulator the indi-
vidual functions can be selected (via binary inputs). The signal states can be displayed via binary
outputs. The display shows how an analog value applied to the module can be read and how an
analog value can be output via the module.
This example also shows the necessary jumper settings and wiring requirements for the
mo-dule.
Therefore, it can also be used as a test program to check the jumper settings and functions of the
module.
7.4.1 Device Configuration
For a test of the analog module
1P
243, the following devices can be used:
– One of the listed programmable controllers
– Programmer (e.g., PG 750)
– Analog module 1P 243
(6ES5
243–lAA11) in full configuration: front connector K with screw
mounting (6)(X3 081)
– Digital input module; front connector with screw mounting
– Digital output module; front connector with screw mounting
– 2 simulators (6ES5788–0L412)
– Voltage source for two analog signals
– Voltmeter
7 – 12
1P
243 Equipment Manual
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AG 1989, Order No: 6ES5 998-0KF21
R
02/92
Programming Instructions
7.4.2 Jumper Assignment of the Analog Module
Module Address (Basic Address 160):
DIP switch S2: ABD
5
ON
[
Jumper 3–16 = 25 = 32
ABD
7
ON
I
Jumper 5–14 = 27 =128
Module address
z
18 17 16 15 14 13 12 11 10
x2
123456789
Analog routing:
Soldering bases X32 and X29:
Analog value 1
>Channel O –>
Comparator 1 +
(PIN 16) (PIN 2) (PIN 20)
Analog value 2
>Channel 1 –>
Comparator 1 –
(PIN 15)
(PIN 2)
(PIN 19)
DAC1
>
AQ1
(PIN 21) (PIN 25)
DAC2
–>
AQ2
(PIN 22) (PIN 26)
DAC3
–>
AQ3
(PIN 30) (PIN 27)
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243 Equipment Manual
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998-0KF21 7 – 13
Programming Instructions
R 02/92
7.4.3 Assignment of the Inputs and Outputs
The program is designed in a way that allows easy adaptation to different input and output assign-
ments. The program block (PB 243) that contains the test program works with flags only. The in-
puts and outputs to be used are allocated to these flags by organization block OB 1.
In the example the flags are the input word
IW4
and the output word
QW4
or the input word
IW4
and the output word
QW8
for theS5–115U.
I 4.0
I 4.1
14.2
I 4.3
I 4.4
I 4.5
14.6
I 4.7
IB5
QB4/QB8
QB5/QB9
Q 6. O/Q 10.0
Q 6.1/Q 10.1
F 4.0
F 4.1
F 4.2
F 4.3
F 4.4
F 4.5
F 4.6
F 4.7
FY5
FY8
FY 9
F 14.0
F 14.1
FW 10
FW 12
FY 16
FY 17
NORM
DE L
KP:L
LOG
STR
DA-S
DA
DE
KOMP
PAFE
PAFE
ADU
DAU
Standardize analog value (convert)
Read binary inputs
Read comparator outputs
Switch over
gating
logic
Enable signal for comparator interrupt
Write
binaty
outputs
Reset all binary outputs and flags
Binary outputs for output via the analog module
Binary inputs read by the analog module
Comparator outputs read by the analog module
Parameterization
error bit of FB 160
Parameterization
error bit of FB 161
Analog value read by the module
Analog value output via the module
Error flag byte
(FY
255) of FB 160
Error flag byte
(FY
255) of FB 161
7 – 14
1P
243 Equipmant Manual
@
Siemens
AG 1989,
Ordar
No: 6ES5 998-0KF21
R 02/92
Programming Instructions
7.4.4 Turn-On, Start-Up Behavior
The program is loaded entirely from the floppy disk to the user memory of the programmable con-
troller.
During start-up there is no need to supply any data to the analog module. Its ready state is indi-
cated by the green LED on the front panel. The LED lights up when an external 24 V voltage is
applied.
If at the time the programmable controller is turned on, all simulator inputs are in switch position
“O”, no outputs maybe set after the start-up of the programmable controller.
If one of the outputs Q 6. O/Q 10.0 (flag F 14.0) or Q 6.1/Q 10.1 (flag F 14.1) is set, a
para-meteriza-
tion error was made. The exact error cause can be identified at flag byte FY 16 (for the
parameterization error shown for output Q 6. O/Q 10.0) or at flag byte FY 17 (for the
parametrizat-
ion error shown for output Q 6.1/Q 10.1). Both flag bytes are set in accordance with the error bytes
FY 255 of the standard function blocks FB 160 and FB 161.
7.4.5 Reading the Binary Inputs
If input 14.1 is brought to switch position”1”, the binary inputs connected to the analog module
are displayed at output byte
QB4/QB8.
If the signal status of these inputs is modified, the display
on the simulator is modified accordingly.
1P
243 Equipment Manual
@
Siemens AG 1989, Order No: 6ES5
998-0KF21 7 – 15
Programming Instructions
R 02/92
7.4.6 Reading the Analog Value
The channel numbers from O to 7 are specified via the parameter BGKN of function block FB 160.
The LEDs on the module’s front plate indicate the currently selected channel as a bit pattern.
The analog value read in the example is transferred to the module through the front panel connec-
tor via input
IW1
(contact 24) and the appropriate potential contact (contact 23). It can be meas-
ured simultaneously at sockets 1
(IW1)
and 6
(ManJ.
The output for analog value acquisition
AV1
(Pin 16) must be brought to channel O of the ADC (Pin 1) via analog value
jumpering.
The analog value read by function block FB 160 is output in flag word FW 10. Via the programmer
function “Control Variable”, the actual value can be displayed directly.
If input 14.0 (“NORM”) is brought to switch position”1”, the analog value is displayed in
mV
given
in binary code (ranging from –1 0000 to +10000).
Othetwise
it is given as a bit pattern, the way it
arrives from the module.
Via the two potentiometers “Work point
AV1”
and “Amplification
AV1”,
the analog value can be
changed. In order to check whether the module reproduces the applied value in correct form, the
amplification should be set to value”1” and the work point to “O”. For this purpose a firm value
(e.g., 2
V)
should be specified at the analog value input
AV1.
Then a reading should be taken at the
sockets and the amplification changed until the input value matches the end value. The work point
is set by zero adjustment (i.e., the applied and the measured voltages are both zero). Via soldered
jumpers the individual voltage ranges can be set as follows:
UNI
10V
(BT
= O: Voltage range from O V to 10
V)
BI
– 20 V
(BT
= 1: Voltage range from -10 Vto +10
V)
BI
10V
(BT
= 2: Voltage range from -5 V to +5 V)
7 – 16
1P
243 Equipment Manual
@
Siemens
AG 1989, Order No: 6ES5 998-0KF21
R 02/92
Programming Instructions
7.4.7 Checking the Comparators
lf
routing of analog values has not been completed, the output for analog value acquisition
AV1
(Pin 16) must be connected with the “+” input of comparator 1 (Pin 20). Furthermore, the output
for analog value acquisition
AV2
(Pin 15) must be connected with channel 1 of the
ADC
(Pin 2) and
with the “-” input of comparator 1 (Pin 19).
Channel O is set to 2
V.
Depending on whether the analog value measured at channel 1 is below or
above 2 V, there will be different states of the comparator outputs (in this case A and B for com-
parator output 1).
The function KP–L “Read comparator outputs” is switched on via input 14.2. Depending on the
status of the LOG bit (I 4.3), the following signal states will result for comparator output 1:
LOG (1 4.3)
I=
o“
=
“ “
1
Channel 1<2 V
I
A = “O”, B = “1“
I
A = “1“j B = “l”
Channel 1>2 V
I
A = “l”, B = “1“
I
A = “1“, B = “O”
The comparator outputs are conducted to the output byte
QB5/QB9
and are displayed there. In
this case “A” corresponds to output Q 5. O/Q 9.0 and “B” corresponds to Q 5.1/Q 9.1. After turning
off the function “Read comparator outputs”, the outputs at the simulator remain active. Via input
I
4.7 (flag F 4.7) the outputs can be reset.
7.4.8 Writing the Binary Outputs
When the function “DA-S Write
binaty
outputs” (1 4.6) is activated, the binary outputs of the ana-
log module, connected to the simulator, are indicated by LEDs on the simulator.
The binary outputs are entered at input byte IB5.
1P
243 Equipment Manual
@
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998-0KF21 7 – 17
Programming Instructions
R
02/92
7.4.9 Writing the Analog Value
When the analog routing operations have been performed in single steps so far, they now must be
supplemented by the following jumpers:
DAC1
>AOI
(PIN 21) (PIN 25)
DAC2
–> A02
(PIN 22) (PIN 26)
DAC3
–>
A03
(PIN 23) (PIN 27)
Via the programmer function “Control variable” a value can be specified via flag word FW 12 which
is output as an analog value. If input 14.0 (NORM) has signal status”1”, the value can be output in
mV
in binary form (ranging from –1 0000 to +10000). Otherwise the bit pattern is required and is
then directly transferred to the module.
In order to determine the written analog value, it is measured at the contacts in the front connector
of the analog module (e.g., pin 28 for
AO1
and pin 33 for potential).
7 – 18
1P
243 Equipment Manual
@.SiemensA(31989, Order No: 6E.S5998-0KF21
R
02/92
Programming Instructions
I
7.5 Programming Without FB
k
7.5.1 Address Assignment
For read and write operations the 1P 243 requires an 8–byte address area. These eight bytes are
assigned as follows:
READ LSB I
Startina
address
o
–––
(READY-Delay)
Starting address + 1
1
-
(READY-Delay)
Starting address + 2
2
(READY-Delay)
Starting address + 3
3
-–––
(READY-Delay)
Starting address + 4
47
6 5
4
3 2
1
0
DIGITAL INPUT
+5
1
D
c
B
A
COMPARATORS
28
7
7
26
75 24
HIGH–
B~E
ADC
Zo
() () f)
o
LOW–BYTE
ADC
L
address
J--
Starting address + 6
I
6
I
2’1 2’?
29
Startina
address + 7
7
2
3
2
2
2’
L
r
I
Startina
ADR MSB WRITE
LSB
Starting
addresc
o
s
x x
x x
210
29
28
HIGH–BYTE
DAC1
Starting address + 1
1
27
26 25
P
@
222
20
LOW–BYTE
DAC1
Starting address + 2
2
s
x
x
x
x
210
29
2’
HIGH–BYTE
IMC2
Starting address + 3
3
27
26
25
@
$
22 21
20
LOW–BWE
DAC2
r
m
,2
~1
,0
DAC3
—-—.
---
-
address + 4
I
2
7
1261251
f
I
ZJL
A
address + 5
57 6 5
4
3
address + 6
6
x
x
x
x x
address + 7
7
LOG
8TR
x
x
x
ADR
= Address byte
MSB
= Most significant bit
LSB
= Least significant bit
Attention:
Although the four bytes
ADR
O to 3 are not set for READ and no READY is generated,
no input module maybe addressed in this area, as the data bus driver of the module
is “turned on” in this area also.
1P
243 Equipment Manual
@ Siemens AG 1989, Order No: 6ES5
998-0KF21
7 – 19
Programming Instructions
R 02/92
7.5.2 Reading and Writing the Inputs and Outputs
I
The descriptions of the individual
1P 243
hardware components also refer to software handling.
With an example, this section summarizes the programming commands for the respective ac-
cesses.
Example for module address 128 with
SIMATIC
S5
Function Data
Subaddresses
STEP 5 Statement
D7 D6 D5 D4 D3 D2 D1 DO
222
12(J
BI
Read
765432101 0 0 Q Mod.
adr.
+ 4
LPY
132
BO
Write
765432101 0 1
S
Mod.
adr.
+ 5
TPY
133
DAC1
Write
VZ X X X X
20
29
%
O 0 0 C Mod.
adr.
+ O
TPY
128
TPW
128
27 26 25 28 23
22
21
20 0 0 1
Q
Mod.
adr.
+ 1
TPY
129
0
DAC2
vz x x x x
20
23
x
O 1 0
Q
Mod.
adr.
+ 2
TPY
130
Write
TPW
130
27 26 25 26 23 22
21
20
0 1 12 Mod.
adr.
+ 3
TPY
131 0
DAC3
Write
27 26 25 28 23 22 21 20
1
0 0
Q
Mod.
adr.
+ 4
TPY
132
Read
Comparators
1111
DCBA
1
0 1 Q Mod.
adr.
+ 5
LPY
133
Write
ADC
selection
L S X X X
22
21
~
1 1 1
Q
Mod.
adr.
+ 7
TPY
135
Write
ADC
conversion
Xxxxx xxx1 1 0
G
Mod.
adr.
+ 6
TPY
134
ADC z
1
20
29 26 27 26 25 24 1 1
Os
Mod.
adr.
+ 6
LPY
134
Read
LPw
134
23 22 21 20 0 0 0 0 1 1 1
S
Mod.
adr.
+ 7
LPY
135
0
The propagation times for these three commands must be added to the converting times of a
maximum of 35
psec.
per channel to obtain the time required for reading in an analog input
channel.
If the same channel is converted in repeated sequence, the command “ADC
channel select” can be omitted, as the selected channel remains active after the call until it is
overwritten.
Attention:
Not only the channel, which is selected by the multiplexer and then converted by the
ADC,
is stored in byte “subaddress
7“
but also the desired states of the “LOG” and
“STROBE” bits. When writing the data, make sure that no other functions are overwrit-
ten.
7 –
20
1P
243 Equipment Manual
@
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AG 1989, Order No: 6ES5 998-0KF21