FUJITSU SEMICONDUCTOR DATA SHEET DS04-27204-3E ASSP SWITCHING REGULATOR CONTROLLER MB3775 LOW VOLTAGE DUAL PWM SWITCHING REGULATOR CONTROLLER The MB3775 is a dual pulse-width-modulation control circuit. It contains the basic circuits required for two PWM control circuits. Complete synchronization is obtained by using the same oscillator output waveform. This IC can provide following types of output voltage: step down, step up, and inverter. Power consumption is low, thus the MB3775 is ideal for use in highefficiency portable equipment. * * * * * * * (DIP-16P-M04) Wide supply voltage range: 3.6 V to 18 V Low current consumption: 1.3 mA typical Wide oscillation frequency range: 1 kHz to 500 kHz On-chip timer latch short protection circuit On-chip under voltage lockout protection On-chip reference voltage: 1.28 V Variable dead time provides control over total operating range. ABSOLUTE MAXIMUM RATINGS (see NOTE) (Ta = 25C) Rating Symbol Value Unit Power Supply Voltage VCC 20 V Error Amp. Input Voltage VI -0.3 to +10 V Collector Output Voltage VO 20 V Collector Output Current IO Power Dissipation PD Condition (FPT-16P-M06) 75 mA Ta 25 C(SOP) *620 mW Ta 25 C(DIP) 1000 mW Ta 25C(VSOP) *430 mW Operating Temperature TOP -30 to +85 C Storage temperature Tstg -55 to+125 C *: The packages are mounted on the epoxy board (4 cm x 4 cm x 1.5 mm) NOTE : Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. (FPT-16P-M05) PIN ASSIGNMENT (TOP VIEW) CT RT +IN1 -IN1 FB1 D.T.C.1 OUT1 E/GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VREF SCP +IN2 -IN2 FB2 D.T.C.2 OUT2 VCC This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. 1 MB3775 BLOCK DIAGRAM 9 VREF=1.28V 16 1 VCC Reference Voltage 1.9V - Triangular Waveform 1.3V - 4 5 Error Amp 1 + _ OUT 1 7 +_ _ 2.5V 3 2 PWM Comp 1 + _+ S.C.P. Comp + _ _ OUT 2 10 PWM Comp 2 12 1.1V Error Amp 2 + 14 _ 13 2.5V 1.28V 0.9V 1A 15 S R 0.9V R Latch U.V.L.O. + + _ 8 D.T.C. Comp GND 1.8V 6 RECOMMENDED OPERATING CONDITIONS Parameter Symbol Value Unit Min Typ Max VCC 3.6 6.0 18 V Error Amp. Input Voltage VI -0.2 - 1.45 V Collector Output Voltage VO - - 18 V Collector Output Current IO 0.3 - 50 mA Phase Compensation Capacitor CP - 0.1 - F Timing Capacitor CT 150 - 15000 pF Timing Resistor RT 5.1 - 100 k Oscillator Frequency fOSC 1 - 500 kHz Reference Voltage Output Current IREF -3 -1 - mA Operating Temperature TOP -30 25 85 C Power Supply Voltage 2 11 MB3775 OPERATION DESCRIPTION 1. Reference voltage The reference voltage circuit generates a stable, temperature-compensated 2.5 V reference from Vcc (pin 9) for use by internal circuits. A reference voltage of temperature compensated 1/2 Vref can be obtained to external circuit by Vref terminal (pin 16). 2. Oscillator A triangular waveform of any frequency is obtained by connecting an external capacitor and resistor to the CT (pin 1) and RT terminals (pin 2). The amplitude of this waveform is from 1.3 V to 1.9 V. The oscillator is internally connected to the non-inverting inputs of the PWM comparators. The oscillator waveform is available at the CT terminal. 3. Error amplifiers The error amplifier detects the output voltage of the switching regulator. The common-mode input voltage range is -0.2 V to 1.45 V, so the input reference voltage can be set the VREF and GND levels. Error amplifiers can be used as either inverting and non-inverting amplifiers. The voltage gain is fixed. Phase compensation is possible by connecting a capacitor to the FB terminals (pins 5 and 12) of the error amplifiers. The error amplifier output are internally connected to the inverting inputs of the PWM comparators and also to the short protection circuit. 4. Timer latch short protection circuit The timer latch short protection circuit detects the output levels of the error amplifiers. If one or both error amplifier outputs are 1.1 V or lower, the timer circuit begins charging the externally connected protection enable capacitor. If the output level of the error amplifier does not drop below the normal voltage range before the capacitor voltage reaches the transistor base-emitter voltage VBE ( 0.65 V), the latch circuit turns the output drive transistor off and sets the dead time to 100 %. 5. Under voltage lockout protection circuit An ambiguous transition state at power-on or a momentary fluctuation in the supply line may result in loss of control and may adversely affect or even destroy the system. The under voltage lockout protection circuit compares the internal reference voltage level with the supply voltage level. If the supply voltage level falls below the reference level the latch circuit is reset the output drive transistor is turned off and the dead time is set to 100 %. The protection enable terminal (pin 15) is pulled "Low". 6. PWM comparator Each PWM comparator has two inverting inputs and one non-inverting input. This voltage-to-pulse-width converter controls the output pulse width according to the input voltage. The PWM comparator turns the output drive transistor on when the oscillator triangular waveform is higher than the error amplifier output and the dead time control terminal voltage. 7. Output drive transistor The open-collector output-drive transistors provide common-emitter output of 18 V dielectric capability. The output drive transistors can source up to 50 mA of drive current to the switching power transistor. 3 MB3775 ELECTRICAL CHARACTERISTICS (Ta=25C, VCC=6V) Parameter condition Symbol Value Min Typ Max Unit Reference Section Output Voltage IOR =-1 mA VREF 1.26 1.28 1.30 V Output Temp. Stability Ta = -30 C to +85 C VRTC -2 0.2 2 % Input Stability VCC = 3.6 V to 18 V Line - 2 10 mV Load Stability IOR = -0.1 mA to -1 mA Load - 1 7.5 mV Short Circuit Output Current VREF = 0 V IOS - -30 -10 mA IOR = -0.1 mA VtH - 2.72 - V IOR = -0.1 mA VtL - 2.60 - V IOR = -0.1 mA VHYS 80 120 - mV VR 1.5 1.9 - V VtPC 0.60 0.65 0.7 V Under Voltage Lockout Protection Section Threshold Voltage Hysteresis Width Reset Voltage (VCC) Protection Circuit Section Input Threshold Voltage Input Stand by Voltage No pull up VSTB - 50 100 mV Input Latch Voltage No pull up VI - 50 100 mV Ibpc -1.4 -1.0 -0.6 A Pin 5, Pin 12 VtC - 1.1 - V Ocillator Frequency CT = 330 pF, RT = 15 k fOSC - 200 - kHz Frequency Deviation CT = 330 pF, RT = 15 k fdev - 10 - % Frequency Stability (VCC) VCC = 3.6 V to 18 V fdV - 1 - % Frequency Stability (Ta) Ta = -30 C to +85 C fdT -4 - 4 % Duty Cycle = 0 % Vt0 - 1.0 VREF -0.15 V Vt100 0.2 0.4 - V Ibdt - -0.2 -1 A Input Source Current Comparator Threshold Voltage Triangular Waveform Oscillator Section Dead-Time Control Section Input Threshold Voltage (fOSC = 10 kHz) Duty Cycle = 100 % Input Bias Current 4 Latch Mode Source Current Vdt = 0.7 V Idt - -150 -80 A Latch Input Voltage Idt=-40 A Vdt VREF -0.1 - - V MB3775 ELECTRICAL CHARACTERISTICS (Continued) (Ta=25C, VCC=6V) Parameter Condition Symbol Value Min Typ Max Unit Error Amp. Section Input Offset Voltage VO = 1.6 V VIO -10 - +10 mV Input Offset Current VO = 1.6 V IIO -100 - +100 nA Input Bias Current VO = 1.6 V IB -500 -100 - nA Common Mode Input Voltage Range VCC=3.6V to 18V VICR -0.2 - +1.45 V AV 84 120 - V/V BW - 3 - MHz CMRR 60 80 - dB VOM+ 2.2 2.4 - V VOM- - 0.7 0.9 V Voltage Gain Frequency Band Width AV = -3 dB Common Mode Rejection Ratio Max. Output Voltage Width Output Sink Current VO = 1.6 V IOM+ 24 50 - A Output Source Current VO = 1.6 V IOM- - -1.2 -0.7 mA Duty Cycle = 0 % Vt0 - 1.9 2.1 V Vt100 1.05 1.3 - V PWM Comparator Section Input Threshold Voltage (fOSC=10 kHz) Duty Cycle = 100 % Input Sink Current Pin 5, Pin 12 = 1.6 V IIN+ 24 50 - A Input Source Current Pin 5, Pin 12 = 1.6 V IIN- - -1.2 -0.7 mA Output Section Output Leak Current VO=18V Leak - - 10 A Output Saturation Voltage IO=50 mA VSAT - 1.1 1.4 V Stand by Current Output "OFF" ICCS - 1.3 1.8 mA Average Supply Current RT=15k ICCa - 1.7 2.4 mA 5 MB3775 TEST CIRCUIT VCC=6V INPUT TEST SW 4.7k CPE OUTPUT 1 4.7k OUTPUT 2 16 15 14 13 12 11 10 9 6 7 8 MB3775 1 2 3 4 5 0.1 F 330pF 15k TEST INPUT TIMING CHART (Internal Waveform) Error Amp. output Triangular waveform osillator output 1.9V Dead Time PWM 1.5V input voltage 1.3V Short circuit protection 1.1V comparator Reference input "High" PWM comparator output "Low" Output Transistor collector waveform S.C.P. Terminal waveform "High" DEAD TIME 100% LOCK-OUT "Low" 0.6V tPE 0V Short circuit protection "High" comparator output "Low" LOCK-OUT CANCEL Power supply voltage 3.6V (VCC : Min. Value) 2.8 V (Typ. Value) 0V Protection Enable Time tPE 6 0.6 x 106 x CPE (sec) MB3775 APPLICATION CIRCUIT Fig. 1 - Chopper Type Step Down/Inverting VIN (10V) 820pF 10k 1 16 2 15 3 14 4 13 0.1F 2.3k 33k + - 56H MB3775 5 12 6 11 1.9k 0.1F 33k 0.1F 33k 1F 33k - + 220F 7 10 8 9 + 5.6k 1F 330 330 470 470 120H - 9.1k + - 220F 120H + 220F V0- (-5V) V0+ (+5V) GND Fig. 2 - Chopper Type Step Up/Inverting VIN (5V) 820pF 1 16 2 15 3 14 0.1F 10k 2.3k 4 + - 5 12 6 11 7 10 8 9 33k 0.1F 33k 33k 1F 33k 56H 1.9k 0.1F 13 MB3775 - + 220F + - 16k 1F 330 3.9k 120H 330 120H 100 9.1k - + 220F 220F V0- (-5V) + GND V0+ (+12V) 7 MB3775 APPLICATION CIRCUIT (Continued) Fig. 3 - Chopper Type Step Up/Inverting (For High Speed) 820pF VIN (5V) 1 16 2 15 3 14 0.1F 10k 2.3k 4 33k 56H 1.9k 13 MB3775 5 12 6 11 33k + - 7 10 8 9 - 0.1F 0.1F 33k 1F 33k + 220F 16k 470 + 1F 220 470 + 470 470 330pF 33k 120H - 9.1k 33k - + 220F V0- (-5V) 150 120H 1F + 220F GND V0+ (+12V) Fig. 4 - Multi Output Type (Apply Transformer) VIN (10V) 820pF 1 16 2 15 3 14 0.1F 10k 4 56H 5.6K 1.9k 0.1F 13 MB3775 0.1F - 12 5 33k 6 11 7 10 8 9 + 220F 1.8k 1nF 33k 220 - + - 220F V02(-12V) 8 + - 220F V01(-5V) + - 220F GND + 220F V02+ (+5V) V01+ (+12V) MB3775 HOW TO SET OUTPUT VOLTAGE The output voltage is set using the connection shown in Fig. 5 and 6. The error amplifiers are supplied to the internal reference voltage circuit as are the other internal circuits. The common-mode input voltage range is from -0.2 V to +1.45 V. When the amplifiers are operated non-inverting, tie the inverting terminal to VREF ( are operated inverting, tie the non-inverting terminal to ground. 1.28 V). When the amplifiers Fig. 5 -Connection of Error Amp. Output Voltage V0 is plus R2 V0+ [V0+ = VREF X (1 + R2/R1)] + PIN 5 or PIN 12 R1 - VREF Fig. 6 -Connection of Error Amp. Output Voltage V0 is minus R2 V0- [V0- = -VREF X (R2/R1)] PIN 5 or PIN 12 R1 + VREF 9 MB3775 HOW TO SET TIME CONSTANT FOR TIMER LATCH SHORT PROTECTION CIRCUIT TIMING CHART shows the configuration of the protection latch circuit. Error amplifier outputs, are internally connected to the non-inverting inputs of the short-circuit protection comparator and are compared with the reference voltage (1.1 V) connected to the inverting input. When the load condition of the switching regulator is stable, the error amplifier has no output fluctuation. Thus, short-circuit protection control is also kept in balance, and the protection enable terminal (pin 15) voltage is kept at about 50 mV. If the load condition drastically changes due to a load short-circuit and if low-level signals (1.1 V or lower) are input to the noninverting inputs of the short-circuit protection comparator from the error amplifiers, the short-circuit protection comparator outputs a "Low" level to turn transistor Q1 off. The protection enable terminal voltage is discharged, and then the short-circuit protection comparator charges the externally connected protection enable capacitor CPE according to the following formula: VPE = 50 mV + tPE x 10-6/CPE 0.65 = 50 mV + tPE x 10-6/CPE CPE = tPE/0.6 (F) When the protection enable capacitor charges to about 0.65 V, the protection latch is set to enable the under voltage lockout protection circuit and to turn the output drive transistor off. The dead time is set to 100 %. Once the under voltage lockout protection circuit is enabled, the protection enable is released; however, the protection latch is not reset if the power is not turned off. The non-inverting inputs of the D.T.C. comparator are connected to the D.T.C. terminals (pins 6 and 11) through the power supply (about 0.9 V) and are compared with a reference voltage (about 1.8 V) connected to the inverting input. To prevent malfunction of the short protection circuit in soft-start mode (using D.T.C. terminals), the D.T.C. comparator outputs a "High" level to turn Q2 on until the D.T.C. terminal voltage drops to about 0.9 V. Fig. 7 - Protection Latch Circuit 2.5V 1A S.C.P.Comp. R1 Error Amp.1 Error Amp.2 + + - 15 CPE Q1 Q2 Q3 S + + - 10 U.V.L.O. Latch 1.1V D.T.C.Comp. R 0.9V 0.9V 1.8V 6 D.T.C.1 11 D.T.C.2 MB3775 SYNCHRONIZATION OF ICs To synchronize MB3775 ICs, first, the specified capacitor and resistor are connected to the CT and RT terminals of the master IC to start self oscillation. Next, 2 V is applied to the RT terminals of the slave ICs to disable the charge/discharge circuit for triangular wave oscillation. Finally, the CT terminals of the master and slave ICs are connected. Instead of applying VRT to the RT terminals, these terminals can be pulled up by a resistor (see resistance indicated by the dashed line in Fig. 8). Select the pull-up resistance Rpull from the formula given below. VCC Rpull 0.5 x N Rpull: Pull up Resistor (k) VCC: Power Supply Voltage (V) N: Number of Slave ICs Fig. 8 - Connection of Master, Slave VCC MB3775 (MASTER) Rpull CT RT MB3775 (SLAVE) VRT 2V MB3775 (SLAVE) 11 MB3775 TYPICAL PERFORMANCE CHARACTERISTICS Fig. 9 - Power supply voltage vs. Reference voltage 1.5 1.0 0.5 0 5 10 15 Power supply voltage VCC (V) 1.0 0.5 0 5 10 15 Power supply voltage VCC (V) 20 1.28 1.27 1.26 0 30 60 Temp. Ta (5C) 90 3.0 Error Amp Max output voltage VOM (V) Collector saturation voltage VSAT (V) 12 5 10 15 Power supply voltage VCC (V) Fig. 14 - Error Amp. Max. output voltage vs. Frequency 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0.5 1.25 -30 20 Fig. 13 - Collector saturation voltage vs. Sink current 1.0 Fig. 12 - Reference voltage vs. Temp. 1.29 Reference voltage VREF (V) 1.5 1.5 0 20 Fig. 11 - Power supply voltage vs. Stand by current 2.0 Stand by current ICCS (mA) Fig. 10 - Power supply voltage vs. Average supply current 2.0 Average supply current I CCa (mA) Reference voltage VREF(V) 2.0 50 100 150 200 250 300 Sink current lO (mA) 350 2.0 1.0 0 100 1K 10K 100K Frequency f(Hz) 1M MB3775 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) Fig. 16 - Triangular waveform cycle vs. Timing capacitor 103 Fig. 15 - Timing resistor vs. Oscillation Frequency Triangular waveform cycle ( sec) Timing resistor fOSC (Hz) 1M 100k 10k CT=150pF CT=1500pF 1k 102 101 10 Timing resistance=15k VCC=6V 0 CT=15000pF 100 1K 10K 100K 1M Timing resistor RT () 10-1 101 10M 2.2 102 103 104 Timing capacitor CT (pF) 105 Fig. 18 - Frequency vs. Gain/Phase 60 Timing resistance=15k VCC=6V 2.0 40 1.8 20 90 0 0 180 1.6 1.4 -20 1.2 -40 102 103 104 Timing capacitor C T (pF) 101 Fig. 19 - Frequency vs. Gain/Phase (Actual Data) 60 60 40 90 20 Gain 0 0 Phase -20 -90 -40 -180 -60 100 101 102 103 104 105 Frequency f(Hz) 106 107 Gain A V(dB) 180 Phase (deg) 20 10K 100K Frequency f(Hz) 1M 90 10M Fig. 20 - Frequency vs. Gain/Phase (Actual Data) CFB=1F 40 -180 -60 1K 105 -90 CFB=0.1F 180 90 Gain 0 0 Phase -20 -90 -40 -180 -60 100 101 102 103 104 105 Frequency f(Hz) 106 Phase (deg) 1.0 Phase Phase (deg) Gain Gain AV(dB) Triangular waveform Max. Amplitude voltage (V) Fig. 17 - Timing capacitor vs. Triangular waveform Max. Amplitude voltage Gain AV(dB) 107 13 MB3775 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 40 180 20 90 Gain Phase -20 -90 -40 -180 -60 100 14 0 0 101 102 103 104 105 Frequency f(Hz) 106 107 Phase (deg) Gain AV (dB) Fig. 21 - Frequency vs. Gain/Phase (Actual Data) 60 CFB=0.01F MB3775 APPLICATION 1. How to set the error amplifier frequency characteristic Figure 22 shows the equivalent circuit of the error amplifier. The frequency characteristic of the error amplifier is set by R1, R2, and CP . The high-frequency gain is set by the ratio of resistors 0 dB). R1 and R2 in the IC (set value When C P = 0.1 F, the gain at 20 kHz f 5 MHz is about 0 dB. The roll-off frequency is adjusted by changing external phase compensating capacitor CP (see Fig. 24). When high frequency gain is needed or the phase must be advanced at a low frequency, connect a resistor RP between the FB terminal and C P as shown in Figure 23 (see Fig. 25). Fig. 22 - Error Amp. Equivalent Circuit Error Amp. [- IN] R1 38 k x 120 [+ IN] PWM COMP + R2 470 [FB] CP Fig. 23 - Error Amp. Equivalent Circuit (Insert RP) Error Amp. [- IN] R1 38 k x 120 [+ IN] PWM COMP R2 + 470 [FB] RP CP NOTE: As shown above, the frequency characteristic of the error amplifier is set by the external phase compensating capacitor CP. When a ceramic chip capacitor must be . used to meet the requirements of a small system, be careful of its temperature . characteristic. (-30 C =. 1/5 and 80 C =.1/3 for the frequency characteristic, so a sufficient phase margin must be allowed for at room temperature.) Ceramic chip capacitors with a low temperature characteristic (B characteristic) or film capacitors are recommended (see Fig. 26 to 28). 15 MB3775 Fig. 24 - Error Amp. Frequency characteristics 60 AV CP=0.1F 180 40 (Large) (Small) 90 0 0 (Small) -20 Phase (deg) Gain AV (dB) 20 -90 (Large) CP=0.1F -40 -180 -60 10 100 1k 10k 100k 1M 10M 100M Frequency f(Hz) Fig. 25 - Error Amp. Frequency characteristics 60 CP=0.1F 40 180 20 90 RP=0 (Large) 0 0 (Large) -90 -20 RP=0 -180 -40 -60 10 100 1k 10k 100k Frequency f(Hz) 16 1M 10M 100M Phase (deg) Gain AV (dB) AV MB3775 Fig. 26 - Ceramic Chip Capacitor (0.1 F) Gain AV (dB) 10 90 -30C 0 0 AV -10 80C 25C -90 Phase (deg) Temp. characteristic Temp. : Ratio -30C : 0.19 25C : 1.0 80C : 0.32 20 -30C 25C 80C -20 1K 10K 100K 1M Frequency f(Hz) Fig. 27 - Tantal Capacitor (0.33 F) Gain AV (dB) 10 AV 0 90 0 -30C 25C -10 80C -30C Phase (deg) Temp. characteristic Temp. : Ratio -30C : 0.95 to 1.05 25C : 1.0 80C : 0.95 to 1.05 20 -90 -20 25C 80C 1K 10K 100K 1M Frequency f(Hz) Fig. 28 - Film Capacitor (0.1 F) Temp. characteristic 10 Gain AV (dB) -30C : 0.9 to 1.1 25C : 1.0 80C : 0.9 to 1.1 AV 90 0 0 -30C, 25C, 80C -10 Phase (deg) 20 -90 -30C, 25C 80C -20 1K 10K Frequency f(Hz) 100K 1M 17 MB3775 2. Effect of equivalent series resistance of smoothing capacitor The equivalent series resistance (ESR) of the smoothing capacitor in the DC/DC converter greatly affects the loop phase characteristic. A smoothing capacitor with a low ESR reduces system stability by increasing the phase shift in the high-frequency region (see Fig. 30). Therefore, a smoothing capacitor with a high ESR will improve system stability. Be careful when using low ESR semiconductor electrolytic capacitors (OS-CON) and tantalum capacitors. Fig. 29 - Step Down DC/DC Converter Basic Circuit L Tr RC VIN D RL C Fig. 30 - Gain vs. Frequency Fig. 31 - Phase vs. Frequency 20 0 -20 (2) (2) -90 -40 100 -180 (1) -60 10 (1) (1) : RC=0 (2) : RC=31m (1) : RC=0 (2) : RC=31m 1K Frequency f(Hz) 18 Phase (deg) Gain A V (dB) 0 10K 100K 10 100 1K Frequency f(Hz) 10K 100K MB3775 Reference data If an aluminum electrolytic smoothing capacitor (RC 1.0) is replaced with a low ESR semiconductor electrolytic capacitor (OS-CON: RC 0.2 ), the phase shift is reduced by half (see Fig. 33 and 34). Fig. 32 - DC/DC Converter AV vs. characteristic Test Circuit VOUT V0+ AV vs. characteristic Between this point. + IN + FB VIN R2 - IN - ~ R1 0.1F VREF Error Amp. Fig. 33 - DC/DC Converter +5 V output 60 VCC=10V RL=25 CP=0.1F Gain A V (dB) AV 180 V0+ 20 90 62 0 0 -20 -40 10 Phase (deg) 40 AI Capacitor 22F(16V) - RC 0.2 : fosc=1kHz + GND -90 -180 100 1K Frequency f(Hz) 10K 100K Fig. 34 - DC/DC Converter +5 V output 60 20 180 90 0 27 0 -90 -20 -40 10 Phase (deg) Gain A V (dB) VCC=10V RL=25 C P=0.1F AV 40 V0+ OS-CON 220F(16V) - RC 1.0 : fosc=1KHz + GND -180 100 1K 10K 100K Frequency f(Hz) 19 MB3775 3. Measures for ensuring system stability when a low ESR smoothing capacitor is used When a low ESR smoothing capacitor is used in the DC/DC converter, only the L and C are apparent even in the high-frequency region, and the phase is delayed by almost 1805. Consequently, the system phase margin and stability are reduced. On the other hand, a low ESR capacitor is needed to reduce the amount of output ripple. This is contrary to the system stability explained above. To solve this problem, phase compensation can be used. This method increases the phase margin by advancing the phase when the phase margin is reduced by a low ESR capacitor. The three suggestions listed below are recommended for DC/DC converters using the MB3775. (1) As shown in Fig. 35, a capacitor is connected in parallel with the output feedback resistor to advance the phase. Use the formula below as a guideline for the capacitance. C1 1 2fR2 Unstable Frequency (See Fig. 32) Fig. 35 - External circuit example1 to advance the phase C1 V0+ R2 + IN + FB - IN - R1 CP VREF Fig. 36 - DC/DC Converter +5 V output 60 20 0 -20 -40 10 20 180 AV 90 VCC=10V RL=25 CP=0.1F Smoothing Capacitor 22F OS-CON C1=4700pF R1=1.8k R2=5.6 66 0 Phase (deg) Gain AV (dB) 40 -90 -180 100 1K Frequency f(Hz) 10K 100K MB3775 3. Measures for ensuring system stability when a low ESR smoothing capacitor is used (Continued) (2) As shown in Figure 37, a resistor (RP) is connected between the FB terminal and CP of the error amplifier to advance the phase. The more RP is increased, the more the phase is advanced. However, the gain in the high-frequency range is also increased, which causes instability. Therefore, select the optimum resistance (see Fig. 38). Fig. 37 - External circuit example 2 to advance the phase V 0+ R2 + IN + - IN R1 FB RP CP VREF Fig. 38 - DC/DC Converter +5 V output 60 180 40 20 0 -20 -40 10 90 VCC=10V R L=25 C P=0.1F Smoothing Capacitor 22F OS-CON R P=470 R 1=1.8k R 2=5.6 100 45 0 Phase (deg) Gain A V (dB) AV -90 1K Frequency f(Hz) 10K -180 100K 21 MB3775 (3) As shown in Fig. 39, the phase is advanced by using both example 1 and 2 (Fig. 35 and 37). Fig. 39 - External circuit example 3 to advance the phase C1 V0+ R2 + IN + FB - IN - R1 RP CP VREF 4. Error amplifier input ripple voltage The boost circuit for charging the phase compensating capacitor CP is connected to the error amplifier as shown in Figure 40 to protect against output voltage overload at power-on. A 15 mV offset voltage is provided for the negative input side so that the boost circuit only operates at power-on. When a capacitor is connected in parallel with the output feedback resistor, because the output ripple is too large or for advanced phase compensation, the boost circuit starts operating, which may degrade regulation if the differential input voltage of the error amplifier exceeds 15 mV. Be careful with the differential input voltage of the error amplifier. Fig. 40 - Error Amp. /Boost Equivalent circuit VCC V0 + + Advanced phase compensation capacitor Boost circuit R4 15mV [+ IN] + [- IN] R1 38 k x 120 Error Amp. R2 R3 [FB] CP VREF 22 470 MB3775 PACKAGE DIMENSIONS 16 pins, Plastic DIP (DIP-16P-M04) +0.20 19.55 -0.30 +.008 .770 -.012 INDEX-1 6.200.25 (.244.010) INDEX-2 0.51(.020)MIN 4.36(.172)MAX 0.250.05 (.010.002) 3.00(.118)MIN 0.460.08 (.018.003) +0.30 +0.30 0.99 -0 1.52 -0 +.012 .060 -0 2.54(.100) TYP 1.27(.050) MAX C 15MAX 7.62(.300) TYP +.012 .039 -0 Dimensions in mm (inches). 1994 FUJITSU LIMITED D16033S-2C-3 16 pins, Plastic SOP (FPT-16P-M06) 2.25(.089)MAX +0.25 +.010 10.15 -0.20 .400 -.008 INDEX 0.05(.002)MIN (STAND OFF) 5.300.30 (.209.012) +0.40 6.80 -0.20 +.016 .268 -.008 7.800.40 (.307.016) "B" 1.27(.050) TYP 0.450.10 (.018.004) +0.05 O0.13(.005) 0.15 -0.02 +.002 .006 -.001 M Details of "A" part Details of "B" part 0.40(.016) 0.15(.006) 0.20(.008) "A" 0.10(.004) 8.89(.350)REF C 0.500.20 (.020.008) 1994 FUJITSU LIMITED F16015S-2C-4 0.20(.008) 0.18(.007)MAX 0.18(.007)MAX 0.68(.027)MAX 0.68(.027)MAX Dimensions in mm (inches). 23 MB3775 16 pins, Plastic SOP (FPT-16P-M05) +0.20 * 5.000.10(.197.004) 1.25 -0.10 +.008 .049 -.004 0.10(.004) INDEX *4.400.10 (.173.004) 0.650.12 (.0256.0047) 4.55(.179)REF C 24 1994 FUJITSU LIMITED F16013S-2C-4 +0.10 0.22 -0.05 +.004 .009 -.002 5.40(.213) NOM 6.400.20 (.252.008) "A" +0.05 0.15 -0.02 +.002 .006 -.001 Details of "A" part 0.100.10(.004.004) (STAND OFF) 0 10 0.500.20 (.020.008) Dimensions in mm (inches). MB3775 FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: (044) 754-3763 Fax: (044) 754-3329 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) 866-8608 Fax: (408) 922-9179 http://www.fujitsumicro.com/ Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 http://www.fujitsu-ede.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220 All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan. http://www.fmap.com.sg/ F9803 FUJITSU LIMITED Printed in Japan 25