1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
TN0620
Features
Low threshold (1.6V max.)
High input impedance
Low input capacitance (110pF typical)
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
N-Channel Enhancement-Mode
Vertical DMOS FET
Absolute Maximum Ratings
Parameter Value
Drain-to-source voltage BVDSS
Drain-to-gate voltage BVDGS
Gate-to-source voltage ±20V
Operating and storage temperature -55OC to +150OC
Soldering temperature* 300OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
Ordering Information
Device
Package Option BVDSS/BVDGS
(V)
RDS(ON)
(max)
(Ω)
ID(ON)
(min)
(A)
VGS(th)
(max)
(V)
TO-92
TN0620 TN0620N3-G 200 6.0 1.0 1.6
-G indicates package is RoHS compliant (‘Green’)
Pin Configurations
TO-92 (N3)
GATE
SOURCE
DRAIN
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
T N
0620
YYWW
TO-92 (N3)
Product Marking
2
TN0620
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Electrical Characteristics (TA = 25OC unless otherwise specified)
Sym Parameter Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage 200 - - V VGS = 0V, ID = 2.0mA
VGS(th) Gate threshold voltage 0.6 - 1.6 V VGS = VDS, ID= 1.0mA
ΔVGS(th) Change in VGS(th) with temperature - - -5.0 mV/OC VGS = VDS, ID= 1.0mA
IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current
- - 10 µA VGS = 0V, VDS = Max Rating
- - 1.0 mA VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
ID(ON) On-state drain current 0.5 - - AVGS = 5.0V, VDS = 25V
1.0 - - VGS = 10V, VDS = 25V
RDS(ON) Static drain-to-source on-state resistance - 6.0 8.0 ΩVGS = 5.0V, ID = 250mA
- 4.0 6.0 VGS = 10V, ID = 500mA
ΔRDS(ON) Change in RDS(ON) with temperature - - 1.4 %/OC VGS = 10V, ID = 500mA
GFS Forward transductance 300 400 - mmho VDS = 25V, ID = 500mA
CISS Input capacitance - 110 150
pF
VGS = 0V,
VDS = 25V,
f = 1.0MHz
COSS Common source output capacitance - 40 85
CRSS Reverse transfer capacitance - 10 35
td(ON) Turn-on delay time - - 10
ns
VDD = 25V,
ID = 1.0A,
RGEN = 25Ω
trRise time - - 8.0
td(OFF) Turn-off delay time - - 20
tfFall time - - 20
VSD Diode forward voltage drop - - 1.8 V VGS = 0V, ISD = 1.0A
trr Reverse recovery time - 300 - ns VGS = 0V, ISD = 1.0A
Notes:
All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
All A.C. parameters sample tested.
1.
2.
Notes:
† ID (continuous) is limited by max rated Tj .
Thermal Characteristics
Package
ID
(continuous)
(mA)
ID
(pulsed)
(A)
Power Dissipation
@TC = 25OC
(W)
θjc
(OC/W)
θja
(OC/W)
IDR
(mA)
IDRM
(A)
TO-92 250 2.0 1.0 125 170 250 2.0
Switching Waveforms and Test Circuit
90%
10%
90% 90%
10%
10%
PULSE
GENERATOR
VDD
RL
OUTPUT
D.U.T.
t(ON)
td(ON)
t(OFF)
td(OFF) tF
tr
INPUT
INPUT
OUTPUT
10V
V
DD
RGEN
0V
0V
3
TN0620
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Typical Performance Curves
Output Characteristics
4.0
3.2
2.4
1.6
0.8
0 10 20 30 5040
VDS (volts)
I)serepma(
D
Saturation Characteristics
4.0
3.2
2.4
1.6
0.8
0
0 2 4 6 108
3V
10V
2V
4V
6V
8V
VDS (volts)
I)serepma(
D
Maximum Rated Safe Operating Area
1 100010010
0.1
1.0
10
0.01
VDS (volts)
I)s
e
r
e
pma(
D
Thermal Response Characteristics
)de
z
ilamron(
e
cnatsi
s
eR lamrehT
1.0
0.8
0.6
0.4
0.2
0.001 100.01 0.1 1
tp(seconds)
Transconductance vs. Drain Current
1.0
0.8
0.6
0.4
0.2
0
0 2.50.5 1.0 1.5 2.0
GS
F)sne
m
eis(
ID(amperes)
Power Dissipation vs. Case Temperature
2.0
1.0
0
0 15010050 1257525
TC
O
C)(
D
P)sttaw(
10V
8V
6V
4V
3V
2V
TO-92
VDS = 25V
TA = -55
O
C
TA = 25
O
C
TC = 25
O
C
TA = 150
O
C
VGS =
0
0
TO-92 (DC)
VGS =
TO-92
PD = 1W
TC = 25
O
C
4
TN0620
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Typical Performance Curves (cont.)
Gate Drive Dynamic Characteristics
Q (nanocoulombs)
G
VS
G)
st
lo
v
(
Tj
)
h
t(SG ron(
V)d
e
zi
la
m
)NO(SD (R )dezilamron
VDS(th) and R Variation with Temperature
C)(
O
On-Resistance vs. Drain Current
(amperes)
D
)smho(
)NO(SD
R
Variation with Temperature
DSS
SSD )dezil
a
mron(
V
B
C)
O
(Tj
Transfer Characteristics
VGS (volts)
I)serepma
(
D
Capacitance vs. Drain-to-Source Voltage
200
150
100
50
0
)
sdarafo
c
ip(
C
VDS (volts)
I
BV
0 10 20 30 40
0 2 4 6 8 10
4.0
3.2
2.4
1.6
0.8
0
-50 0 50 100 150
1.1
1.0
0.9
15
12
9
6
3
0
1.4
1.2
1.0
0.8
0.6
2.0
1.6
1.2
0.8
0.4
0
10
8
6
4
2
0 0.5 1.0 1.5 2.0 2.5
-50 0 50 100 150
100 pF
V
DS
= 40V
V
DS
= 10V
178 pF
(th)
V @ 1mA
V
GS
= 5V
V
GS
= 10V
T= -55OC
A
V
DS
= 25V
C
ISS
C
OSS
C
RSS
0 0.8 1.6 2.4 4.03.2
R @ 10V, 0.5A
DS
f = 1MHz
0
T= 25OC
A
T= 150OC
A
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an
adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the
replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications
are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com.
©2008 All rights reserved. Unauthorized use or reproduction is prohibited.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
5
TN0620
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-TN0620
A111708
3-Lead TO-92 Package Outline (N3)
Symbol A b c D E E1 e e1 L
Dimensions
(inches)
MIN .170 .014.014.175 .125 .080 .095 .045 .500
NOM - - - - - - - - -
MAX .210 .022.022.205 .165 .105 .105 .055 .610*
JEDEC Registration TO-92.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
† This dimension is a non-JEDEC dimension.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version D080408.
Seating Plane
1
2
3
Front View Side View
Bottom View
E1 E
D
e1
L
e
c
1 2 3
b
A