CD eackano High CMR Isolation Amplifiers Technical Data Features * 15 kV/us Common-Mode Rejection at Voy = 1000 V* * Compact, Auto-Insertable Standard 8-pin DIP Package * 4.6 uV/C Offset Drift vs. Temperature * 0.9 mV Input Offset Voltage 85 kHz Bandwidth 0.1% Nonlinearity * Worldwide Safety Approval: UL 1577 (3750 V rms/1 min), VDE 0884 and CSA Advanced Sigma-Delta (* A) A/D Converter Technology Fully Differential Circuit Topology * 1 um CMOS IC Technology Applications * Motor Phase Current Sensing General Purpose Current Sensing High-Voltage Power Source Voltage Monitoring *The terms common-mode rejection (CMR) and isolation-mode rejection (IMR) are used interchangeably throughout this data sheet. * Switch-Mode Power Supply Signal Isolation General Purpose Analog Signal Isolation Transducer Isolation Description The HCPL-7800 high CMR isolation amplifier provides a unique combination of features ideally suited for motor control circuit designers. The product provides the precision and stability needed to accurately monitor motor current in high- noise motor control environ- ments, providing for smoother control (less torque ripple) in various types of motor control applications. This product. paves the way for a smaller, lighter, easier to produce, high noise rejection, low cost solution to motor current sensing. The product can also be used for general analog signal isolation applications requiring high accuracy, stability and linearity under similarly severe noise conditions. For general HCPL-7800 HCPL-7800A HCPL-7800B applications, we recommend the HCPL-7800 which exhibits a part-to-part gain tolerance of + 5%. For precision applications, HP offers the HCPL-7800A and HCPL-7800B, each with part-to- part gain tolerances of + 1%. The HCPL-7800 utilizes sigma- delta (ZA) analog-to-digital converter technology, chopper stabilized amplifiers, and a fully differential circuit topology fabricated using HPs | pm CMOS IC process. The part also couples our high-efficiency. high- speed AlGaAs LED to a high- speed, noise-shielded detector Functional Diagram 1 1 1 ppt poz g Yoo. Vopz l Uw Vins O= > Vout+ l 3 Vin | Vout- i | GND 0 GND: 2 CMA SHIELD CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage anWor degradation which may be induced by ESD. 1-216 5965-3592Eusing our patented light-pipe optocoupler packaging technology. Together, these features deliver unequaled isolation-mode noise rejection, as well as excellent offset and gain accuracy and stability over time and tempera- ture. This performance is delivered in a compact, auto- insertable, industry standard 8- pin DIP package that meets worldwide regulatory safety standards (gull-wing surface mount option #300 also available). Ordering Information: HCPL-7800x No Specifier = + 5% Gain Tol.; Mean Gain Value = 8.00 A = + 1% Gain Tol.; Mean Gain Value = 7.93 B = + 1% Gain Tol.; Mean Gain Value = 8.07 Option yyy 300 = Gull Wing Surface Mount Lead Option 500 = Tape/Reel Package Option (1 k min.) Option datasheets available. Contact your Hewlett-Packard sales representative or authorized distributor for information. Package Outline Drawings Standard DIP Package = 9:40 (0.370) 9.90 (0.390} 1 1 fa (7) fey cs) by . __ TYPE NUMBER 0.20 (0.008 0.33 (0.013) 6.10 (0.240 HP 7800 DATE CODE Soe e280) yrww + 7.36 (0.290) 7.88 (0.310) , 5 TYP. : ' ft ' PIN ONE {u 2) Wy ] _ i 1.19 (0.047)MAX. > ~ 1.78 (0.070) MAX. i 4.70 (0.185) MAX. ' i PIN DIAGRAM Yop1 Ypn2 [8] PIN ONE - ia ' "0,51 (0.020) MIN. 21vin. Vi 7 | 2.92 (0.115) MIN. [2]m. Your. {7 ] ' | | [3]m- Your-[6] 0.76 (0.030) =| 0,65 (0.025) MAX. 1.24 (0.049) ~* [4]cnp+ anv2[5] ~ << 2.28 (0.090) 2.80 (0.110) * TYPE NUMBER FOR: HCPL-7800 = 7800 HCPL-7800A = 7800A HCPL-7800B = 7800B DIMENSIONS IN MILLIMETERS AND (INCHES). 1-217 OPTOCOUPLERSGull Wing Surface Mount Option 300* PIN LOCATION (FOR REFERENCE ONLY) 9.65 + 0.25 1.02 (0.040) (0.380 + 0.010} r 1.19 (0.047) t OCI C3 i a 4.83 (0.190)"*?- HP 7600 6.350 + 0.25 YYWW (0.250 x 0.010) 9.65 + 0.25 (0.380 + 0.010) Y MOLDED ay wy Ooo - + 0.380 (0.015) 1.19 (0.047) 0.635 (0.025) 1.78 (0.070) ~ 1.780 9.65 + 0.25 (0.070) (0.380 0.010) 1.19 MAX. : (0.047 a 7622025 pi MAX. (0.300 + 0.010) 4 0.20 (0.008) 4.19 0.33 (0.013) (oriesyMAX- v 1.080+0.320 , A 4 0.635 2 0.25 4 (0.043 + 0.013) | (0.025 + 0.010) | 0.51 + 0.130 2.540 < (0.020 0.005) > = 12NOM. (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). TOLERANCES (UNLESS OTHERWISE SPECIFIED): xx.xx = 0.01 LEAD COPLANARITY XX.KXX = 0.005 * REFER TO OPTION 300 DATA SHEET FOR MORE INFORMATION. Maximum Solder Reflow Thermal Profile 260 240 220 200 186 160 140 120 100 80 60 40 20 0 AT = 115C, 0.3C/SEC TEMPERATURE - C AT = 145C, 1C/SEC 0 1 2 3 4 5 6 7 TIME ~ MINUTES 10 1 12 (NOTE: USE OF NON-CHLORINE ACTIVATED FLUXES IS RECOMMENDED.) 1-218 MAXIMUM: 0.102 (0.004)Regulatory Information wn The HCPL-7800 has been a] approved by the following 5 organizations: = a UL CSA VDE o Recognized under UL 1577, Approved under CSA Component Approved according to VDE Component Recognition Acceptance Notice #5, File CA 0884/06.92. Program, File E55361. 88324. Insulation and Safety Related Specifications Parameter Symbol | Value | Units Conditions Min. External Air Gap Ld01) 7.4 | mm _ | Measured from input terminals to output terminals, (External Clearance) shortest distance through air Min. External Tracking Ld02) 8.0 mm | Measured from input terminals to output terminals, Path (External Creepage) shortest distance path along body Min. Internal] Plastic Gap 0.5 mm _ | Through insulation distance, conductor to conductor, (internal Clearance) usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity Tracking Resistance CTI 175 Vv DIN IEC 112/VDE 0303 Part 1 (Comparative Tracking Index} Isolation Group Illa Material Group (DIN VDE 0110, 1/89, Table 1) Option 300 surface mount classification is Class A in accordance with CECC 00802. VDE 0884 (06.92) Insulation Characteristics Description Symbol Characteristic Unit Installation classification per DIN VDE 0110, Table 1 for rated mains voltage < 300 V rms LIV for rated mains voltage < 600 V rms LI Climatic Classification 40/100/21 Pollution Degree (DIN VDE 0110, Table 1)* 2 Maximum Working Insulation Voltage VioRM 848 V peak Input to Output Test Voltage, Method b** VpR 1591 V peak Ver = 1.875 x Viorm, Production test with tp = 1 sec. Partial discharge < 5 pC Input to Output Test Voltage, Method a** VPR 1273 V peak Ver = 1.5 x Viorm, Type and sample test with tp = 60 sec, Partial discharge < 5 pC Highest Allowable Overvoltage** (Transient Overvoltage trr = 10 sec) Vir 6000 V peak Safety-limiting values (Maximum values allowed in the event of a failure, also see Figure 27) Case Temperature Ts 175 C Input Power Ps Input 80 mw Output Power Ps, ourpat__ 250 mw Insulation Resistance at Ts, Vio = 500 V Rs 21x10!2 Q *This part may also be used in Pollution Degree 3 environments where the rated mains voltage is < 300 V rms (per DIN VDE 0110). **Refer to the front of the optocoupler section of the current catalog for a more detailed description of VDE 9884 and other product safety requirements. Note: Optocouplers providing safe electrical separation per VDE 0884 do so only within the safety-limiting values to which they are qualified. Protective cut-out switches must be used to ensure that the safety limits are not exceeded. 1-219Absolute Maximum Ratings Parameter Symbol Min. Max. Unit | Note Storage Temperature Ts -55 125 C Ambient Operating Temperature Ty -40 100 C Supply Voitages Vpp1-. Vpop2 0.0 5.5 Vv Steady-State Input Voltage Vines Vine -2.0 Vppi +0.5 Vv Two Second Transient Input Voltage -6.0 Output Voltages Vour+: Vout. -0.5 Vop2 +0.5 v Lead Solder Temperature Tis 260 C i (1.6 mm below seating plane, 10 sec.) Reflow Temperature Profile See Package Outline Drawings Section Recommended Operating Conditions Parameter Symbol Min. Max. Unit Note Ambient Operating Temperature Ta -40 85 *C 2 Supply Voltages Vpp1, Vpp2 4.5 5.5 Vv 3 Input Voltage Vinge VIN. -200 200 mV 4 Output Current [Lol 1 mA 5 1-220DC Electrical Specifications All specifications and figures are at the nominal operating condition of Vy, = OV, Vyy. = 0 V, Ty = 25C, Vop) = 5.0 V, and Vppe = 5.0 V, unless otherwise noted. Current Parameter Symbol Min. | Typ. | Max. Unit Test Conditions Fig. | Note Input Offset Voltage Vos -18 -0.9 | 0.0 mV 1 Input Offset Drift vs. dVo3/dT -2.1 HVC 1,2 6 Temperature Abs. Value of Input | dVoc/AT | 4.6 pyc 1 7 Offset Drift vs. Termperature Input Offset Drift vs. Vpp, AVo3/dVpn1 30 uviV 1,3 8 Input Offset Drift vs. Vppo AVo5/dVpn2 -40 uv/V 1,4 9 Gain (+ 5% Tol.) G 7.61 | 8.00 | 8.40 -200 mV < Vy, < 200mV| 1,5 i0 Gain - A Version (+ 1% Tol.) Gy 7.85 | 7.93 | 8.01 Gain - B Version (+ 1% Tol.) Gp 7.99 | 8.07 | 8.15 Gain Drift vs. Temperature dG/aT 0.001 %/PC 5.6 11 Abs. Value of Gain Drift vs. |dG/aT| 0.001 %PC 5 12 Temperature Gain Drift vs. Vop, dG/dp5, 0.21 SAY 5.7 | 13 Gain Drift vs. Vpp dG/dVpp -0.06 HV 5,8 14 200 mV Nonlinearity NL299 0.2 | 0.35 % 5,9 15 200 mV Nonlinearity Drift ANL.99/d TF -0.001 % pts/C 5,10} 16 vs, Temperature 200 mV Nonlinearity Drift ANL29/d pp) -0.005 % pts/V 5.11] 17 vs. Yoni 200 mV Nonlinearity Drift ANLop9'dVpps -0.007 % pts/V 5,12] 18 8. Vppz 100 mV Nonlinearity NL jo9 0.1 | 0.25 % -100 mV< Vy, < 100 mV] 5,13] 19 Maximum Input Voltage [Vine | max 300 mV 14 Before Output Clipping Average Input Bias Current In -670 nA 15,16) 20 Input Bias Current dpy'dT 3 nd/?C Temperature Coefficient Average Input Resistance Ry 330 kQ 15 20 Input Resistance dRp/aT 0.38 %/PC Terperature Coefficient Input DC Common-Mode CMRRp 72 dB 21 Rejection Ratio Output Resistance Ro 11 Q 5 Output Resistance dR,/dT 0.6 %/PC Temperature Coefficient Output Low Voltage Vo 1.18 Vv Vin] = 500 mv 14 22 Output High Voltage oH 3.61 Vv Tours = OA Tgyr. = OA Output Common-Mode Vocm 2.20 | 2.39 | 2.60 Vv -40C < T, < 85C 14 Voltage 45 V <Vpp, <5.5V Input Supply Current Ippi 10.7 | 15.5 mA 17 23 Output Supply Current Tpp: 11.6 | 14.5 mA ny = 200 mV, 18 24 -40C < Ty < 85C 4A5V <Vop. < 5.5 V Output Short-Circuit [ose | 9.3 mA Vour = 0 V or Vops 25 1-221 0] 0101010) maa i-)AC Electrical Specifications All specifications and figures are at the nominal operating condition of Vy, = 0 V, Vin. = OV, Ty = 25C, Vppi = 5.0 V, and Vppe = 5.0 V, unless otherwise noted. Parameter Symbol | Min. | Typ. | Max. Unit Test Conditions Fig. Note Rising Edge Isolation IMRp 10 25 kV/us | Vin = L kV 19,20 | 26 Mode Rejection Falling Edge fsolation IMRp 10 15 kV/us Mode Rejection Isolation Mode Rejection IMRR > 140 dB 19 27 Ratio at 60 Hz Propagation Delay to 10% tepio 2.0 3.3 Hs -40C < Ty < 85C 21, 22 Propagation Delay to 50% tppso 3.4 5.6 ps Propagation Delay to 90% tengo 6.3 9.9 ps Rise/Fall Time (10%-90%) tr 4.3 6.6 ps Bandwidth (-3 dB) f sap 50 85 kHz 23, 24 Bandwidth (-45) figs: 35 kHz RMS Input-Referred Vw 300 uV rms | Bandwidth = 100 kHz | 25, 26 28 Noise Power Supply Rejection PSR 5 mV, 29 Package Characteristics All specifications and figures are at the nominal operating condition of Vy, = 0 V. Viv. = 0 V, Ty = 25C, Vpp = 5.0 V, and Vpn2 = 5.0 V, unless otherwise noted. Parameter Symbol | Min. | Typ. | Max. | Unit Test Conditions Fig. | Note Input-Output Momentary Viso 3750 Vrms | = 1 min., RH < 50% 30, 31 Withstand Voltage* Input-Output Resistance Ryo 102 | 1038 Q Ty = 25C | Vp9 = 500 Vde 30 10}3 T, = 100C Input-Output Capacitance Cro 7 pF f = 1 MHz 30 Input IC Junction-to- Qe 96 C/W 32 Case Thermal Resistance Output IC Junction-to-Case Gieo 1l4 CAV Thermal Resistance *The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Characteristics Table (if applicable), your equipment level safety specification, or HP Application Note 1074, *Optocoupler Input-Output Endurance Voltage. 1-222Notes: General Note: Typical values represent the mean value of all characterization units at the nominal operating conditions. Typical drift specifications are determined by calculating the rate of change of the speci- fied parameter versus the drift parameter {at nominal operating conditions) for each characterization unit, and then averaging the individual unit rates. The correspond- ing drift figures are normalized to the nominal operating conditions and show how much drift occurs as the particular drift parameter is varied from its nominal value, with all other parameters held at their nominal operating values. Figures show the mean drift of all characterization units as a group, as well as the + 2-sigma statistical limits. Note that the typical drift specifications in the tables below may differ from the slopes of the mean curves shown in the corresponding figures. 1. HP recommends the use of non- chlorine activated fluxes. . The HCPL-7800 will operate properly at ambient temperatures up to LO0C but may not meet published specifi- cations under these conditions. DC performance can be best maintained by keeping Vpp, and Vpp2 as close as possible to 5 V. See application section for circuit recommendations. . HP recommends operation with Viv. = 0 V (tied to GND1). Limiting Vy, to 100 mV will improve DC nonlinearity and nonlinearity drift. if Vin. is brought above 800 mV with respect to GND 1. an internal test mode may be activated. This test mode is not intended for customer use. . Although. statistically, the average difference in the output resistance of pins 6 and 7 is near zero, the standard deviation of the difference is 1.3 Q due to normal process variations. Consequently, keeping the output current below 1 mA will ensure the best offset performance. Data sheet value is the average change in offset voltage versus temperature at T, = 25C, with all other parameters held constant. This value is expressed as the change in offset voltage per C change in temperature. . Data sheet value is the average magnitude of the change in offset voltage versus temperature at T, = 25C, with all other parameters held constant. This value is expressed Ww oo we or a -1 go 10. 1, 12. 15. as the change in magnitude per *C change in temperature. Data sheet value is the average change in offset voltage versus input supply voltage at Vpp, = 5 V, with all other parameters held constant. This value is expressed as the change in offset voltage per volt change of the input supply voltage. . Data sheet value is the average change in offset voltage versus output supply voltage at Vpn = 5 V, with all other parameters held constant. This value is expressed as the change in offset voltage per valt change of the output supply voltage. Gain is defined as the slope of the best-fit line of differential output voltage (Voyr+ - Your.) versus differential input voltage (Vin. -Vin) over the specified input range. Data sheet value is the average change in gain versus temperature at T, = 25C, with all other parameters held constant. This value is expressed as the percentage change in gain per C change in temperature. Data sheet value is the average magnitude of the change in gain versus temperature at T, = 25C. with all other parameters held constant. This value is expressed as the percentage change in magnitude per C change in temperature. . Data sheet value is the average change in gain versus input supply voltage at Vpn. = 5 V, with all other parameters held constant. This value is expressed as the percentage change in gain per volt change of the input supply voltage. . Data sheet value is the average change in gain versus output supply voltage at Vppe = 5 V. with all other parameters held constant. This value is expressed as the percentage change in gain per valt change of the output supply voltage. Nonlinearity is defined as the maxi- mum deviation of the output voltage from the best-fit gain line (see Note 10), expressed as a percentage of the full-scale differential output voltage range. For example, an input range of +200 mV generates a full-scale differ- ential output range of 3.2 V (+ 1.6 V0): a Inaximum output deviation of 6.4 mV would therefore correspond to a nonlinearity of 0.2%. 16. Data sheet value is the average change in nonlinearity versus temperature at Ts, = 25C, with all other parameters held constant. This value is expressed as the number of percentage points that the nonlinearity will change per C change in temperature. For example, if the temperature is increased from 25C to 35C, the nonlinearity typically will decrease by 0.01 percentage points (10C times -0.001 % pts/C) from 0.2% to 0.19%. - Data sheet value is the average change in nonlinearity versus input supply voltage at Vpp; = 5 V. with all other parameters held constant. This value is expressed as the number of percentage points that the nonlinearity will change per volt change of the input supply voltage. 18. Data sheet value is the average change in nonlinearity versus output supply voltage at Vpn = 3 V. with all other parameters held constant. This value is expressed as the number of percentage points that the nonlinearity will change per volt change of the output supply voltage. 19. NLj 59 is the nonlinearity specified over an input voltage range of + 100 mV. 20. Because of the switched-capacitor nature of the input sigma-delta converter, time-averaged values are shown. 21. This parameter is defined as the ratio of the differential signal gain (signal applied differentially between pins 2 and 3) to the common-mode gain (input pins tied together and the signal applied to both inputs at the same time). expressed in dB. 22. When the differential input signal exceeds approximately 300 mV, the outputs will limit at the typical values shown. 23. The maximum specified input supply current occurs when the differential input voltage (Viv, - Vix.) = 0 V. The input supply current decreases approximately 1.3 mA per 1V decrease in Vpn). 24. The maximum specified output supply current occurs when the differential input voltage (Viy4 - Vy) = 200 mV. the maximum recommended operating input voltage. However, the output supply current will continue to rise for differential input voltages up to approximately 300 m, beyond which the output supply current remains constant. ~] 1 1-223 OPTOCOUPLERS25, Short circuit current is the amount of output current generated when either output is shorted to Ypp2 or ground. 26. IMR (also known as CMR or Common Nw -1 Figure lL. 0.1 pF Mode Rejection) specifies the mini- mum rate of rise of an isolation mode noise signal at which small output perturbations begin to appear. These output perturbations can occur with both the rising and falling edges of the isolation-mode wave form and may be of either polarity. When the perturba- tions first appear, they occur only occasionally and with relatively small peak amplitudes (typically 20-30 mV at the output of the recommended application circuit). As the magnitude of the isolation mode transients increase, the regularity and amplitude of the perturbations also increase. See applications section for more information. . IMRR is defined as the ratio of differential signal gain (signal applied differentially between pins 2 and 3) to HCPL-7800 0.4 pF 1 Vw 8 | 10K in the isolation mode gain (input pins tied to pin 4 and the signal applied between the input and the output of the isolation amplifier) at 60 Hz. expressed in dB. 28. Output noise comes from two primary sources: chopper noise and sigma- delta quantization noise, Chopper noise results from chopper stabiliza- tion of the output op-amps. It occurs at a specific frequency (typically 200 kHz at room temperature), and is not attenuated by the internal output filter. A filter circuit can be easily added to the external post-amplifier to reduce the total rms output noise. The internal output filter does eliminate most, but not ail, of the sigma-delta quantization noise. The magnitude of the output quantization noise is very stnall at lower frequencies (below 10 kHz) and increases with increasing frequency. See applications section for more information. +15V eo in AD624CD 10K ry a = = 0.33 pF 1-224 Input Offset Voltage Test Circuit. GAIN = 1000 | 0.1 pF 0.33 pF = 15V 30. 3 pear 32. dV - INPUT-REFERREDO OFFSET DRIFT - pV . Data sheet value is the differential amplitude of the transient at the output of the HCPL-7800 when a 1 Vixpx: 1 MHz square wave with 5 ns rise and fall times is applied to both Vpn; and Yppe- This is a two-terminal measurement: pins ]-4 are shorted together and pins 5-8 are shorted together. . Inaccordance with UL1577, for devices with minimum Viso specified at 3750 Vins each optocoupler is proof- tested by applying an insulation test voltage greater-than-or-equal-to 4500 Vims for one second (leak current detection limit. Iq < 5 WA). This test is performed before the method b, 100% production test for partial discharge shown in the VDE 0884 Insulation Characteristics Table. Case temperature was measured with a thermocouple located in the center of the underside of the package. 1500 o === MEAN mame 2 SIGMA 1000 - 40-20 2 #840 600680 (100 Ty TEMPERATURE - C Figure 2. Input-Referred Offset Drift vs. Temperature.600 - T = MEAN =2 SIGMA 400 200 Vos - INPUT-REFERRED OFFSET DRIFT ~ pV 44 46 48 50 52 54 56 Vpp1~ INPUT SUPPLY VOLTAGE - V Figure 3. Input-Referred Offset Drift vs. Vopi (Vnp2 = 5 VY). _ MEAN | +2SIGMA , dVog - INPUT-REFERRED OFFSET DRIFT - pv 3 44 46 48 5.0 5.2 54 5.6 Vop2 ~ OUTPUT SUPPLY VOLTAGE - Figure 4. Input-Referred Offset Drift vs. Vopz (Vpp1 = 5 V). +5V +5V +15. 0.1 pF 0.1 uF HCPL-7800 0.1 pF F = 1 aj) > 10K = Viy O- z WAN our 3 6 AA > A ADE2ACD GAIN =1 0.01 pF 4 5 10K 15 Figure 5. Gain and Nonlinearity Test Circuit. 05 0 # I i 05 J g a Zz S 10 I g a 1.5 . cot -_-_ MEAN + 2SIGMA -2.0 a ; 44 46 48 5.0 5.2 5.4 5.6 Vpo1 ~ INPUT SUPPLY VOLTAGE - V Figure 7. Gain Drift vs. Vpp1 (Yppz = 5 V). GG GAIN DRIFT- % 44 46 48 50 5.2 54 5.6 Vpp2 OUTPUT SUPPLY VOLTAGE - V Figure 8. Gain Drift vs. Vppz (Vpn = 5 V). OPTOCOUPLERS 15 7 | = MEAN | " x 2SIGMA 08 dG GAIN DRIFT- % 0.5 40 = -20 o 200 40 60 BO 100 Ta- TEMPERATURE - C Figure 6. Gain Drift vs. Temperature. 0a == MEAN Hl o2|- 22 SIGMA 1 4 3 9 O41 - we. 4 M AN z / \ s of\ -- z \ 7 z -O.1 \ 0 S ce a a 0.2 0.3 0.2 oA 0 of 0.2 Vin INPUT VOLTAGE - V Figure 9. 200 mV Nonlinearity Error Plot. 1-2250.08 s " . whee ONL o99 - 200 mV NON-LINEARITY DRIFT % PTS 40-20 o 20 40 60 80s100 T,a TEMPERATURE - C Figure 10. 200 mV Nonlinearity Drift vs. Temperature. ERROR - % OF FULL-SCALE = = MEAN un 2 2 SIGMA 0.10 0.05 q 0.05 9.10 Viy ~ INPUT VOLTAGE - V Figure 13. 100 mV Nonlinearity Error Plot. INPUT CURRENT - mA Ww 4 4 2 Q 2 4 6 Vin- INPUT VOLTAGE - V Figure 16. Typical Input Current vs. Input Voltage. 1-226 0.06 Hy ~ ne : == MEAN ' , 0.04 | Morr, 22S10MA 0.02 NL 299 200 mV NON-LINEARITY DRIFT - % PTS 4446 48 50 52 54 56 V1 INPUT SUPPLY VOLTAGE - V Figure 11. 200 mV Nonlinearity Drift vs. Voni (Ypp2 = 5 V)- 40 35 tf > ? i 4 & 30 7 = = ! 3 POSITIVE > 25 OUTPUT 1 5 {PIN 7) : 5 20|| nece 5 29 || NEGATIVE 6 ouTPuT o {PIN 6} y > 415 to 10 06 04 02 0 02 04 06 Viy INPUT VOLTAGE - V Figure 14. Typical Output Voltages vs. Input Voltage. 10.5 10.0 35 9.0 men Ta = 40C | Ta = 25C = Hh = 85C { pp, NPUT SUPPLY CURRENT - mA 85 n O04 03 02 01 0 O11 02 03 O04 Vy INPUT VOLTAGE - V Figure 17, Typical Input Supply Current vs. Input Voltage. an & 0.06 z | ft 0.04 4 oa E = 0.02 wl z 3 z So or; =z = = 3 0.02 t 3 & 2 0.04 a 44 46 48 5.0 5.2 5.4 5.6 Vpp2 OUTPUT SUPPLY VOLTAGE ~ V Figure 12. 200 mV Nonlinearity Drift vs. Vppn2 (Vpn, = 5 V). ty- INPUT CURRENT - nA 0.2 0.1 0.1 0.2 Vin INPUT VOLTAGE - V Figure 15. Typical Input Current vs. Input Voltage. so _ a 2 a Ipo2 OUTPUT SUPPLY CURRENT mA = = i) = 2 0 . 0.4 03 0<2 01 0 O01 02 03 04 Vin INPUT VOLTAGE - V Figure 18. Typical Output Supply Current vs. Input Voltage.OPTOCOUPLERS 7805 HCPL-7800 0.1 pF we ih < al : nn So = | toe Le wm im 3 zx 330 pF BAK PULSE GEN. 45V 7 7 vim Figure 19. Isolation Mode Rejection Test Circuit. 10 DELAY TO 90% RISE/FALL TIME: aL em DELAY 70 50% | - ume DELAY TO 10% 1000 V g 6 I 2 v -_0v = IM 5 4 2 _. 50 mV PERTURBATION (DEFINITION OF FAILURE) ' ' 0 -40 -20 o 20 40 60 80 100 ov " ~ ea . eavw Ta TEMPERATUAE - C Figure 20. Typical IMR Failure Waveform. Figure 21. Typical Propagation Delays and Rise/Fall Time vs. Temperature. 4-227Your tepio ~~ Vin O tT 0.01 pF 50% lw tepsd - ~ = tepso > 10.0 K AA +hV +15 0.1 pF HCPL-7800 0.1 pF A V7 ala 2.00 K 7- ? a A, . 6 + OP-42 5 2.00 K = 0.1 pF 10.0 K | -15V Figure 22. Propagation Delay and Rise/Fall Time Test Circuit. RELATIVE AMPLITUDE - dB 45 i 500 1000 5000 10000 f FREQUENCY - Hz 5000 Figure 23. Typical Amplitude and Phase Response vs. Frequency. 1-228 100000 @~ PHASE - DEGREES 110 7 7 7 2 | ~3dB BANDWIDTH ' === 45 DEGREE PHASE z 100 BANDWIDTH 4 i : : x 4 = 98 40 a < a o 80 36 CG 1 2 a 70 32 60 1 . 28 40-20 0 20 40 60 80 100 Ty ~ TEMPERATURE - C Figure 24. Typical 3 dB and 45 Bandwidths vs. Temperature. +O Vout x 3.0 a = |='NO BANDWIDTH LIMITING 1 > BANDWIDTH LIMITED TO 100 kHz z 2.8 | = BANDWIDTH LIMITED TO 10 kHz | = w i I a a ' gy 8 @ =& 15 ;- - -+- a Pr & V0 |.) ee z & w z | a z \ ed 05 | < wo 1 = L 5 c o - _ _ =| e 4 Tacttrrec 4 - z o > 0 so 100150 200280 Vin INPUT VOLTAGE mv Figure 25. Typical RMS Input-Referred Noise vs. Input Voltage.FLOATING POSITIVE SUPPLY o cs OPTOCOUPLERS 75 pF Ra 10.0 Ka +5V +15 IN ut lo ca 78L05 rt 0.1 uF cA ee 1 2 =~ 01 pe =0.1 pF iO BI = 0.1 uF RA = 2 ? 2.00 KQ = AWA v2 Ar > v a5 HCPL-7800 us bo Vout MOTOR 39.2 0.01 pF_3) VW + Ra ose 4 + 4 5 2.00 KQ Rsense c7 = 0.1 pF C6 4 75 pF 10.0 Ka = = Hy- Figure 26. Recommended Application Circuit. 400 +4 OUTPUT POWER, Ps | INPUT POWER, Ps z 300} - | soda: E ror | t poostennt sreteeetecereney B pop So . : I ie, a aot ! ial a 1 4 a 100 Ly it 1 7 ote | LL it. Li . 0 20 40 60 80 100120 140 160/180 5 Ta TEMPERATURE - C Figure 27. Dependence of Safety- Limiting Parameters on Ambient Temperature. Applications Information Functional Description Figure 28 shows the primary functional blocks of the HCPL- 7800. In operation, the sigma- delta analog-to-digital converter converts the analog input signal into a high-speed serial bit stream, the time average of which is directly proportional to the input signal. This high speed stream of digital data is encoded and optically transmitted to the detector circuit. The detected signal is decoded and converted into accurate analog voltage levels, which are then filtered to produce the final output signal. To help maintain device accuracy over time and temperature, internal amplifiers are chopper- stabilized. Additionally, the encoder circuit eliminates the effects of pulse-width distortion of the optically transmitted data by generating one pulse for every edge (both rising and falling) of the converter data to be transmitted, essentially converting the widths of the sigma-delta output pulses into the positions of the encoder output pulses. A significant benefit of this coding scheme is that any non-ideal characteristics of the LED (such as non-linearity and drift over time and temperature) have little, if any, effect on the performance of the HCPL-7800. 1-229Circuit Information The recommended application circuit is shown in Figure 26. A floating power supply (which in many applications could be the same supply that is used to drive the high-side power transistor) is regulated to 5 V using a simple three-terminal voltage regulator. The input of the HCPL-7800 is connected directly to the current sensing resistor. The differential output of the isolation amplifier is converted to a ground-referenced single-ended output voltage with a simple differential amplifier circuit. Although the application circuit is relatively simple, a few general recommendations should be followed to ensure optimal performance. As shown in Figure 26, 0.1 uF bypass capacitors should be located as close as possible to the input and output power supply pins of the HCPL-7800. Notice that pin 2 (Vj) is bypassed with a 0.01 uF capacitor to reduce input offset voltage that can be caused by the combination of long input leads and the switched- capacitor nature of the input circuit. With pin 3 (Vjy_) tied directly to pin 4 (GND1), the power-supply return line also functions as the sense line for the negative side of the current-sensing resistor; this allows a single twisted pair of wire to connect the isolation amplifier to the sense resistor. In some applications, however. better performance may be obtained by connecting pins 2 and 3 (Vy, and Vy.) directly across the sense resistor with twisted pair wire and using a separate wire for the power supply return line. Both input pins should be bypassed with 0.01 1-230 uF capacitors close to the isolation amplifier. In either case, it is recommended that twisted- pair wire be used to connect the isolation amplifier to the current- sensing resistor to minimize electro-magnetic interference of the sense signal. To obtain optimal CMR perfor- mance, the layout of the printed circuit board (PCB) should minimize any stray coupling by maintaining the maximum possible distance between the input and output sides of the circuit and ensuring that any ground plane on the PCB does not pass directly below the HCPL- 7800. An example single-sided PCB layout for the recommended application circuit is Shown in Figure 29. The trace pattern is shown in X-ray view as it would be seen from the top of the PCB; a mirror image of this layout can be used to generate a PCB. An inexpensive 78L05 three- terminal regulator is shown in the recommended application circuit. Because the performance of the isolation amplifier can be affected by changes in the power supply voltages, using regulators with tighter output voltage tolerances will result in better overall circuit performance. Many different regulators that provide tighter output voltage tolerances than the 78L05 can be used, including: TL780-05 (Texas Instruments), LM340LAZ-5.0 and LP2950CZ- 5.0 (National Semiconductor). The op-amp used in the external post-amplifier circuit should be of sufficiently high precision so that it does not contribute a significant amount of offset or offset drift relative to the contribution from the isolation amplifier. Generally, op-amps with bipolar input stages exhibit better offset performance than op-amps with JFET or MOSFET input stages. In addition, the op-amp should also have enough bandwidth and slew rate so that it does not adversely affect the response speed of the overall circuit. The post-amplifier circuit includes a pair of capacitors (C5 and C6) that form a single-pole low-pass filter; these capacitors allow the bandwidth of the post-amp to be adjusted independently of the gain and are useful for reducing the output noise from the isolation amplifier. Many different op-amps could be used in the circuit, including: MC34082A (Motorola), TLO32A, TLO52A, and TLC277 (Texas Instruments), LF412A (National Semiconductor). The gain-setting resistors in the post-amp should have a tolerance of 1% or better to ensure adequate CMRR and adequate gain tolerance for the overall circuit. Resistor networks can be used that have much better ratio tolerances than can be achieved using discrete resistors. A resistor network also reduces the total number of components for the circuit as well as the required board space. The current-sensing resistor should have a relatively low value of resistance to minimize power dissipation, a fairly low inductance to accurately reflect high-frequency signal compo- nents, and a reasonably tight tolerance to maintain overall circuit accuracy. Although decreasing the value of the sense resistor decreases power dissipation, it also decreases the full-scale input voltage making iso-amp offset voltage effects more significant. These twoconflicting considerations, therefore, must be weighed against each other in selecting an appropriate sense resistor for a particular application. To maintain circuit accuracy, it is recommended that the sense resistor and the isolation amplifier circuit be located as close as possible to one another. Although it is possible to buy current- sensing resistors from established vendors (e.g., the LVR-1, -3 and -5 resistors from Dale), it is also possible to make a sense resistor using a short piece of wire or even a trace on a PC board. VOLTAGE REGULATOR Figures 30 and 31 illustrate the response of the overall isolation amplifier circuit shown in Figure 26. Figure 30 shows the response of the circuit to a+ 200 mV 20 kHz sine wave input and Figure 31 the response of the circuit to a + 200 mV 20 kHz square wave input. Both figures demonstrate the fast, well-behaved response of the HCPL-7800. Figure 32 shows how quickly the isolation amplifier recovers from an overdrive condition generated by a 2 kHz square wave swinging between 0 and 500 mV (note that CLOCK GENERATOR ISOLATION BOUNDARY the time scale is different from the previous figures). The first wave form is the output of the application circuit with the filter capacitors removed to show the actual response of the isolation amplifier. The second wave form is the response of the same circuit with the capacitors installed. The recovery time and overshoot are relatively independent of the amplitude and polarity of the overdrive signal, as well as its duration. OPTOCOUPLERS For more information, refer to Application Note 1059. VOLTAGE REGULATOR 1SO-AMP . LED DRIVE DETECTOR INPUT (cee) fe ENCODER CIRCUIT CIRCUIT Figure 28. HCPL-7800 Block Diagram. U1 HCPL76@0 oe meS Volts + Rsense @ eos a @ ec+e a/(/le @ Ground - Reense gepge ee R2 @,,,\0 M+iS Voits Oe8Se ee Ri ec of Fle MVout + Supply m@ 6 60 @ cee eceee|_ fe @-15 Volts @ R+ @ RB O ese Figure 29. PC Board Trace Pattern and Loading Diagram Example. DECODER {SO-AMP AND D/A ef FILTER sear 1-231Figure 32. Application Circuit Overload Recovery Waveform. 1-232