LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
0
REVISION HISTORY
Revision Description Issue Date
Rev. 1.0 Initial Issue Jan.21.2014
LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
1
FEATURES
Fast access time : 10ns
Low power consumption:
Operating current:
90mA (TYP.)
Standby current:
4mA (TYP.)
Single 3.3V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data retension voltiage : 1.5V (MIN.)
Green package available
Package : 44-pin 400mil TSOP-II
48-ball 6mm x 8mm TFBGA
GENERAL DESCRIPTION
The LY61L20508A is a 16M-bit high speed CMOS
static random access memory organized as 2048K
words by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of
operating temperature.
The LY61L20508A operates from a single power
supply of 3.3V and all inputs and outputs are fully
TTL compatible
PRODUCT FAMILY
Product
Family
Operating
Temperature VCC Range Speed Power Dissipation
Standby(ISB1,TYP.) Operating(ICC,TYP.)
LY61L20508A 0 ~ 70℃ 2.7 ~ 3.6V 10ns 4mA 90mA
LY61L20508A(I) -40 ~ 85℃ 2.7 ~ 3.6V 10ns 4mA 90mA
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A20 Address Inputs
DQ0 – DQ7 Data Inputs/Outputs
CE# Chip Enable Input
WE# Write Enable Input
OE# Output Enable Input
VCC Power Supply
VSS Ground
LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
2
PIN CONFIGURATION
LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
3
ABSOLUTE MAXIMUN RATINGS*
PARAMETER SYMBOL RATING UNIT
Voltage on VCC relative to VSS V
T1 -0.5 to 4.6 V
Voltage on any other pin relative to VSS V
T2 -0.5 to VCC+0.5 V
Operating Temperature TA 0 to 70(C grade) ℃
-40 to 85(I grade)
Storage Temperature TSTG -65 to 150 ℃
Power Dissipation PD 1 W
DC Output Current IOUT 50 mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE CE# OE# WE# I/O OPERATION SUPPLY CURRENT
Standby H X X High-Z ISB1
Output Disable L H H High-Z ICC
Read L L H DOUT I
CC
Write L X L DIN I
CC
Note: H = VIH, L = VIL, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL TEST CONDITION MIN. TYP. *4 MAX. UNIT
Supply Voltage VCC 2.7 3.3 3.6 V
Input High Voltage VIH*1 2.2- V
CC+0.3 V
Input Low Voltage VIL*2 - 0.3 - 0.8 V
Input Leakage Current ILI V
CC ≧ VIN ≧ VSS - 1 - 1
µA
Output Leakage
Current ILO VCC ≧ VOUT ≧VSS,
Output Disabled - 1 - 1 µA
Output High Voltage VOH I
OH = -4m
A
2.4 - - V
Output Low Voltage VOL I
OL = 8m
A
-- 0.4 V
Average Operating
Power Supply Current ICC
CE# ≦0.2,
Others at 0.2V or Vcc-0.2V
II/O = 0mA;f=max
90 120 mA
Standby Power
Supply Current ISB1 CE# ≧VCC - 0.2V,
Others at 0.2V or VCC - 0.2V - 4 40 mA
Notes:
1. VIH(max) = VCC + 2.0V for pulse width less than 6ns.
2. VIL(min) = VSS - 2.0V for pulse width less than 6ns.
3. Over/Undershoot specifications are characterized on engineering evaluation stage, not for mass production test.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at VCC = VCC(TYP.) and TA = 25℃
LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
4
CAPACITANCE (TA = 25 , f℃ = 1.0MHz)
PARAMETER SYMBOL MIN. MA
X
UNIT
Input Capacitance CIN -8 pF
Input/Output Capacitance CI/O -10 pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Speed 10ns
Input Pulse Levels 0.2V to VCC -0.2V
Input Rise and Fall Times 3ns
Input and Output Timing Reference Levels VCC
/
2
Output Load CL= 30pF + 1TTL, IOH
/
IOL = -4mA/8m
A
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER SYM. LY61L20508A-10 UNIT
MIN. MAX.
Read Cycle Time tRC 10-ns
A
ddress Access Time tAA - 10 ns
Chip Enable Access Time tACE - 10 ns
Output Enable Access Time tOE -4.5ns
Chip Enable to Output in Low-Z tCLZ* 2 - ns
Output Enable to Output in Low-Z tOLZ* 0 - ns
Chip Disable to Output in High-Z tCHZ* - 4 ns
Output Disable to Output in High-Z tOHZ* - 4 ns
Output Hold from Address Change tOH 2-ns
(2) WRITE CYCLE
PARAMETER SYM. LY61L20508A-10 UNIT
MIN. MAX.
Write Cycle Time
t
WC 10-ns
A
ddress Valid to End of Write tAW 8-ns
Chip Enable to End of Write tCW 8-ns
A
ddress Set-up Time tAS 0-ns
Write Pulse Width
t
WP 8-ns
Write Recovery Time
t
WR 0-ns
Data to Write Time Overlap tDW 6-ns
Data Hold from End of Write Time tDH 0-ns
Output Active from End of Write tOW* 2 - ns
Write to Output in High-Z
t
WHZ*-4ns
*These parameters are guaranteed by device characterization, but not production tested.
LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
5
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
Dout Data Valid
tOHtAA
Address
tRC
Previous Data Valid
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)
Dout Data Valid
tOH
OE#
tACE
CE#
tAA
Address
tRC
High-ZHigh-Z
tCLZ
tOLZ
tOE
tCHZ
tOHZ
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low.
3.Address must be valid prior to or coincident with CE# = low,; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
6
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)
Dout
Din Data Valid
tDW tDH
(4) High-Z
tWHZ
WE#
tWP
tCW
CE#
tWRtAS
tAW
Address
tWC
(4)
TOW
WRITE CYCLE 2 (CE# Controlled) (1,2,5,6)
Dout
Din Data Valid
tDW tDH
(4) High-Z
tWHZ
WE#
tWP
tCW
CE# tWRtAS
tAW
Address
tWC
Notes :
1.WE#,CE#, LB#, UB# must be high during all address transitions.
2.A write occurs during the overlap of a low CE#, low WE#, LB# or UB# = low.
3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be placed
on the bus.
4.During this period, I/O pins are in the output state, and input signals must not be applied.
5.If the CE#, LB#, UB# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance state.
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
7
DATA RETENTION CHARACTERISTICS
PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT
VCC for Data Retention VDR CE# V≧CC - 0.2V 1.5 - 3.6 V
Data Retention Current IDR
VCC = 1.5V
CE# V≧CC - 0.2V
Others at 0.2V or VCC – 0.2V
- 4 40 mA
Chip Disable to Data
Retention Time tCDR See Data Retention
Waveforms (below) 0 - - ns
Recovery Time tR tRC* - - ns
tRC* = Read Cycle Time
DATA RETENTION WAVEFORM
Vcc
CE#
VDR ≥ 1.5V
CE# ≥ Vcc-0.2V
Vcc(min.)
VIH
tRtCDR
VIH
Vcc(min.)
LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
8
PACKAGE OUTLINE DIMENSION
44-pin 400mil TSOP-Ⅱ Package Outline Dimension
SYMBOLS DIMENSIONS IN MILLMETERS DIMENSIONS IN MILS
MIN. NOM. MAX. MIN. NOM. MAX.
A - - 1.20 - - 47.2
A1 0.05 0.10 0.15 2.0 3.9 5.9
A2 0.95 1.00 1.05 37.4 39.4 41.3
b 0.30 - 0.45 11.8 - 17.7
c 0.12 - 0.21 4.7 - 8.3
D 18.212 18.415 18.618 717 725 733
E 11.506 11.760 12.014 453 463 473
E1 9.957 10.160 10.363 392 400 408
e - 0.800 - - 31.5 -
L 0.40 0.50 0.60 15.7 19.7 23.6
ZD - 0.805 - - 31.7 -
y - - 0.076 - - 3
Θ 0
o 3
o 6
o 0
o 3
o 6
o
LY61L20508A
Rev. 1.0
2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
9
48-ball 6mm × 8mm TFBGA Package Outline Dimension
LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
10
ORDERING INFORMATION
Package Type Access Time
(Speed/ns)
Temperature
Range(℃)
Packing
Type
Lyontek Item No.
44-Pin
400mil TSOP-II
10 0℃~70℃ Tray LY61L20508AML-10
Tape Reel LY61L20508AML-10T
-40℃~85℃ Tray LY61L20508AML-10I
Tape Reel LY61L20508AML-10IT
48-Ball
6mm x 8mm
TFBGA
10 0℃~70℃ Tray LY61L20508AGL-10
Tape Reel LY61L20508AGL-10T
-40℃~85℃ Tray LY61L20508AGL-10I
Tape Reel LY61L20508AGL-10IT
LY61L20508A
Rev. 1.0 2048K X 8 BIT HIGH SPEED CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, lndustry E . Rd. 9, Science-Based Industrial Park, Hsinchu 300, Taiwan
TEL: 886-3-6668838
FAX: 886-3-6668836
11
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