3-3
File Number
788.4
CA723, CA723C
Voltage Regulators Adjustable from 2V to
37V at Output Currents Up to 150mA
without External Pass Transistors
The CA723 and CA723C are silicon monolithic integrated
circuits designed for service as voltage regulators at output
voltages ranging from 2V to 37V at currents up to 150mA.
Each type includes a temperature-compensated reference
amplifier, an error amplifier, a power series pass transistor,
and a current-limiting circuit. They also provide
independently accessible inputs for adjustable current
limiting and remote shutdown and, in addition, feature low
standby current drain, low temperature drift, and high ripple
rejection.
The CA723 and CA723C may be used with positive and
negative power supplies in a wide variety of series, shunt,
switching, and floating regulator applications. They can
provide regulation at load currents greater than 150mA and
in excess of 10A with the use of suitable NPN or PNP
external pass transistors.
Features
• Up to 150mA Output Current
• Positive and Negative Voltage Regulation
• Regulation in Excess of 10A with Suitable Pass
Transistors
• Input and Output Short-Circuit Protection
• Load and Line Regulation . . . . . . . . . . . . . . . . . . . .0.03%
• Direct Replacement for 723 and 723C Industry Types
• Adjustable Output Voltage . . . . . . . . . . . . . . . . .2V to 37V
Applications
• Series and Shunt Voltage Regulator
• Floating Regulator
• Switching Voltage Regulator
• High-Current Voltage Regulator
• Temperature Controller
Pinouts
CA723 (PDIP)
TOP VIEW
CA723C (CAN)
TOP VIEW
Ordering Information
PART
NUMBER TEMP. RANGE
(oC) PACKAGE PKG. NO.
CA0723E -55 to 125 14 Ld PDIP E14.3
CA0723T -55 to 125 10 Pin Can T10.C
CA0723CE 0 to 70 14 Ld PDIP E14.3
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+
NC
V-
NON-INV
INPUT
VREF
CURRENT
SENSE
CURRENT
LIMIT
INV
INPUT VC
VO
VZ
NC
NC
FREQ
COMP
INPUT
V+ UNREG
-
AMP
ERROR
VOLT
REF
+
TAB
CURRENT LIMIT
NON-INV
INPUT
INV
INPUT
CURRENT
SENSE FREQ
COMP
V+
6
5
4
3
VREF VO
7VC
8
2
19
10
UNREG
INPUT
-
V-, (CASE INTERNALLY
CONNECTED TO TERM 5)
AMP
ERROR
VOLT
REF
Data Sheet April 1999
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
3-4
Functional Block Diagram
V+
VOLT
REF
AMP +
ERROR
AMP
INVERTING
INPUT
NON-INVERTING
INPUT
TEMPERATURE-
COMPENSATED
ZENER
UNREGULATED
INPUT
FREQUENCY
COMPENSATION
CURRENT
LIMITER
CURRENT
SENSE
CURRENT
LIMIT
SERIES PASS
TRANSISTOR
V-
VZ
OUTPUT
VO REGULATED
VC
VREF -
FIGURE 1. EQUIVALENT SCHEMATIC DIAGRAM OF THE CA723 AND CA723C
V+
UNREGULATED
INPUT
D1
6.2V R2
15kΩ
R1
500ΩR3
25kΩ
D3 Q3
Q4
Q5
Q1
Q6
C1
5pF
R7
30kΩR8
5kΩ
D2
6.2V
VREF
R6
100Ω
Q10
R9
300ΩR10
20kΩ
Q9
Q7
R4
1kΩR5
1kΩQ8
Q14
Q15
Q11 Q12
R11
150Ω
Q13
Q16
R12
15kΩ
D4 VZ
FREQUENCY
COMPENSATION
VO
VC
CURRENT
LIMIT
CURRENT
SENSE
NON-INVERTING
INPUT V- INVERTING
INPUT
CA723, CA723C
3-5
Absolute Maximum Ratings Thermal Information
DC Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40V
(Between V+ and V- Terminals)
Pulse Voltage for 50ms
Pulse Width (Between V+ and V- Terminals) . . . . . . . . . . . . . .50V
Differential Input-Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . .40V
Differential Input Voltage
Between Inverting and Noninverting Inputs . . . . . . . . . . . . . . ±5V
Between Noninverting Input and V- . . . . . . . . . . . . . . . . . . . . . .8V
Current From Zener Diode Terminal (VZ) . . . . . . . . . . . . . . . . 25mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . 120 N/A
Metal Can. . . . . . . . . . . . . . . . . . . . . . . 136 65
Device Dissipation
CA723T, Up to TA = 25oC . . . . . . . . . . . . . . . . . . . . . . . . .900mW
CA723E, CA723CE, Up to TA = 25oC . . . . . . . . . . . . . . .1000mW
CA723T, Above TA = 25oC. . . . . . . . . . . . . . . . . . . . . . 7.4mW/oC
CA723E, CA723CE, Above TA = 25oC . . . . . . . . . . . . 8.3mW/oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature, During Soldering . . . . . . . . . . 265oC
At a distance 1/16” ± 1/32” (1.59mm ±0.79mm) from case
for 10s Max
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications TA = 25oC, V+ = VC = VI = 12V, V- = 0, VO = 5V, IL = 1mA, C1 = 100pF, CREF = 0, RSCP = 0,
Unless Otherwise Specified. Divider impedance R1 R2÷R1 + R2 at noninverting input,
Terminal 5 = 10kΩ. (Figure 20)
PARAMETER TEST CONDITION
CA723 CA723C
UNITSMIN TYP MAX MIN TYP MAX
DC CHARACTERISTICS
Quiescent Regulator Current, IQIL = 0, VI = 30V - 2.3 3.5 - 2.3 4 mA
Input Voltage Range, VI9.5 - 40 9.5 - 40 V
Output Voltage Range, VO2 - 37 2 - 37 V
Differential Input-Output Voltage, VI - VO3 - 38 3 - 38 V
Reference Voltage, VREF 6.95 7.15 7.35 6.8 7.15 7.5 V
Line Regulation (Note 2) VI = 12V to 40V - 0.02 0.2 - 0.1 0.5 % VO
VI = 12V to 15V - 0.01 0.1 - 0.01 0.1 % VO
VI = 12V to 15V,
TA = -55oC to 125oC- - 0.3 - - - % VO
VI = 12V to 15V,
TA = 0oC to 70oC- - - - - 0.3 % VO
Load Regulation (Note 2) IL = 1mA to 50mA - 0.03 0.15 - 0.03 0.2 % VO
IL = 1mA to 50mA,
TA = -55oC to 125oC- - 0.6 - - - % VO
IL = 1mA to 50mA,
TA = 0oC to 70oC- - - - - 0.6 % VO
Output-Voltage Temperature Coefficient,
∆VOTA = -55oC to 125oC - 0.002 0.015 - - - %/oC
TA = 0oC to 70oC - - - - 0.003 0.015 %/oC
Ripple Rejection (Note 3) f = 50Hz to 10kHz - 74 - - 74 - dB
f = 50Hz to 10kHz,
CREF = 5µF-86- -86-dB
Short Circuit Limiting Current, ILIM RSCP = 10Ω, VO = 0 - 65 - - 65 - mA
CA723, CA723C
3-6
Equivalent Noise RMS Output Voltage, VN
(Note 3) BW = 100Hz to 10kHz,
CREF = 0 - -20 - - 20 - µV
BW = 100Hz to 10kHz,
CREF = 5µF- 2.5 - - 2.5 - µV
NOTES:
2. Line and load regulation specifications are given for condition of a constant chip temperature. For high dissipation condition, temperature drifts
must be separately taken into account.
3. For CREF (See Figure 20)
DC Electrical Specifications TA = 25oC, V+ = VC = VI = 12V, V- = 0, VO = 5V, IL = 1mA, C1 = 100pF, CREF = 0, RSCP = 0,
Unless Otherwise Specified. Divider impedance R1 R2÷R1 + R2 at noninverting input,
Terminal 5 = 10kΩ. (Figure 20) (Continued)
PARAMETER TEST CONDITION
CA723 CA723C
UNITSMIN TYP MAX MIN TYP MAX
Typical Performance Curves (CA723)
FIGURE 2. MAX LOAD CURRENT vs DIFFERENTIAL INPUT-
OUTPUT VOLTAGE FIGURE 3. LOAD REGULATION WITHOUT CURRENT LIMITING
FIGURE 4. LOAD REGULATION WITH CURRENT LIMITING FIGURE 5. LOAD REGULATION WITH CURRENT LIMITING
MAX JUNCTION TEMP (TJ) = 150oC
THERMAL RESISTANCE = 150oC/W
QUIESCENT DISSIPATION (PQ) = 60mW
(NO HEAT SINK)
150
100
50
0
MAXIMUM LOAD CURRENT (mA)
AMBIENT TEMPERATURE (TA) = 25oC
125oC
010203040
DIFFERENTIAL INPUT - OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (VO) = 5V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 0
INPUT VOLTAGE (VI) = 12V
LOAD REGULATION (VO)
0.05
0
-0.05
-0.1
-0.15
-0.2
AMBIENT TEMPERATURE
-55oC
125oC
0 20 40 60 80 100
OUTPUT CURRENT (mA)
(TA) = 25oC
-55oC
125oC
0.05
0
-0.05
-0.1
-0.15
-0.2
-0.25
LOAD REGULATION (V O)
OUTPUT CURRENT (mA)
0 5 10 15 20 25 30
AMBIENT TEMP (TA) = 25oC
OUTPUT VOLTAGE (VO) = 5V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 10Ω
INPUT VOLTAGE (VI) = 12V
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (VO) = 5V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 0
INPUT VOLTAGE (VI) = 12V
0.1
0
-0.1
0.2
-0.3
-0.4 0 20 40 60 80 100
AMBIENT TEMPERATURE (TA) = -55oC
25oC
125oC
LOAD REGULATION (VO)
CA723, CA723C
3-7
FIGURE 6. CURRENT LIMITING CHARACTERISTICS FIGURE 7. QUIESCENT CURRENT vs INPUT VOLTAGE
FIGURE 8. MAX LOAD CURRENT vs DIFFERENTIAL INPUT-
OUTPUT VOLTAGE FIGURE 9. MAX LOAD CURRENT vs DIFFERENTIAL INPUT-
OUTPUT VOLTAGE FOR CA723CE
FIGURE 10. LOAD REGULATION WITHOUT CURRENT
LIMITING FIGURE 11. LOAD REGULATION WITH CURRENT LIMITING
Typical Performance Curves (CA723)
(Continued)
AMBIENT TEMPERATURE (TA) = -55oC
125oC
25oC
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
1.2
1.0
0.8
0.6
0.4
0.2
020 40 60 80 1000
OUTPUT VOLTAGE (VO) = 5V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 10Ω
INPUT VOLTAGE (VI) = 12V
OUTPUT VOLTAGE (VO) = REFERENCE
LOAD CIRCUIT (IL)= 0
VOLTAGE (VREF)
QUIESCENT CURRENT (mA)
INPUT VOLTAGE (V)
5
4
3
2
1
0010203040
AMBIENT TEMPERATURE (TA) = -55oC
25oC
125oC
MAX. JUNCTION TEMP. (TJ) = 150oC
QUIESCENT DISSIPATION (PQ) = 60mW
TO-5 STYLE PACKAGE WITH NO HEAT SINK
THERMAL RESISTANCE = 150oC/W
AMBIENT TEMPERATURE (TA) = 25oC
70oC
150
100
50
0
MAXIMUM LOAD CURRENT (mA)
010203040
DIFFERENTIAL INPUT - OUTPUT VOLTAGE (V)
150
100
50
001020 30 40
DIFFERENTIAL INPUT - OUTPUT VOLTAGE (V)
MAXIMUM LOAD CURRENT (mA)
70oC
AMBIENT TEMPERATURE (TA) = 25oC
MAX. JUNCTION TEMP. (TJ) = 125oC
QUIESCENT DISSIPATION (PQ) = 60mW
DUAL - IN - LINE PLASTIC PACKAGE
THERMAL RESISTANCE = 125oC/W
WITH NO HEAT SINK
AMBIENT TEMPERATURE (TA) = 25oC
70oC
0oC
OUTPUT VOLTAGE (VO) = 5V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 0
INPUT VOLTAGE (VI) = 12V
LOAD REGULATION (VO)
0
-0.1
-0.20 20 40 60 80 100
OUTPUT CURRENT (mA)
AMBIENT TEMPERATURE (TA) = 25oC
70oC
0oC
OUTPUT VOLTAGE (VO) = 5V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 10Ω
INPUT VOLTAGE (VI) = 12V
0
-0.1
-0.2
LOAD REGULATION (VO)
OUTPUT CURRENT (mA)
0102030
CA723, CA723C
3-8
FIGURE 12. CURRENT LIMITING CHARACTERISTICS FIGURE 13. QUIESCENT CURRENT vs INPUT VOLTAGE
Typical Performance Curves (CA723)
(Continued)
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
1.2
1.0
0.8
0.6
0.4
0.2
0060402010 80 100
OUTPUT VOLTAGE (VO) = 5V
SHORT CIRCUIT PROTECTION
RESISTANCE (RSCP) = 10
INPUT VOLTAGE (VI) = 12V
AMBIENT TEMPERATURE (TA) = 25oC
70oC 0oC
OUTPUT VOLTAGE (VO) = REFERENCE
LOAD CURRENT (IL) = 0
VOLTAGE (VREF)
AMBIENT TEMPERATURE (TA) = 25oC
0oC
70oC
QUIESCENT CURRENT (mA)
INPUT VOLTAGE (V)
010203040
1
2
3
4
5
0
Typical Performance Curves (CA723 and CA723C)
FIGURE 14. LOAD REGULATION vs DIFFERENTIAL INPUT-
OUTPUT VOLTAGE FIGURE 15. LINE REGULATION vs DIFFERENTIAL INPUT-
OUTPUT VOLTAGE
FIGURE 16. LINE TRANSIENT RESPONSE FIGURE 17. CURRENT LIMITING CHARACTERISTIC vs
JUNCTION TEMPERATURE
INPUT VOLTAGE (VI) = 12V
LOAD CURRENT (IL) = I TO 50mA
OUTPUT VOLTAGE (VO) = 5V
AMBIENT TEMPERATURE (TA) = 25oC
SHORT CIRCUIT PR OTECTION
RESISTANCE (RSCP) = 0
0.2
0.1
0
-0.1
-0.2
-0.3-5 5 15 25 35 45
LOAD REGULATION (VO)
DIFFERENTIAL INPUT - OUTPUT VOLTAGE (V)
0.3
0.2
0.1
0
-0.1
-0.2
OUTPUT VOLTAGE (VO) = 5V
LOAD CURRENT (IL) = 1mA
AMBIENT TEMPERATURE (TA) = 25oC
DIFFERENTIAL INPUT VOLTAGE (∆VT) = 3V
SHORT CIRCUIT PR OTECTION RESISTANCE
(RSCP) = 0
-5 5 15 25 35 45
LINE REGULATION (VO)
DIFFERENTIAL INPUT - OUTPUT VOLTAGE (V)
15
10
5
0
5
10
OUTPUT VOLTAGE DEVIATION (mA)
-5 5 15 25 35 45
TIME (µs)
LOAD CURRENT (IL)
OUTPUT VOLTAGE (VO)
LOAD DEVIATION (mA)
0
10
-10
-20
-30
INPUT VOLTAGE (VI) = 12V, OUTPUT VOLTAGE (VO) = 5V
LOAD CURRENT (IL) = 40mA
AMBIENT TEMPERATURE (TA) = 25oC
SHORT CIRCUIT PROTECTION RESISTANCE (RSCP) = 0 200
160
120
80
40
0
0.8
0.7
0.6
0.5
0.4
0.3
CURRENT LIMITING SENSE VOLTAGE (V)
SHORT CIRCUIT LIMITING CURRENT (mA)
-50 0 50 100 150
JUNCTION TEMPERATURE (oC)
CURRENT LIMITING
SENSE VOLTAGE
SHORT CIRCUIT LIMITING
CURRENT WITH RSCP = 5Ω
WITH RSCP = 10Ω
CA723, CA723C
3-9
FIGURE 18. LOAD TRANSIENT RESPONSE FIGURE 19. OUTPUT IMPEDANCE vs FREQUENCY
Typical Performance Curves (CA723 and CA723C)
(Continued)
OUTPUT VOLTAGE (VO)
INPUT VOLTAGE (VI)
INPUT VOLTAGE DEVIATION (V)
-5 5 15253545
6
4
2
0
-2
-4
TIME (µs)
4
2
0
-2
-4
-6
OUTPUT VOLTAGE DEVIATION (mA)
INPUT VOLTAGE (VI) = 12V
OUTPUT VOLTAGE (VO) = 5V
AMBIENT TEMPERATURE (TA) = 25oC
SHORT CIRCUIT PROTECTION RESISTANCE
LOAD CURRENT (IL) = 1mA
(RSCP) = 0
OUTPUT IMPED ANCE (W)
FREQUENCY (Hz)
1µF
0.01
0.1
1
10 INPUT VOLTAGE (VI) = 12V
OUTPUT VOLTAGE (VO) = 5V
LOAD CURRENT (IL) = 50mA
AMBIENT TEMPERATURE (TA) = 25oC
SHORT CIRCUIT PR OTECTION
RESISTANCE (RSCP) = 0
100
8
6
4
6
4
8
8
6
4
2
2
2
1k 10k 100k 1M
468 2 468 2 468 2 4682
LOAD CAPACITANCE (CL) = 0
Typical Application Circuits
FIGURE 20. LOW VOLTAGE REGULATOR CIRCUIT
(VO = 2V TO 7V) FIGURE 21. HIGH VOLTAGE REGULATOR CIRCUIT
(VO = 7V TO 37V)
VIV+ VC
VO
RSCP
VREF
R1
NON
INV
INPUT
CREF V- COMP
C1
100pF
R3
CURRENT
LIMIT REGULATED
OUTPUT
CURRENT
SENSE
INV.
INPUT
R2
Circuit Performance Data:
Regulated Output Voltage 5V
Line Regulation (∆VI= 3V) 0.5mV
Load Regulation (∆IL = 50mA) 1.5mV
Note: R3 = R1 R2
R1 + R2For Minimum Temperature Drift
VIV+ VC
VO
RSCP
VREF
R3
NON
INV
INPUT V- COMP
R1
CURRENT
LIMIT REGULATED
OUTPUT 15V
CURRENT
SENSE
INV.
INPUT R2
C1
100pF
Circuit Performance Data:
Line Regulation (∆VI = 3V) 1.5mV
Load Regulation (∆IL = 50mA) 4.5mV
Note: R3 = R1 R2
R1 + R2For Minimum Temperature Drift
R3 May Be Eliminated For Minimum Component Count
CA723, CA723C
3-10
FIGURE 22. NEGATIVE VOLTAGE REGULATOR CIRCUIT FIGURE23. POSITIVE VOLTAGEREGULATORCIRCUIT(WITH
EXTERNAL NPN PASS TRANSISTOR)
FIGURE 24. POSITIVE VOLTRAGE REGULATOR CIRCUIT
(WITH EXTERNAL PNP PASS TRANSISTOR) FIGURE 25. FOLDBACK CURRENT LIMITING CIRCUIT
Typical Application Circuits
(Continued)
V+ VC
VO
VREF
V- COMP
C1
100pF
CURRENT
LIMIT
REGULATED
OUTPUT-15V
CURRENT
SENSE
INV.
INPUT
INV.
INPUT
NON
R1
R3
3kΩ
VZR5
2kΩ
R4
3kΩ
R2
Circuit Performance Data:
Line Regulation (∆VI = 3V) 1mV
Load Regulation (∆IL = 100mA) 2mV
Note: For Applications Employing the TO-5 Style Package
and Where VZ Is Required, An External; 6.2V Zener Diode
Should be Connected in Series with VO (Terminal 6).
VIVI
V+ VC
VO
RSCP
VREF
NON
INV
INPUT V- COMP
R1
CURRENT
LIMIT REGULATED
OUTPUT 15V
CURRENT
SENSE
INV.
INPUT R2
C1
100pF
Circuit Performance Data:
Line Regulation (∆VI = 3V) 1.5mV
Load Regulation (∆IL = 1A) 15mV
VI
VO
RSCP
VREF
NON
INV
INPUT V- COMP
R1CURRENT
LIMIT
REGULATED
OUTPUT 5V
CURRENT
SENSE
INV.
INPUT
R2C1
0.001µF
Circuit Performance Data:
Line Regulation (∆VI = 3V) 0.5mV
Load Regulation (∆IL = 1A) 5mV
V+
R3
60Ω
VC
2N5956
OR
2N6108
VI
V+ VCVO
RSCP
VREF
NON
INV
INPUT V- COMP
CURRENT
LIMIT
REGULATED
OUTPUT 5V
CURRENT
SENSE
INV.
INPUT
C1
0.001µF
Circuit Performance Data:
Line Regulation (∆V = 3V) 0.5mV
Load Regulation (∆IL = 10mA) 1mV
R1
R2
30Ω
R4
5.6kΩ
R3
2.7kΩ
Short Circuit Current 20mA
CA723, CA723C
3-11
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
FIGURE 26. POSITIVE FLOATING REGULATOR CIRCUIT FIGURE 27. NEGATIVE FLOATING REGULATOR CIRCUIT
FIGURE 28. REMOTE SHUTDOWN REGULATOR CIRCUIT
WITH CURRENT LIMITING FIGURE 29. SHUNT REGULATOR CIRCUIT
Typical Application Circuits
(Continued)
V+ VC
VZ
VREF
V- COMP C1
0.001µF
CURRENT
LIMIT
REGULATED
OUTPUT-50V
CURRENT
SENSE
INV.
INPUT
INV.
INPUT
NON
R3
3kΩ
VO
R5
3.9kΩ
R4
3kΩ
Circuit Performance Data:
Line Regulation (∆V = 20V) 15mV
Load Regulation (∆IL = 50mA) 20mV
R1
R2
VI = 85V
TI
2N3442
RSCP
1Ω
D1
12V
SK3062
NOTE: For applications employing the TO-5 Style Package and
where VZ is required, an external 6.2V zener diode should
be connected in series with VO (terminal 6)
V+ VC
VZ
VREF
V- COMP
C1
0.001µF
CURRENT
LIMIT
REGULATED
OUTPUT-100V
CURRENT
SENSE
INV.
INPUT
INV.
INPUT
NON
R3
3kΩ
VOR6
10kΩ
R4
3kΩ
Circuit Performance Data:
Line Regulation (∆VI = 20V) 30mV
Load Regulation (∆IL =100mA) 20mV
R2
R1
VI
TI
2N6211
D1
12V
SK3062
R5
10kΩ
NOTE: For applications employing the TO-5 Style Package and
where VZ is required, an external 6.2V zener diode should
be connected in series with VO (terminal 6)
VI
V+ VCVORSCP
VREF
NON
INV
INPUT V- COMP
CURRENT
LIMIT
REGULATED
OUTPUT 5V
CURRENT
SENSE
INV.
INPUT
C1
0.001µF
Circuit Performance Data:
Line Regulation (∆VI = 3V) 0.5mV
Load Regulation (∆IL = 50mA) 1.5mV
R1
R2R4
2kΩ
R3
2.kΩ
Short Circuit Current 20mA
NOTE: 1. A current limiting transistor may be used for shutdown if
2. Add a diode if VO > 10V.
current limiting is not required.
NOTE 2
CCSL
LOGIC
INPUT
TI
2N3053
V+ VCVO
VREF
INV
INPUT V- COMP
CURRENT LIMIT
REGULATED
OUTPUT 5V
CURRENT SENSE
NON INV.
INPUT
C1
0.005µF
Circuit Performance Data:
Line Regulation (∆VI = 10V) 0.5mV
Load Regulation (∆IL = 100mA) 1.5mV
R1
R2
R4
100Ω
R3
100Ω
NOTE: For applications employing the TO-5 Style Package and
where VZ is required, an external 6.2V zener diode
should be connected in series with VO (terminal 6).
C
VZ
VI
CA723, CA723C
