intersil HUF76407DK8 Eee" Data Sheet October 1999 File Number 4712.4 3.5A, 60V, 0.105 Ohm, Dual N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC MS-012AA * Ultra Low On-Resistance BRANDING DASH - TDS(ON) = 9.0900, Vag = 10V - TDS(ON) = 9.105Q, Vag = 5V Simulation Models 5 - Temperature Compensated PSPICE and SABER Electrical Models 2 - Spice and SABER Thermal Impedance Models 4 - www.semi.intersil.com * Peak Current vs Pulse Width Curve e UIS Rating Curve Symbol q * Transient Thermal Impedance Curve vs Board Mounting rpocct seen 4 Area I ! SOURCE! (1) o- To DRAIN 1 (8) * Switching Time vs Ras Curves GATE1 (2) " ro DRAIN 1 (7) ' U ' i Ordering Information SOURCE2 (3) oj DRAIN 2 (6) GATE \ 1S DRAIN 266 PART NUMBER PACKAGE BRAND 2 (4) | ) HUF76407DK8 MS-012AA 76407DKB ' ' NOTE: When ordering, use the entire part number. Add the suffix T to obtain the variant in tape and reel, e.g., HUF76407DK8T. Absolute Maximum Ratings T, = 25C, Unless Otherwise Specified HUF76407DK8 UNITS Drain to Source Voltage (Note 1). 0.0.00... 0000 ccc cece cece een a neee Voss 60 Vv Drain to Gate Voltage (Rag = 20kQ) (Note 1). 20... eee eee ee Vocr 60 V Gate to Source Voltage... 6. ccc e cece e ccc eneenaeenas Ves +16 Vv Drain Current Continuous (Ta= 25C, Vgg = 5V) (Note 2)... cece eee Ip 3.5 A Continuous (Ta= 25C, Vgg = 10V) (Figure 2) (Note 2) .. 00.0. eee ee Ip 3.8 A Continuous (Ta= 100C, Vag = 5V) (Note 3)... ccc eee eas Ip 1.0 A Continuous (Ta= 100C, Vgg = 4.5V) (Figure 2) (Note 3)... 00. eee Ip 1.0 A Pulsed Drain Current... 0.0000 eee cece cette even nes IDM Figure 4 Pulsed Avalanche Rating .... 0.0... 2... c eee ee eenenes UIS Figures 6, 17, 18 Power Dissipation (Note 2) 2.00... ccc ccc ence e eee eeees Pp 2.5 Ww Derate Above 25C 26 cece ce cece eee e eee evantnnnees 20 mWw/c Operating and Storage Temperature .. 6... 222. es Ty, Tsta@ -55 to 150 % Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 108......0..0000 000 cece eee eens TL 300 % Package Body for 10s, See Techbrief TB334............000 00.00. c eee ee eee Tpkg 260 C NOTES: 1. Ty = 25C to 125C. 2. 50C/W measured using FR-4 board with 0.76 in? (490.3 mm2) copper pad at 1 second. 3. 228C/W measured using FR-4 board with 0.006 in? (3.87 mm?) copper pad at 1000 seconds. CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not irnplied. q CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. UltraFET is a trademark of Intersil Corporation. PSPICE is a registered trademark of MicroSim Corporation. SABER is a Copyright of Analogy, Inc. httpy/www.intersil.com or 407-727-9207 | Copyright Intersil Corporation 1999 Me 430ee71 0103940 643 meHUF76407DK8 Electrical Specifications T, = 25C, Unless Otherwise Specified PARAMETER SYMBOL | TEST CONDITIONS | MIN | TYP | MAX | UNITS OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage BVpss__{ Ip = 250nA, Vag = OV (Figure 12) 60 - - Vv Ip = 250pA, Vag = OV, Ta = -40C (Figure 12) 55 - - Vv Zero Gate Voltage Drain Current Ipss Vos = 55V, Vas =OV - - 1 pA Vos = 50V, Ves = OV, Ta = 150C - - 250 pA Gate to Source Leakage Current lass Vas = +16V - - +100 nA ON STATE SPECIFICATIONS Gate to Source Threshold Voltage VascH) | Vas = Vps, 'p = 250nA (Figure 11) 1 - 3 Vv Drain to Source On Resistance 'DS(ON) =| 'p = 3.8A, Veg = 10V (Figures 9, 10) - 0.075 | 0.090 Q Ip = 1.0A, Vag = 5V (Figure 9) : 0.088 | 0.105 Q Ip = 1.0A, Vag = 4.5V (Figure 9) - 0.092 | 0.110 Q THERMAL SPECIFICATIONS Thermal Resistance Junction to Ambi- Reva Pad Area = 0,76 in? (490.3 mm) (Note 2) - - 50 c/w ent Pad Area = 0.027 in? (17.4 mm?) (Figure 23) - - 191 | C/W Pad Area = 0.006 in@ (3.87 mm?) (Figure 23) - - 228 | C/W SWITCHING SPECIFICATIONS (Vas = 4.5V) Tum-On Time ton Vpp = 30V, Ip = 1.0A - - 57 ns Tum-On Delay Time ton) (ose 18. 350) 270. - 8 - ns Rise Time tr - 30 - ns Turn-Off Delay Time ta(OFF) - 25 - ns Fall Time tf - 25 - ns Tum-Off Time torr - - 75 ns SWITCHING SPECIFICATIONS (Vag = 10V) Turm-On Time ton Vop = 30V, Ip = 3.8A - - 24 ns Turn-On Delay Time ta(on) pos 40g - 5 - ns Rise Time t (Figures 16, 21, 22) - 11 - ns Turn-Off Delay Time ta(OFF) - 46 - ns Fall Time ty - 31 - ns Turn-Off Time torr - - 116 ns GATE CHARGE SPECIFICATIONS Total Gate Charge Qgtot) | Vas = OV to 10V Vop = 30V, - 9.4 11.2 nc Gate Charge at 5V Qgs) | Vas = 0V to5V erat oma - 5.3 6.4 nc Threshold Gate Charge QgtH) =| Vas = OV to 1V (Figures 14, 19, 20) - 0.42 0.5 nc Gate to Source Gate Charge Qgs - 1.06 - nc Reverse Transfer Capacitance Qgq - 2.4 - nc CAPACITANCE SPECIFICATIONS Input Capacitance Ciss Vps = 25V, Vas = OV, - 330 - pF Output Capacitance Coss (Figure 12) - 100 - pF Reverse Transfer Capacitance Crss - 18 - pF Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP | MAX | UNITS Source to Drain Diode Voltage Vsp Igp = 3.8A - - 1.25 Vv Isp = 1.0A - - 1.00 | Vv Reverse Recovery Time tr Igp = 1.0A, digp/dt = 100A/us - - 48 ns Reverse Recovered Charge Qrar Igp = 1.0A, digp/dt = 100A/ps - - 89 nc 2 | intersil me 4302271 0103941 75THUF76407DK8 Typical Performance Curves 1.2 1.0 0.8 0.6 0.4 0.2 POWER DISSIPATION MULTIPLIER 0 25 50 75 100 125 150 Ta, AMBIENT TEMPERATURE (C) FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT TEMPERATURE DUTY CYCLE - DESCENDING ORDER e = Zeya, NORMALIZED THERMAL IMPEDANCE 2 SINGLE PULSE 0.001 10* 104 10% 1072 Ip, DRAIN CURRENT (A) 107 Ves = 10V, Roya = 50C/W , DN. N eee seen Pe Ves = 4.5V, Roja = 228C/W \ | 25 50 75 100 125 150 Ta, AMBIENT TEMPERATURE (C) FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs AMBIENT TEMPERATURE ty |= te FACTOR: D = ty/ta PEAK Ty = Prog X Zoga X Raga + Ta 10 10! 102 10 t, RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 200 100 10 tom, PEAK CURRENT (A) 105 104 103 102 Rega = 228C/W Te= FOR TEMPERATURES ABOVE 25C DERATE PEAK CURRENT AS FOLLOWS: I= lbs | | 125 10 10! 102 103 t, PULSE WIDTH (s) FIGURE 4. PEAK CURRENT CAPABILITY 3 intersil Me 4302271 0103542 bibHUF76407DK8 Typical Performance Curves (Continued) sm SINGLE PULSE T) = MAX RATED Ta = 25C Algya = 228C/W 8 OPERATION IN THIS AREA MAY BE LIMITED BY rpsony Ip, DRAIN CURRENT (A) ~ 3 0.1 1 10 100 200 Vps, DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. FORWARD BIAS SAFE OPERATING AREA 20 PULSE DURATION = 80us DUTY CYCLE = 0.5% MAX Vpp = 15V Ty = 25C y a 8 Ty = -55C / Ty = 150C 10 Ip, DRAIN CURRENT (A) 2.0 2.5 3.0 3.6 4.0 4s 5.0 Vag, GATE TO SOURCE VOLTAGE (V) FIGURE 7. TRANSFER CHARACTERISTICS 150 PULSE DURATION = 80us DUTY CYCLE = 0.5% MAX Ip =3.8A 2 S ON RESISTANCE (mo) & ov t =a > rps(on), DRAIN TO SOURCE 2 3 4 5 6 7 8 9 10 Vag, GATE TO SOURCE VOLTAGE (V) FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 50 las, AVALANCHE CURRENT (A) 10 HR=0 tav = (L)(lasV(1.3*RATED BVpss - Vpp) RAz0 = (UR)In[(las*R\V(1.3*RATED BVpgs - Vpp) +1 STARTING T, = 25C STARTING Ty = 150C 4 0.01 01 1 10 tay, TIME IN AVALANCHE (ms) NOTE: Refer to Intersil Application Notes AN9321 and AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING Ip, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON RESISTANCE 20 = wn _ oS an CAPABILITY T Vas = 10V f a Vas =5V 1 | Vag = 4.5V | Ves =4V fr Vag = 3.5V PULSE DURATION = 80ps DUTY CYCLE = 0.5% MAX + Ta = 25C Ves = 3V l 0 1 2 3 4 Vps, DRAIN TO SOURCE VOLTAGE (Vv) FIGURE 8. SATURATION CHARACTERISTICS 2.0 PULSE DURATION = 80us DUTY CYCLE = 0.5% MAX Ves = 10V, Ip =3.8A Yo f _ oa = 2 va 0.5 iT a -80 40 0 40 80 120 160 Ty, JUNCTION TEMPERATURE (C) FIGURE 10. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 4 | intersil S mm 4302271 0103943 55HUF76407DK8 Typical Performance Curves (continued) 1.2 T T Ves = Vps; Ip = 250pA IN > / Ns 2 @ NORMALIZED GATE THRESHOLD VOLTAGE N\ -80 -40 0 40 80 120 160 Ty, JUNCTION TEMPERATURE (C) 0.6 FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 1000 Ciss = Cas + Cap 100 Coss =Cps+Cep C, CAPACITANCE (pF) 10 Crss = Cap Veg = OV, f = IMHz 5 0.1 1.0 10 60 Vps, DRAIN TO SOURCE VOLTAGE (V) FIGURE 13, CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 50 Ves = 4.5V, Vop = 30V, Ip = 1.0A r to 2 3 Sa w LA tr = a = ta(OFF) o = 3S 20 e = ta(on) 10 0 0 10 20 30 40 50 Res, GATE TO SOURCE RESISTANCE (Q) FIGURE 15, SWITCHING TIME vs GATE RESISTANCE 1.2 : w ip = 250, Qo pet Bg ee 11 z$ iz as aa N= 1.0 ma ac =o x g | a 0.9 -80 ~40 0 40 80 120 160 Ty, JUNCTION TEMPERATURE (C) FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 10 S Vpp = 30V 3 8 < 3 > uw 6 QO ae = o on 4 e yw f WAVEFORMS IN a5 DESCENDING ORDER: | So 3 Ip = 3.6A L Ip =1.0A 0 1 i 0 2 4 6 8 10 Qg, GATE CHARGE (nC) NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT 30 Vas = 10V, Vpp = 30V, Ip = 3.8A ta(orF) z 60 ne w i 5 "| g 40 | e a = 20 vt - ta(on) 0 I 0 10 20 30 40 50 Rags, GATE TO SOURCE RESISTANCE (0) FIGURE 16. SWITCHING TIME vs GATE RESISTANCE intersil MB 4302271 0103944 499 OeHUF76407DK8 Test Circuits and Waveforms Vps BVpss L < tp e Vos VARY tp TO OBTAIN : las . _ y _ DD REQUIRED PEAK las Ag qa = vop oe IN 4 \ Ves . ee y a DUT , \ \ _ f tp \ ov las 0------- , Yoo 0.010 | tav | FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 18. UNCLAMPED ENERGY WAVEFORMS Vos AL Vas e + a) 9 SM DUT lgreF) (4) _ Qgs - | <_ Qga = 0 FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS Vos torr |[*_ tow ta(OFF) RL | & |= 90% Ves at. ay 7 Ff 1% -< __ DUT 90% Res 50% + < PULSE WIDTH > Vas _ 0 IF FIGURE 21. SWITCHING TIME TEST CIRCUIT FIGURE 22, SWITCHING TIME WAVEFORM 6 | imtersil M8 4302271 0103945 325 meHUF76407DK8 Thermal Resistance vs. Mounting Pad Area The maximum rated junction temperature, Tjxy, and the thermal resistance of the heat dissipating path determines the maximum allowable device power dissipation, Ppyy, in an application. Therefore the applications ambient temperature, Ta (C), and thermal resistance Reya (C/W) must be reviewed to ensure that Tyyy is never exceeded. Equation 1 mathematically represents the relationship and serves as the basis for establishing the rating of the part. Pom = (EQ. 1) In using surface mount devices such as the SOP-8 package, the environment in which it is applied will have a significant influence on the part's current and maximum power dissipation ratings. Precise determination of Ppny is complex and influenced by many factors: 1, Mounting pad area onto which the device is attached and whether there is copper on one side or both sides of the board. 2. The number of copper layers and the thickness of the board. . The use of external heat sinks. . The use of thermal vias. . Air flow and board orientation. . Fornon steady state applications, the pulse width, the duty cycle and the transient thermal response of the part, the board and the environment they are in. Intersil provides thermal information to assist the designer's preliminary application evaluation. Figure 23 defines the Raya for the device as a function of the top copper (component side) area. This is for a horizontally positioned FR-4 board with 10z copper after 1000 seconds of steady state power with no air flow. This graph provides the necessary information for calculation of the steady state junction temperature or power dissipation. Pulse applications can be evaluated using the Intersil device Spice thermal model or manually utilizing the normalized maximum transient thermal impedance curve. nan W Displayed on the curve are Rey, values listed in the Electrical Specifications table. The points were chosen to depict the compromise between the copper board area, the thermal resistance and ultimately the power dissipation, Pom. Thermal resistances corresponding to other copper areas can be obtained from Figure 23 or by calculation using Equation 2. Rea is defined as the natural log of the area times a cofficient added to a constant. The area, in square inches is the top copper area including the gate and source pads. Roya = 103.2-24.3x In(Area) (EQ. 2) 300 ar oT Rega = 103.2 - 24.3 * IN(AREA) 50 Peet SAN 228 C/W - 0.006in? s a gm SNe 191 Scew - 0.027in? s Pn PAN 3 150 iva a 5 Pl = Tm A | 2 100 ae PA | aS Peel 50 1 fl Rop = 46.4 - 21.7 * IN(AREA) 0 oe oe oe | oe | 0.001 0.01 0.1 1 AREA, TOP COPPER AREA (in) PER DIE FIGURE 23. THERMAL RESISTANCE vs MOUNTING PAD AREA While Equation 2 describes the thermal resistance of a single die, several of the new UltraFETs are offered with two die in the SOP-8 package. The dual die SOP-8 package introduces an additional thermal component, thermal coupling resistance, Rep. Equation 3 describes Rog asa function of the top copper mounting pad area. Rog = 46.4-21.7x In(Area) (EQ. 3) The thermal coupling resistance vs. copper area is also graphically depicted in Figure 23. It is important to note the thermal resistance (Raja) and thermal coupling resistance (Reg) are equivalent for both die. For example at 0.1 square inches of copper: Reyai = Ragas = 159C/W Rept = Rope = 97C/\W Ty and T jo define the junction temerature of the respective die. Similarly, P; and P> define the power dissipated in each die. The steady state junction temperature can be calculated using Equation 4 for die 1and Equation 5 for die 2. Example: To calculate the junction temperature of each die when die 2 is dissipating 0.5 Watts and die 1 is dissipating 0 Watts. The ambient temperature is 70C and the package is mounted to a top copper area of 0.1 square inches per die. Use Equation 4 to calulate Tj; and and Equation 5 to calulate Tyo. Tyy = PyRoyatPoRog+Ta (EQ. 4) Ty4 = (0 Watts)(159C/W) + (0.5 Watts)(97C/W) + 70C Ty, = 119C Tyo = PoRg yatPyRog+Ty (EQ. 5) TJ2 = (0.5 Watts)(159C/W) + (0 Watts)(97C/W) + 70C Tyg = 150C 7 intersil EE MM 4302271 0103944 cblHUF76407DK8 The transient thermal impedance (ZgJa) is also effected by Copper pad area has no perceivable effect on transient varied top copper board area. Figure 24 shows the effect of thermal impedance for pulse widths less than 100ms. For copper pad area on single pulse transient thermal pulse widths less than 100ms the transient thermal impedance. Each trace represents a copper pad area in impedance is determined by the die and package. Therefore, square inches corresponding to the descending list in the CTHERM1 through CTHERMS and RTHERM1 through graph. Spice and SABER thermal models are provided for RTHERMS remain constant for each of the thermal models. A each of the listed pad areas. listing of the model component values is available in Table 1. 160 | COPPER BOARD AREA - DESCENDING ORDER 0.020 in* Leer 0.140 in? ra ind 120 0.257 in za: 0.380 in? a =s 6 9 on z 0.493 in gan x Ww a" Co FQ 80 A im < a ra em Fa rn = az 40 on , | 101 10 101 102 107 t, RECTANGULAR PULSE DURATION (s) FIGURE 24, THERMAL RESISTANCE vs MOUNTING PAD AREA MM 4302271 0103947 1ThHUF76407DK8 PSPICE Electrical Model -SUBCKT HUF76407DK8 213; REV 28 May 1999 CA 12 8 4.55e-10 CB 15 145.20e-10 CIN 6 83.118-10 DBODY 7 5 DBODYMOD LDRAIN DBREAK 5 11 DBREAKMOD DPLCAP 5 DRAIN DPLCAP 10 5 DPLCAPMOD rr 5 2 10 Ww EBREAK 11717 1867.8 ASLC1 EDS 148581 51 DBREAK W EGS 13 86 81 ASLC2 + ESG610681 () ESLC 1" EVTHRES 6 21198 1 2 EVTEMP 20 6 18 22 1 50 + 7) J vsovy ESG $) $ADRAIN eaneax (18) DBO 1T 8 17 1 EVTHRES + _J +(49\-_ [21 LDRAIN 2 5 1.0e-9 LGATE EVTEMP 19 {ie MWEAK 6 LGATE 1 9 1.5e-9 GATE AGATE 4 Gy. i LSOURCE 3 7 4.860-10 1 ftw i {tf umeD 9 20 [5 > RLDRAIN MMED 16 6 8 8 MMEDMOD RLGATE MSTRO 16 6 8 8 MSTROMOD LSOURCE MWEAK 16 21 8 8 MWEAKMOD SOURCE 3 WN ASOURCE RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 3.00e-2 RGATE 9 203.37 RLDRAIN 2 5 10 RLGATE 19 15 RLSOURCE 37 4.86 RSLC1 5 &1 RSLCMOD te-6 RSLC2 5 50 1283 RSOURCE 8 7 RSOURCEMOD 3.80e-2 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 RLSOURCE RBREAK S1A 6 12 13 8 STAMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 2219 DC 1 ESLC 51 50 VALUE=((V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6"105),2))) -MODEL DBODYMOD D (!S = 3.17e-13 AS = 2.212 TRS1 = 6.25e-4 TRS2=-1.11e-6 CJO = 6.82e-10 TT = 7.98e-8 M = 0.65) -MODEL DBREAKMOD D (RS = 3.36e-1 TRS1 = 1.25e-4 TRS2 = 1.34e-6) -MODEL DPLCAPMOD D (CJO = 2.91e-10 IS = 1e-30 M-= 0.85) -MODEL MMEDMOD NMOS (VTO = 2.00 KP = 1 IS = 1e-30 N = 10 TOX = 1L = tu W= 1u RG = 3.37) -MODEL MSTROMOD NMOS (VTO = 2.33 KP = 19 IS = 1e-30 N = 10 TOX = t L = 1u W = Iu) -MODEL MWEAKMOD NMOS (VTO = 1.71 KP = 0.02 IS = 16-30 N = 10 TOX = 1L = 1u W = tu AG = 33,7 AS = 0.1) MODEL RBREAKMOD RES (TC1 = 1.06e-3 TC2 = 0) -MODEL RDRAINMOD RES (TC1 = 1.23e-2 TC2 = 2.58e-5) -MODEL RSLCMOD RES (TC1 = 1.0e-3 TC2 = 1.0e-6) .MODEL RSOURCEMOD RES (TC1 = 0 TC2 = 0) MODEL RVTHRESMOD RES (TC1 = -2.19e-3 TC2 = -4.97e-6) -MODEL RVTEMPMOD RES (TC1 =-1.11e-3 TC2 = 0) -MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON =-7.0 VOFF= -2.5) -MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON =-2.5 VOFF= -7.0) -MODEL S2AMOD VSWITCH (RON = te-5 ROFF = 0.1 VON =-1.0 VOFF= 0) -MODEL S2BMOD VSWITCH (RON = te-5 ROFF = 0.1 VON =0 VOFF= -1.0) -ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. 9 intersil M@ 430ee271 0103948 O34HUF76407DK8 SABER Electrical Model REV 28May 1999 template huf76407dk8 n2,n1,n3 electrical n2,n1,n3 { var i iscl d..model dbodymod = (is = 3.17e-13, cjo = 6.82e-10, tt = 7.98e-8, m = 0.65) d..mode} dbreakmod = () d..model dplcapmod = (cjo = 2.91e-10, is = 1e-30, m = 0.85) m..model mmedmod = (type=_n, vto = 2.00, kp = 1, is = 1-30, tox = 1) m..model mstrongmod = (type=_n, vio = 2.33, kp = 19, is = te-30, tox = 1) m..model mweakmod = (type=_n, vto = 1.71, kp = 0.02, is = 1e-30, tox = 1) LDRAIN sw_vesp..model stamod = (ron = te-5, roff = 0.1, von = -7, voff = -2.5) DPLCAP 5 DRAIN sw_vesp..model sibmod = (ron =1e-5, roff = 0.1, von = -2.5, volf = -7) 10 1f + 2 sw_vesp..model s2amod = (ron = 1e-5, roff = 0.1, von = -1.0, voff = 0) RLDRAIN sw_vesp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0, voff = -1) 2 RSLC1 > | Fs RDBREAK 3 c.ca n12 n8 = 4.55e-10 RSLC2S c.cb n15n14 = 5.20e-10 ISCL m2 RDBODY c.cin n6 n8 = 3.11e-10 50 DBREAK d.dbody n7 n71 = model=dbodymod 6 RDRAIN 71 d.dbreak n72 n11 = modeledbreakmod ESG\ 3 11 d.dpicap n10 n& = model=dpilcapmod + EVTHRES 16 + - }21 iitn8 n17 =1 care USAT naare EVTEMP ? feuweak DBODY +/18\-[ 6 -_ (Idrain n2 nS = 1e-9 1 of tw) oo a {]MMED EBREAK lgate nt n9 = 1.5e-9 RLGATE irs MSTRO Lsource n3 n7 = 4.86e-10 re LSOURCE CIN T 8 SOURCE m.mmed n16 n6 n8 n8 = model=>mmedmod, E1u, w=1u A 3 m.mstrong n16 n6 n8 n& = model=mstrongmed, l=41u, w=1u ASOURCE m.mweak n16 n21 n8 n& = model=mweakmod, l=1u, w=1u RLSOURCE res.rbreak n17 n18 = 1, tel = 1.06e-3, tc2 =0 15 RBREAK res.rdbody n71 nS = 2.21e-2, tcl = -6.25e-4, te2 = -1.11e-6 res.rdbreak n72 nS = 3.36e-1, tcl = 1.25e-4, tc2 = 1.34e-6 res.rdrain n50 ni6 = 3.00e-2, tct = 1.23e-2, tc2 = 2.58e-5 res.rgate n9 n20 = 3.37 cB res.ridrain n2 nd = 10 +} 14 res.rigate ni n9 = 15 res.rlsource n3 n7 = 4.86 EGS (4) EDS ($) res.rsic1 n5n51 = 166, tcl = te-3, te2 = 1e-6 - res.rsic2 nS nSO = 1e3 res.rsource n8n7 = 3.80e-2, tc1 = 0, tc2 = 0 res.rviemp n18n19 = 1, tcl = -1.116-3, tc2 =0 res.rvthres n22 n8 = 1, tc1 = -2.19e-3, tc2 = -4.97e-6 spe.ebreak n11n7 nt7 n18 = 67.8 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n27 ni9 n8=1 sw_yesp.sla n6 n12 n13 n8 = model=s1amod sw_vesp.sib n13 n12 n13 n8 = model-s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vesp.s2b ni3 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { 3 (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*({abs(v(n5,n51)*1e6/105))* 2)) } ) 10 inters:) WB 4302271 0103949 T70SPICE Thermal Model REV 1June 1999 HUF76407DK8 Copper Area = 0.02 in? CTHERM1 th 8 8.5e-4 CTHERM2 8 7 1.86-3 CTHERMS 7 6 5.0e-3 CTHERM4 6 5 1.30-2 CTHERMS 5 4 4.0e-2 CTHERMG 4 3 9.0e-2 CTHERM7 3 2 4.0e-1 CTHERMS 2 tl 1.4 RTHERM( th 8 3.56-2 RTHERN2 8 7 6.0e-1 RTHERMS 7 6 2 RTHERM4 6 58 RTHERMS 5 4 18 RTHERMG 4 3 39 RTHERN7 3 2 42 RTHERMB 2 # 48 SABER Thermal Model Copper Area = 0.02 in? template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 8 = 8.5e-4 ctherm.ctherm?2 8 7 = 1.8e-3 ctherm.ctherm3 7 6 = 5.0e-3 ctherm.ctherm4 6 5 = 1.3e-2 ctherm.cthermS 5 4 = 4.0e-2 ctherm.ctherm6 4 3 = 9.0e-2 ctherm.ctherm7 3 2 = 4.0e-1 ctherm.ctherm8 2 tl = 1.4 rtherm.rtherm1 th 8 = 3.5e-2 rtherm.rtherm2 8 7 = 6.0e-1 rtherm.rtherm3 7 6 = 2 rtherm.rtherm4 6 5 = 8 rtherm.rtherm5 5 4 = 18 rtherm.rtherm6 4 3 = 39 rtherm.rtherm7 3 2 = 42 rtherm.rtherm8 2 #1 = 48 } HUF76407DK8 RTHERM1 AAA v = - Fj UNCTION CTHERM1 = RTHERM2 AAA. VT AAA v v w vv w = on an ~ RTHERM3 AAA RTHERM4 AAA. RTHERMS RTHERM6 AAA - CTHERM2 CTHERM3 CTHERM4 CTHERM5 CTHERM6 Yv RTHERM7 AAA. CTHERM7 RATHERMS TABLE 1. Thermal Models AAA, VY Ff CTHERMS MBIENT COMPONANT 0,02 in? 0.14 in? 0.257 in* 0.38 in? 0.493 in@ CTHERM6 9.0e-2 1.3e-1 1.5e-1 1.5e-1 1.5e-1 CTHERM7 4.0e-1 6.0e-1 4 5e-1 6.5e-1 75e-1 CTHERM8 2.5 2.2 3 RTHERM6 39 26 20 NM 0 20 RTHERM7 42 32 31 nN 9 23 RTHERM8 48 35 25 17 intersi| MM 4302271 0103950 792 me