REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Table I, pages 4 and 5, change: VOH from 2.5 V to 2.4 V. fMAX (Min), subgroup 9, from 100 MHz to 90 MHz and subgroups 10 and 11 from 90 MHz to 75 MHz. tPLH4, subgroups 10 and 11 from 15.5 ns to 16.5 ns. Add "5962" to the military drawing number in 6.4. Editorial changes on pages 2 and 8. Change code ident. to 67268. 87-07-24 D. R. Cool B Technical changes in 1.4, recommended operating conditions. Increased setup and hold time. Delete footnote 2/ from table I. Table I fMAX test from 75 MHz to 60 MHz. Table I tPHL2 through tPHL4 increase maximum limits. Made editorial changes throughout document. Change in table II. Add CAGE 27014 to all packages. Add figure 5. - ltg 89-01-03 D. R. Cool C Table I, maximum clock frequency, symbol column, add "2/". Add footnote 2/ at the end of the table as follows: "2/ fMAX, if not tested shall be guaranteed to the specified limits." - tvn 93-05-05 Monica L. Poelking D Update to reflect latest changes in format and requirements. Change LOAD to 02-03-07 Raymond Monnin 09-04-14 Joseph D. Rodenbeck PE on Figure 4. Editorial changes throughout. - les E Update drawing to current requirements. Editorial changes throughout. - gap CURRENT CAGE CODE IS 67268 The original first sheet of this drawing has been replaced. REV SHEET REV SHEET REV STATUS REV E E E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY David W. Queenan STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY N. A. Hauck APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A N. A. Hauck DRAWING APPROVAL DATE 87-01-28 REVISION LEVEL E MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY, TTL, BINARY COUNTER, MONOLITHIC SILICON SIZE CAGE CODE A 14933 SHEET DSCC FORM 2233 APR 97 5962-86072 1 OF 14 5962-E055-09 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86072 01 E X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Generic number Device type 01 54F169 Circuit function synchronous 4-bit up/down binary counter 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter E F 2 Descriptive designator GDIP1-T16 or GDIP2-T16 GDFP2-F16 or GDFP3-F16 CQCC1-N20 Terminals Package style 16 16 20 Dual-in-line Flat Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage .................................................................................... Input voltage range ............................................................................ Storage temperature range ................................................................ Maximum power dissipation (PD) per device 1/ ................................ Lead temperature (soldering, 10 seconds) ........................................ Thermal resistance, junction-to-case (JC) ........................................ Junction temperature (TJ) .................................................................. -0.5 V dc minimum to +7.0 V dc maximum -1.2 V dc at -18 mA to +7.0 V dc -65C to +150C 413 mW +300C See MIL-STD-1835 +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) ................................................................ Minimum high level input voltage (VIH) ............................................... Maximum low level input voltage (VIL) ............................................... Case operating temperature range (TC) ............................................ Minimum setup time, Dn to CP: TC = +25C ..................................................................................... TC = -55C, +125C ........................................................................ Minimum hold time, Dn to CP: TC = +25C ..................................................................................... TC = -55C, +125C ........................................................................ +4.5 V dc minimum to +5.5 V dc maximum 2.0 V dc 0.8 V dc -55C to +125C 4.0 ns 4.5 ns 3.0 ns 3.5 ns ________ 1/ Maximum power dissipation is defined as VCC x ICC. Must withstand the added PD due to short circuit test (e.g. IOS). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 2 Minimum setup time, CEP or CET to CP: TC = +25C ........................................................................................ TC = -55C, +125C ........................................................................... 7.0 ns 8.0 ns Minimum hold time, CEP or CET to CP .......................................... 1.0 ns Minimum setup time, PE to CP: TC = +25C ........................................................................................ 8.0 ns TC = -55C, +125C ........................................................................... 10.0 ns Minimum hold time, PE to CP .......................................................... 1.0 ns Minimum setup time, U/ D to CP: TC = +25C ........................................................................................ 11.0 ns TC = -55C, +125C ........................................................................... 14.0 ns Minimum hold time, U/ D to CP ........................................................ Minimum width of clock pulse ............................................................ 0.0 ns 9.0 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 3 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Counting sequence. The counting sequence shall be as specified on figure 4. 3.2.6 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 5. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. A compliance indicator "C" shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator "C" shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 4 TABLE I. Electrical performance characteristics. Test High level output voltage Symbol VOH Conditions -55C TC +125C unless otherwise specified VCC = 4.5 V, IOH = -1.0 mA, Group A subgroups Limits Min 1, 2, 3 Unit Max 2.4 V VIL = 0.8 V, VIH = 2.0 V Low level output voltage VOL VCC = 4.5 V, IOL = 20 mA, 1, 2, 3 0.5 V 1, 2, 3 -1.2 V VIL = 0.8 V, VIH = 2.0 V Input clamp voltage VI C VCC = 4.5 V, IIH = -18 mA High level input current Low level input current II H1 VCC = 5.5 V, VIN = 2.7 V 1, 2, 3 20 A II H2 VCC = 5.5 V, VIN = 7.0 V 1, 2, 3 100 A CET input 1, 2, 3 -1.2 mA other inputs 1, 2, 3 -0.6 mA -150 mA 75 mA IIL VCC = 5.5 V, VIN = 0.5 V Short circuit output current IOS VCC = 5.5 V, VOS = 0.0 V Supply current ICC frequency Propagation delay time, 1, 2, 3 See 4.3.1c 7, 8 fMAX VCC = 5.0 V 9 90 MHz 2/ RL = 500 10, 11 60 MHz tPLH1 CL = 50 pF 9 9 ns 10, 11 12 ns 9 12 ns 10, 11 16 ns 9 16 ns 10, 11 21 ns 9 12 ns 10, 11 15 ns CP to Qn See figures 4 and 5 ( PE high or low) Propagation delay time, -60 VCC = 5.5 V Functional tests Maximum clock 1, 2, 3 1/ tPHL1 tPLH2 CP to TC tPHL2 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 5 TABLE I. Electrical performance characteristics - Continued. Test Conditions -55C TC +125C unless otherwise specified Symbol Group A subgroups Limits Min Propagation delay time, tPLH3 CET to TC tPHL3 Max VCC = 5.0 V 9 6 ns RL = 500 10, 11 9 ns CL = 50 pF 9 11 ns 10, 11 12 ns 9 15 ns 10, 11 16.5 ns 9 12 ns 10, 11 14 ns See figures 4 and 5 Propagation delay time, Unit tPLH4 U/ D to TC tPHL4 1/ Not more than one output will be tested at one time and the duration of the test condition shall not exceed 1 second. 2/ fMAX, if not tested, shall be guaranteed to the specified limits. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 6 Device type 01 Case outlines Terminal number E and F 2 Terminal symbols 1 U/ D NC 2 CP U/ D 3 D0 CP 4 D1 D0 5 D2 D1 6 D3 NC 7 CEP D2 8 GND D3 9 PE CEP 10 CET GND 11 Q3 NC 12 Q2 PE 13 Q1 CET 14 Q0 Q3 15 TC Q2 16 VCC NC 17 Q1 18 Q0 19 TC 20 VCC NC = No connection FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 7 PE CEP CET U/ D Action on rising L X X X clock edge Load (Dn-Qn) H L L H Count up (Increment) H L L L Count down (Decrement) H H X X No change (hold) H X H X No change (hold) H = High voltage level L = Low voltage level X = Irrelevant Inputs H h L l X q Outputs Operating mode CP U/ D CEP CET PE Dn Qn TC Parallel load X X X l l L See note X X X l h H See note Count up h l l h X Count up See note Count down l l l h X Count down See note Hold (do nothing) X h X h X qn See note X X h h X qn H = = = = = = = High voltage level steady state High voltage level one setup time prior to the Low-to-High clock transition Low voltage level steady state Low voltage level one setup time prior to the Low-to-High clock transition Irrelevant Lower case letters indicate the state of the referenced output prior to the Low-to-High clock transition Low-to-High clock transition NOTE: TC is LOW when CET is LOW and the counter is at terminal count. Terminal count when counting up is HHHH, and terminal count when counting down is LLLL. FIGURE 2. Truth tables. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 8 FIGURE 3. Logic diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 9 NOTES: 1. Load (presser) to binary thirteen. 2. Count up to fourteen, fifteen (maximum), zero, one, and two. 3. Inhibit. 4. Count down to one, zero (minimum), fifteen, fourteen, and thirteen. FIGURE 4. Counting sequence. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 10 See notes at end of next page. FIGURE 5. Test circuit and switching waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 11 Notes: 1. CL = Load capacitance includes probe and jig capacitance. 2. RT = Termination resistance should be equivalent to ZOUT of pulse generators. 3. VX = Unlocked pins must be held at 0.8 V, 2.7 V or open per function table. 4. All input pulses have the following characteristics; PRR 1 MHz, duty cycle = 50%, tr = tf = 2.5 ns 1 ns. FIGURE 5. Switching waveforms and test circuit - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 12 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Interim electrical parameters (method 5004) Final electrical test parameters (method 5004) Group A test requirements (method 5005) Groups C and D end-point electrical parameters (method 5005) Subgroups (in accordance with MIL-STD-883, method 5005, table I) --1*, 2, 3, 7, 8, 9 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7 and 8 shall include verification of the truth table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 13 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCCVA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86072 A REVISION LEVEL E SHEET 14 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 09-04-14 Approved sources of supply for SMD 5962-86072 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-8607201EA 0C7V7 54F169DMQB 3/ 54F169/BEA 0C7V7 54F169FMQB 3/ 54F169/BFA 0C7V7 54F169LMQB 3/ 54F169/B2A 5962-8607201FA 5962-86072012A 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. Vendor CAGE number 0C7V7 Vendor name and address QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.