APA2174 Stereo Cap-Free Line Driver Features General Description * * The APA2174 is a stereo, single supply and cap-free line driver, which is available in TQFN4x4-20B, TSSOP-16, * * Operating Voltage: 2.3V-4.5V Supply Current and SOP-14 packages. The APA2174 is a ground-reference output and doesn't - IDD=5mA at VDD=3.3V Low Shutdown Current need the output capacitors for DC blocking. The advantages of eliminating the output capacitor are saving the - IDD=1A at VDD=3.3V Ground Reference Output cost, eliminating component height, and improving the low frequency response. - No Output Capacitor Required (for DC Blocking) - Save the PCB Space The external gain setting is recommended using from -1V/V to -10V/V. High PSRR provides increased immunity - Reduce the BOM Costs * * * * * * * - Improve the Low Frequency Response to noise and RF rectification. The independent shutdown control of APA2174 is for right channel and left channel. Output Voltage Swing Can Reach 2Vrms/Ch into 600 at VDD=3.3V The APA2174 is capable of driving 2Vrms at 3.3V into 600 load, and provides thermal protection. High PSRR: 90dB at 217Hz Fast Start-Up Time: 500s Integrate the De-pop Circuitry Simplified Application Circuit Separate Shutdown Function for Flexible Application Thermal Protection Surface-Mount Packaging - TQFN4x4-20B (with Enhanced Thermal Pad) - TSSOP-16 * - SOP-14 Stereo Input Signal RIN Shutdown Control RSD LSD ROUT LIN APA2174 Stereo LOUT Line-Out Signal Lead Free and Green Devices Available (RoHS Compliant) Applications * * * * Set-Top Boxes CD / DVD Players LCD TVs HTIBs (Home Theater in Box) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 1 www.anpec.com.tw APA2174 11 ROUT 12 NC 13 LIN 14 RSD 15 RIN Pin Configuration NC 1 NC 16 10 VDD GND 17 14 RIN 13 RSD CPP 4 8 NC APA2174 15 GND NC 3 9 LOUT LSD 18 16 LSD PVDD 2 APA2174 PGND 5 PVDD 19 7 VSS NC 20 12 LIN 11 ROUT CPN 6 6 NC 10 VDD CVSS 7 CVSS 5 NC 4 CPN 3 PGND 2 CPP 1 VSS 8 9 LOUT TSSOP-16 (Top View) TQFN4x4-20B (Top View) LSD 1 =ThermalPad (connected the ThermalPad to GND plane for better heat dissipation) 14 GND 13 RIN PVDD 2 12 RSD CPP 3 APA2174 PGND 4 11 LIN 10 ROUT CPN 5 9 VDD CVSS 6 8 LOUT VSS 7 SOP-14 (Top View) Ordering and Marking Information Package Code QB : TQFN4x4-20B O : TSSOP-16 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device APA2174 Assembly Material Handling Code Temperature Range Package Code APA2174 QB : APA2174 XXXXX XXXXX - Date Code APA2174 O : APA2174 XXXXX XXXXX - Date Code APA2174 K : APA2174 XXXXX K : SOP-14 XXXXX - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines "Green" to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 2 www.anpec.com.tw APA2174 Absolute Maximum Ratings Symbol (Note 1) Parameter Rating VPVDD_VDD PVDD to VDD Voltage VPGND_GND PGND to GND Voltage -0.3 to 0.3 Supply Voltage (VDD and PVDD to GND and PGND) -0.3 to 5.5 VDD Vcontrol Unit -0.3 to 0.3 Input Voltage (RSD and LSD to GND) V GND-0.3 to VDD+0.3 VSS VSS and CVSS to GND and PGND Voltage VOUT ROUT and LOUT to GND Voltage VCPP CPP to PGND Voltage PGND-0.3 to VDD+0.3 VCPN CPN to PGND Voltage VSS-0.3 to PGND+0.3 TJ -5.5 to 0.3 Maximum Junction Temperature 150 TSTG Storage Temperature Range TSDR Maximum Soldering Temperature Range, 10 Seconds PD V VSS-0.3 to VDD+0.3 -65 to +150 Power Dissipation C 260 Internally Limited W Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol Param e ter Typical Value Unit Thermal Resistance - Junction to Ambient (Note 2) JA JC TQFN4x4-20B TSSOP-16 SOP-14 45 100 110 TQFN4x4-20B 8 Thermal Resistance - Junction to Case (Note 3) o C/W o C/W Note 2: Please refer to " Layout Recommendation", the Thermal Pad on the bottom of the IC should soldered directly to the PCB's Thermal Pad area that with several thermal vias connect to the ground plan, and the PCB is a 2-layer, 5-inch square area with 2oz copper thickness. Note 3: The case temperature is measured at the center of the Thermal Pad on the underside of the TQFN4x4-20B package. Recommended Operating Conditions Symbol Range Parameter Min. Max. VDD Supply Voltage 2.3 4.5 VIH High Level Threshold Voltage RSD, LSD 1 - VIL Low Level Threshold Voltage RSD, LSD - 0.35 Unit V Ri Input Resistance 1 47 Rf Feedback Resistance 4.7 100 RL Load Resistance 500 - CL Maximum Capacitive Load - 400 pF TA Operating Ambient Temperature Range -40 85 TJ Operating Junction Temperature Range -40 125 Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 3 k C www.anpec.com.tw APA2174 Electrical Characteristics VDD=3.3V, VGND=VPGND=0V, VRSD=VLSD=VDD, CCPF=CCPO=2.2F, Ci=1F, Ri=Rf=10k, TA=25oC (unless otherwise noted) APA2174 Symbol Parameter Test Conditions Unit Min. Typ. Max. - 5 10 mA IDD Supply Current ISD Shutdown Current VRSD=VLSD=0V - 1 5 A Input current RSD, LSD - 0.1 - A 400 500 600 kHz - 21 25 Ii CHARGE PUMP fOSC Switching Frequency Req Equivalent Resistance DRIVERS AVO Open Loop Voltage Gain 80 100 - dB GBW Unity Gain Bandwidth 8 10 - MHz - - 100 - 2.5 - V/s -8 - 8 mV - 10 20 Vrms -90 -70 -90 -70 -65 -60 - 500 - s - 8 - kV 2 2.1 - RO Output Resistance VSR Slew Rate VOS Output Offset Voltage Vn Noise Output Voltage IO=10mA VDD=2.3V to 4.5V, RL = 600 VDD=2.3V to 4.5V, Vrr=200mVrms PSRR Power Supply Rejection Ratio fin= 217Hz - fin= 1kHz fin= 20kHz Tstart-up VESD Start-up Time ESD Protection OUTR, OUTL dB THD+N=1%, fin=1kHz RL=600 VO Output Voltage (Stereo, in Phase) 2.3 RL=100k - RL=600 Crosstalk S/N Total Harmonic Distortion Plus Noise VO=2Vrms, RL=600 fin=20Hz fin=1kHz fin=20kHz - Channel Separation VO=2Vrms, RL=600 fin=20Hz fin=1kHz fin=20kHz - VO=2Vrms, RL=600 With A-weighting Filter - Signal to Noise Ratio Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 2.9 - 3.2 RL=100k THD+N Vrms VDD=4.5V, THD+N=1%, fin=1kHz 4 0.020 0.002 0.020 100 90 70 105 - % dB - www.anpec.com.tw APA2174 Typical Operating Characteristics THD+N vs. Output Voltage THD+N vs. Output Voltage 10 10 RL=600 fin=1kHz AV=-1V/V 1 0.1 THD+N (%) THD+N (%) 1 RL=100k fin=1kHz AV=-1V/V VDD=4.5V VDD=3.3V VDD=4.5V 0.1 VDD=3.3V 0.01 0.01 VDD=2.3V VDD=2.3V 0.001 10m 100m 1 Output Voltage (V) 0.0006 10m 5 VDD=3.3V RL=100k Ci=1F AV=-1V/V BW<80kHz 0.1 THD+N (%) THD+N (%) VDD=3.3V RL=600 Ci=1F AV=-1V/V BW<80kHz 0.01 VO=0.1Vrms 0.01 VO=1Vrms VO=1Vrms VO=2Vrms 0.001 100 1k Frequency (Hz) 0.001 0.0006 10k 20k VO=2Vrms 20 Crosstalk vs. Frequency 1k Frequency (Hz) 10k 20k +0 VDD=3.3V RL=600 AV=-1V/V Ci=1F VO=2Vrms -40 -40 -60 Right to Left -80 VDD=3.3V RL=100k AV=-1V/V Ci=1F VO=2Vrms -20 Crosstalk (dB) -20 Crosstalk (dB) 100 Crosstalk vs. Frequency +0 -60 Right to Left -80 -100 -100 Left to Right -120 -140 5 1 VO=0.1Vrms 0.0006 20 1 THD+N vs. Frequency THD+N vs. Frequency 1 0.1 100m Output Voltage (V) 20 100 1k Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 -120 -140 10k 20k 5 Left to Right 20 100 1k Frequency (Hz) 10k 20k www.anpec.com.tw APA2174 Typical Operating Characteristics (Cont.) Output Noise Voltage vs. Frequency Output Noise Voltage vs. Frequency 50 Left channel 10 Right channel 1 20 100 1k Frequency (Hz) VDD=3.3V RL=100k AV=-1V/V Ci=1F A-Weighting Right channel 1 10k 20k 20 Frequency Response +1 +200 +0 VDD=3.3V Av=-1V/V RL=600 Ci=1F 10 100 1k 10k Frequency (Hz) 200k Gain (dB) +180 Phase (deg) Gain (dB) +220 Phase -1 -3 Gain Phase -2 +140 -3 +180 VDD=3.3V Av=-1V/V RL=100k Ci=1F 10 -60 -70 -80 Right channel -90 -100 -110 -120 Left channel 20 100 1k Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 100 1k 10k Frequency (Hz) +160 +140 200k PSRR vs. Frequency Power Supply Rejection Ratio (dB) Power Supply Rejection Ratio (dB) -40 -50 +200 -1 +160 VDD=3.3V RL=600 AV=-1V/V Ci=1F Vrr=0.1Vrms -30 10k 20k +220 PSRR vs. Frequency +0 -10 -20 1k Frequency Response Gain -2 100 Frequency (Hz) +1 +0 Left channel 10 Phase (deg) VDD=3.3V RL=600 AV=-1V/V Ci=1F A-Weighting Output Noise Voltage (Vrms) Output Noise Voltage (Vrms) 50 +0 -10 -20 -30 -40 -50 -60 -70 -80 Right channel -90 Left channel -100 -110 -120 10k 20k VDD=3.3V RL=100k AV=-1V/V Ci=1F Vrr=0.1Vrms 20 100 1k 10k 20k Frequency (Hz) 6 www.anpec.com.tw APA2174 Typical Operating Characteristics (Cont.) Output Voltage FFT vs. Frequency Supply Current vs. Supply Voltage +0 6 VDD=3.3V RL=600 AV=-1V/V Vo=-60dB to 2Vrms -40 5 Supply Current (mA) Output Voltage FFT (dBr) -20 -60 -80 -100 -120 4 3 2 1 -140 0 0 5k 10k 15k Frequency (Hz) 20k GSM Power Supply Rejection vs. Frequency -60 -90 -120 -150 Supply Voltage (dBV) +0 +0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Supply Voltage (V) GSM Power Supply Rejection vs. Time -30 Output Voltage (dBV) Av=-1V/V No Load 1 VDD V LOUT -30 2 -60 VROUT -90 3 -120 -150 0 400 800 1.2k 1.6k 2k CH1: VDD, 500mV/Div, DC, Offset=3.3V CH2: VLOUT, 20mV/Div, DC CH3: VROUT, 20mV/Div, DC TIME:2ms/Div Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 7 www.anpec.com.tw APA2174 Operating Waveforms Refer to the typical application circuit. The test condition is VDD=VSD=3.3V, RL=600, TA= 25oC, unless otherwise specified. Output Transient at Power On Output Transient at Power Off V DD VDD 1 2 1 VLOUT VLOUT 2 VROUT VROUT 3 3 CH1: VDD, 1V/Div, DC CH2: VLOUT, 20mV/Div, DC CH3: VROUT, 20mV/Div, DC TIME:2ms/Div CH1: VDD, 1V/Div, DC CH2: VLOUT, 20mV/Div, DC CH3: VROUT, 20mV/Div, DC TIME:2ms/Div Shutdown Release Load Transient Response VSD VS D 1 1 2 2 VLOUT VLOUT 3 3 VROUT VROUT CH1: VSD, 1V/Div, DC CH2: VLOUT, 1V/Div, DC CH3: VROUT, 1V/Div, DC TIME:2ms/Div Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 CH1: VSD, 1V/Div, DC CH2: VLOUT, 1V/Div, DC CH3: VROUT, 1V/Div, DC TIME:2ms/Div 8 www.anpec.com.tw APA2174 Pin Description PIN NO. NAME I/O/P FUNCTION TQFN4x4-20B TSSOP-16 SOP-14 1 4 3 CPP I/O 2 5 4 PGND P 3 4,6,8,12, 16,20 5 6 5 CPN I/O 1,3 - NC - No Connection. 7 6 CVSS O Charge pump output, connect to the "VSS". 7 8 7 VSS P Line Driver negative pow er supply. 9 9 8 LOUT O Left channel output for line driver. 10 10 9 VDD P Pow er supply. 11 11 10 ROUT O Right channel output for line driver. 13 12 11 LIN I Left channel input terminal. 14 13 12 RSD I Right channel shutdow n mode control input signal, pull low for shutdow n the right channel line driver. 15 14 13 RIN I Right channel input terminal. 17 15 14 GND P Ground connection for circuitry. 18 16 1 LSD I Left channel shutdow n mode control input signal, pull low for shutdow n the left channel line driver. 19 2 2 PVDD P Charge pump's pow er supply. Charge pump flying capacitor positive connection. Charge pump's ground. Charge pump flying capacitor negative connection. Block Diagram RIN ROUT GND LOUT LIN PVDD RSD LSD Shutdown Circuit PGND Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 Power and Depop Circuit CPP Charge Pump VDD VSS 9 CPN CVSS www.anpec.com.tw APA2174 Typical Application Circuit 1. Inverting Amplifier Rf1 10k Ci1 Ri1 RIN ROUT 10k 1F Right Channel Output ROUT AUDIO DAC GND Rf3 10k Ci2 Left Channel Output LOUT LIN LOUT Ri210k 1F VDD PVDD RSD Shutdown Control Power and Depop Circuit Shutdown ckt LSD Charge Pump VDD VDD VSS VSS PGND CS 10F C CPO CCPB 2.2 F CPP CCPF CPN 2.2 F CVSS 2.2F 2. Secind-Order Active Low-Pass Filter Rf1 Ci1 Cf1 Ri RIN ROUT Rf2 Cf2 1F AUDIO DAC CO Rf1 Cf1 Ci2 1F Ri Left Channel Output LOUT CO LIN LOUT Right Channel Output ROUT GND Cf2 220pF 220pF Rf2 VDD PVDD Shutdown Control RSD Shutdown Circuit LSD CS 10 Charge Pump VDD VDD VSS VSS PGND Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 Power and Depop Circuit 10 F CCPO CPP CCPF CPN CCPB 2.2F 2.2 F CVSS 2.2 F www.anpec.com.tw APA2174 Function Description Line Driver Operation Shutdown Function In order to reduce power consumption while not in use, the APA2174 contains two shutdown controllers to allow VDD either channel being independent and externally turns off the amplifier bias circuitry. LSD controls the left channel VOUT VDD/2 and RSD controls the right channel. This shutdown feature turns the amplifier off when logic low is placed on the 0 RSD and LSD pins for the APA2174. The trigger point between a logic high is 1.0V and logic low level is 0.35V. It is Conventional Line Driver VDD recommended to switch between ground and the supply voltage VDD to provide maximum device performance. By 0 charge pump is disabled, and IDD for the APA2174 is in shutdown mode. The charge pump is enabled once ei- switching the both RSD and LSD pins to a low level, the amplifier enters a low-consumption current circumstance, VOUT ther RSD or LSD pin is pulled to high. In normal operating, the APA2174's RSD and LSD pins should be pulled to a high level to keep the IC out of the shutdown mode. The RSD and LSD pins should be tied to a definite voltage to VSS avoid unwanted circumstance change. Cap-free Line Driver Figure 1: Cap-free Line Driver's Operation The APA2174's line drivers use a charge pump to invert the positive power supply (VDD) to negative power supply (VSS), see figure1. The line drivers operate at this bipolar power supply (VDD and VSS) and the outputs reference refers to the ground. This feature eliminates the output capacitor that is using in conventional single-ended line drive amplifier. Compare with the single power supply amplifier, the power supply range has almost doubled. Thermal Protection The thermal protection circuit limits the junction temperature of the APA2174. When the junction temperature exceeds TJ = +150OC, a thermal sensor turns off the driver, allowing the devices to cool. The thermal sensor allows the driver to start-up after the junction temperature down about 125OC. The thermal protection is designed with a 25OC hysteresis to lower the average TJ during continuous thermal overload conditions, increasing lifetime of the ICs. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 11 www.anpec.com.tw APA2174 Application Information Second Order Low Pass Filter Input Capacitor, Ci Using the APA2174 as a second order, Multi-Feedback active Butterworth filter for audio DACs. The topology is Ri Ci Rf like the figure 2. Cf1=Cint+Cext Cint=internal Capacitance(6pF) Cext Rf1 Ci Figure 3: Typical Application Circuit Rf2 Ri Cint 6pF In the typical application, an input capacitor, Ci, is required to allow the amplifier to bias the input signal to the proper DC level for optimum operation. In this case, Ci and the Cf2 Cout 220pF minimum input impedance Ri from a high-pass filter with the corner frequency are determined in the following equation: Figure 2: Active Butterworth Filter fC(highpass ) = Table 1: The recommended components'value. High Low Ci Cf1 Cf2 Ri Rf1 Rf2 AV Pass Pass -1V/V 16Hz 40kHz 1F 100pF 680pF 10k 10k 24k 1 2RiCi (4) The value of Ci must be considered carefully because it -1.5V/V 19Hz 40kHz 1F 68pF 680pF 8.2k 12k 30k directly affects the low frequency performance of the circuit. Ri is the external input resistance that typical value -2V/V 11Hz 40kHz 1F 33pF 330pF 15k 30k 47k is 10k and the specification calls for a flat bass re- -2V/V 11Hz 30kHz 1F 47pF 470pF 15k 30k 43k sponse down to 20Hz. Equation is reconfigured as below: -3.3V/V 12Hz 30kHz 1F 33pF 470pF 13k 43k 43k -10V/V 15Hz 30kHz 2.2F 22pF Ci = 1nF 4.7k 47k 27k R f1 Ri chosen. A further consideration for this capacitor is the leakage path from the input source through the input net- (1) work (Ri + Rf, Ci) to the load. This leakage current creates a DC offset voltage at the The high pass filter's cutoff frequency is: fC(highpass) = 1 2RiCi (2) input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason, a low The low pass filter's cutoff frequency is: fC(lowpass) = (5) When the input resistance variation is considered, the Ci is 0.8F, so a value in the range of 1F to 2.2F would be The overall gain is: AV = - 1 2RifC(highpass) 1 2 R f1R f 2Cf1Cf 2 leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the negative side of (3) the capacitor should face the amplifiers' input in most applications because the DC level of the amplifiers'input is held at GND. Please note that it is important to confirm the capacitor polarity in the application. Input Resistor, Ri The gain of the APA2174 is be set by the external input resistor (Ri ) and external feedback resistor (Rf). Please see the figure 3. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 12 www.anpec.com.tw APA2174 Application Information (Cont.) the performance of line drive amplifier. Increasing the flying capacitor's value will improve the Input Resistor, Ri (Cont.) Gain(A V ) = Rf Ri (6) load transient of charge pump. It is recommended using t he l o w ES R c er am i c cap ac it o rs ( X7R t y pe i s The external gain setting is recommended using from -1V/V to -10V/V, and the Ri is in the range from 1k to recommended) above 2.2F. 47k. It's recommended to use 1% tolerance resistor or better. Keep the input trace as short as possible to limit Charge Pump Output Capacitor, CCPO The output capacitor's value affects the power ripple di- the noise injection. The gain is recommended to set -1V/V, and Ri is 10k, and Rf is 10k. rectly at CVSS (VSS). Increasing the value of output capacitor reduces the power ripple. The ESR of output capacitor affects the load transient of CVSS (VSS). Lower ESR and greater than 2.2F ceramic capacitor is a recommendation. Feedback Resistor, Rf Refer the figure 3, the external gain is setting by Ri and Rf; and the gain setting is recommended using from -1V/V to Layout Consideration -10V/V. The Rf is in the range from 4.7k to 100k. It's recommended to use 1% tolerance resistor or better. Power Supply Decoupling, Cs ThermalVia Diameter 0.3mm X 5 0.9mm The APA2174 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to 0.35mm vents the oscillations being caused by long lead length between the amplifier and the speaker. 4.9mm 2.2mm ensure the output total harmonic distortion (THD+N) is as low as possible. Power supply decoupling also pre- 0.5mm The optimum decoupling is achieved by using two different types of capacitors that target on different types of 2.2mm noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low Ground Plane for ThermalPAD equivalent-series- resistance (ESR) ceramic capacitor, typically 0.1F, is placed as close as possible to the de- Figure 2: TQFN4x4-20B Land Pattern Recommendation vice VDD and PVDD lead for the best performance. For filtering lower frequency noise signals, a large alumi- 1. All components should be placed close to the APA2174. For example, the input capacitor (Ci) should be close to num electrolytic capacitor of 10F or greater placed near the audio power amplifier is recommended. APA2174's input pins to avoid causing noise coupling to APA2174's high impedance inputs; the decoupling Charge Pump Bypass Capacitor, C CPB The bypass capacitor (CCPB) relates with the charge capacitor (CS) should be placed by the APA2174's power pin to decouple the power rail noise. pump switching transient. The capacitor's value is same as flying capacitor (2.2F). Place it close to the PVDD and 2. The output traces should be short and wide (>20mil), 3. The input trace should be short and symmetric. PGND. 4. The power trace width should be greater than 20mil. 5. The TQFN Thermal PAD should be soldered on PCB, Charge Pump Flying Capacitor, CCPF and the ground plane needs soldered mask (to avoid short circuit) except the Thermal PAD area. The flying capacitor affects the load transient of the charge pump. If the capacitor's value is too small, then that will degrade the charge pump's current driver capability and Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 13 www.anpec.com.tw APA2174 Package Information TQFN4x4-20B A b E D Pin 1 A1 A3 D2 NX aaa c L K E2 Pin 1 Corner e S Y M B O L TQFN4x4-20B MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 0.70 0.80 0.028 0.031 A1 0.00 0.05 0.000 0.002 A3 0.20 REF 0.008 REF b 0.18 0.30 0.008 0.012 D 3.90 4.10 0.154 0.161 0.098 D2 2.00 2.70 0.079 E 3.90 4.10 0.154 0.161 E2 2.00 2.70 0.079 0.098 0.45 0.014 e 0.50 BSC L 0.35 K 0.20 aaa 0.020 BSC 0.018 0.008 0.08 0.003 Note : 1. Followed from JEDEC MO-220 VGGD-5. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 14 www.anpec.com.tw APA2174 Package Information TSSOP-16 D e E E1 SEE VIEW A C 0.25 A A2 b GAUGE PLANE A1 SEATING PLANE VIEW A S Y M B O L L TSSOP-16 MILLIMETERS MIN. INCHES MIN. MAX. A MAX. 0.047 1.20 A1 0.05 0.15 0.002 0.006 A2 0.80 1.05 0.031 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.008 D 4.90 5.10 0.193 0.201 E 6.20 6.60 0.244 0.260 E1 4.30 4.50 0.169 0.177 e L 0 0.65 BSC 0.45 0o 0.026 BSC 0.018 0.75 8o 0o 0.030 8o Note : 1. Follow from JEDEC MO-153 AB. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension "E1" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 15 www.anpec.com.tw APA2174 Package Information SOP-14 D E E1 SEE VIEW A h X 45 e c 0.25 A GAUGE PLANE SEATING PLANE A1 A2 b L VIEW A S Y M B O L SOP-14 INCHES MILLIMETERS MIN. MAX. A MIN. MAX. 1.75 0.25 0.069 0.010 0.004 A1 0.10 A2 1.25 b 0.31 0.51 0.012 0.020 c 0.17 0.25 0.007 0.010 D 8.55 8.75 0.337 0.344 5.80 6.20 0.228 0.244 3.80 4.00 0.150 0.157 0.020 0.050 E E1 e 0.049 1.27 BSC 0.050 BSC h 0.25 0.50 0.010 L 0.40 1.27 0.016 0 0 8 0 8 Note: 1. Follow JEDEC MS-012 AB. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension "E" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 16 www.anpec.com.tw APA2174 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application TQFN4x4-20B Application TSSOP-16 Application SOP-14 A H 330.02.00 50 MIN. P0 P1 P2 4.00.10 8.00.10 2.00.05 A H 330.02.00 50 MIN. P0 P1 T1 C 12.4+2.00 13.0+0.50 -0.00 -0.20 T1 D0 1.5+0.10 -0.00 C 12.4+2.00 13.0+0.50 -0.00 -0.20 d D 1.5 MIN. 20.2 MIN. D1 T 0.6+0.00 -0.40 1.5 MIN. d D 1.5 MIN. 20.2 MIN. W E1 12.00.30 1.750.10 F 5.50.05 A0 B0 K0 4.300.20 4.300.20 1.300.20 W E1 F 12.00.30 1.750.10 5.500.05 P2 D0 D1 T A0 B0 K0 1.5 MIN. 0.6+0.00 -0.40 6.900.20 5.400.20 1.600.20 W E1 F 4.000.10 8.000.10 2.000.05 1.5+0.10 -0.00 A H T1 C d D 330.02.00 50 MIN. 16.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. P0 P1 P2 D0 D1 T A0 B0 K0 2.00.10 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 6.400.20 9.000.20 2.100.20 4.00.10 8.00.10 16.00.30 1.750.10 7.500.10 (mm) Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 17 www.anpec.com.tw APA2174 Devices Per Unit Package Type Unit Quantity TQFN4x4-20B Tape & Reel 3000 TSSOP-16 Tape & Reel 2500 SOP-14 Tape & Reel 2500 Taping Direction Information TQFN4x4-20B USER DIRECTION OF FEED TSSOP-16 USER DIRECTION OF FEED Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 18 www.anpec.com.tw APA2174 Taping Direction Information SOP-14 USER DIRECTION OF FEED Classification Profile Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 19 www.anpec.com.tw APA2174 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 C 150 C 60-120 seconds 150 C 200 C 60-120 seconds 3 C/second max. 3C/second max. 183 C 60-150 seconds 217 C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 C/second max. 6 C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process - Classification Temperatures (Tc) 3 Package Thickness <2.5 mm Volume mm <350 235 C Volume mm 350 220 C 2.5 mm 220 C 220 C 3 Table 2. Pb-free Process - Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm - 2.5 mm 2.5 mm Volume mm <350 260 C 260 C 250 C 3 Volume mm 350-2000 260 C 250 C 245 C 3 Volume mm >2000 260 C 245 C 245 C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 20 Description 5 Sec, 245C 1000 Hrs, Bias @ Tj=125C 168 Hrs, 100%RH, 2atm, 121C 500 Cycles, -65C~150C VHBM2KV VMM200V 10ms, 1tr100mA www.anpec.com.tw APA2174 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.6 - Dec., 2011 21 www.anpec.com.tw