LTC1100 Precision, Zero-Drift Instrumentation Amplifier U DESCRIPTIO FEATURES The LTC(R)1100 is a high precision instrumentation amplifier using zero-drift techniques to achieve outstanding DC performance. The input DC offset is typically 1V while the DC offset drift is typically 5nV/C; a very low bias current of 65pA is also achieved. Offset Voltage: 10V Max Offset Voltage Drift: 100nV/C Max Bias Current: 65pA Max Offset Current: 65pA Max Gain Nonlinearity: 20ppm Max Gain Error: 0.075% Max CMRR: 90dB 0.1Hz to 10Hz Noise: 1.9VP-P Single 5V Supply Operation 8-Pin MiniDIP The LTC1100 is self-contained; that is, it achieves a differential gain of 100 without any external gain setting resistor or trim pot. The gain linearity is 20ppm and the gain drift is 4ppm/C. The LTC1100 operates from a single 5V supply up to 8V. The output typically swings 300mV from its power supply rails with a 10k load. U APPLICATIO S An optional external capacitor can be added from Pin 7 to Pin 8 to tailor the device's 18kHz bandwidth and to eliminate any unwanted noise pickup. Thermocouple Amplifiers Strain Gauge Amplifiers Differential to Single-Ended Converters The LTC1100 is also offered in a 16-pin surface mount package with selectable gains of 10 or 100. The LTC1100 is manufactured using Linear Technology's enhanced LTCMOSTM silicon gate process. , LTC and LT are registered trademarks of Linear Technology Corporation. LTCMOS is a trademark of Linear Technology Corporation U TYPICAL APPLICATIO Single 5V Supply, DC Instrumentation Amplifier -VIN 1 8 2 7 3 LTC1100 4 6 5 VOUT 0.01F VIN V+ = 5V 0.1F VOUT = 100 [VIN - (-VIN)] LTC1100 * TA01 1100fc 1 LTC1100 W W W AXI U U ABSOLUTE RATI GS (Note 1) Operating Temperature Range LTC1100M/AM (OBSOLETE) ........... -55C to 125C LTC1100C ......................................... -40C to 85C Output Short Circuit Duration ......................... Indefinite Storage Temperature Range ................ -65C to 150C Total Supply Voltage (V + to V -) ............................. 18V Input Voltage ....................... (V + + 0.3V) to (V - - 0.3V) Lead Temperature (Soldering, 10 sec)................. 300C U U W PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER TOP VIEW GND REF 1 8 VOUT CMRR 2 7 COMP -VIN 3 6 VIN V- 4 5 V+ NC 1 LTC1100CN8 16 NC GND REF 2 N8 PACKAGE 8-LEAD PDIP TJMAX = 110C, JA = 130C/W J PACKAGE 8-LEAD CERDIP TJMAX = 150C, JA = 100C/W ORDER PART NUMBER TOP VIEW G = 10 3 14 G = 10 CMRR 4 13 COMP NC 5 12 NC -VIN 6 11 VIN V- LTC1100CJ8 LTC1100AMJ8 LTC1100MJ8 LTC1100CSW 15 VOUT 10 V+ 7 NC 8 9 NC SW PACKAGE 16-LEAD PLASTIC SO WIDE OBSOLETE PACKAGE TJMAX = 110C, JA = 100C/W Consider the N Package for an Alternate Source Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, R L = 10k, C C = 1000pF, unless otherwise noted. PARAMETER CONDITIONS MIN Gain Error LTC1100ACN TYP MAX Input Offset Voltage (Note 2) Input Offset Voltage Drift (Note 2) Input Noise Voltage DC to 10Hz, TA = 25C 0.01 0.075 0.150 % % 3 12 8 30 3 12 20 60 ppm ppm 1 10 1 10 V 5 100 5 100 Common Mode Rejection Ratio VCM = 2.3V to -4.7V (Note 3) Power Supply Rejection Ratio VS = 2.375V to 8V 120 Output Voltage Swing RL = 2k, VS = 8V RL =10k, VS = 8V - 7.2 - 7.7 Supply Current 104 1.9 nV/C VP-P 2.5 50 120 2.5 65 135 pA pA 10 50 10 65 pA Input Offset Current UNITS 0.05 0.10 1.9 Input Bias Current LTC1100CN/CJ TYP MAX 0.01 Gain Nonlinearity MIN 115 90 110 dB 105 6.2 7.5 2.4 3.4 2.8 4.0 dB - 7.2 - 7.7 2.4 3.4 6.2 7.5 V V 3.3 4.5 mA mA Internal Sampling Frequency 2.8 2.8 kHz Bandwidth 18 18 kHz 1100fc 2 LTC1100 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, R L = 10k, C C = 1000pF, unless otherwise noted. PARAMETER LTC1100AMJ (Note 4) MIN TYP MAX CONDITIONS Gain Error (Note 2) Input Offset Voltage Drift (Note 2) Input Noise Voltage DC to 10Hz, TA = 25C 0.01 0.075 0.150 % % 3 8 40 3 20 65 ppm ppm 1 10 1 10 V 5 100 5 100 nV/C 1.9 Input Bias Current 5 Input Offset Current UNITS 0.05 0.11 Input Offset Voltage LTC1100MJ TYP MAX 0.01 Gain Nonlinearity MIN 1.9 50 300 80 5 VP-P 65 450 pA pA 120 pA Common Mode Rejection Ratio VCM = -4.7V to 2.3V 100 90 dB Power Supply Rejection Ratio VS = 2.375V to 8V 115 95 dB Output Voltage Swing RL = 10k, VS = 8V RL = 2k, VS = 8V - 7.4 - 7.0 Supply Current 7.4 6.0 - 7.4 - 7.0 2.4 2.4 4.2 7.4 6.0 V V 3.3 4.6 mA mA Internal Sampling Frequency 2.8 2.8 kHz Bandwidth 18 18 kHz ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, R L = 10k, C C = 1000pF, unless otherwise specified. PARAMETER CONDITIONS Gain Error TA = 25C, A V =100 A V =100 A V =10 A V =10 Gain Nonlinearity TA = 25C, A V =100 A V =100 A V =10 A V =10 Input Offset Voltage (Note 2) Input Offset Voltage Drift (Note 2) Input Noise Voltage DC to 10Hz, TA = 25C MIN LTC1100ACS TYP MAX 0.01 0.01 3 12 1 8 30 8 25 1 5 0.01 Common Mode Rejection Ratio Power Supply Rejection Ratio % % % % 3 12 1 20 60 10 40 ppm ppm ppm ppm 10 1 10 V 100 5 100 nV/C 0.01 VCM = -4.7V to 2.3V, A V =100 A V =10 104 95 VS = 2.375V to 8V 120 1.9 VP-P 2.5 50 120 2.5 65 135 pA pA 10 50 10 65 pA Input Offset Current UNITS 0.075 0.150 0.060 0.150 1.9 Input Bias Current LTC1100CSW TYP MAX 0.05 0.10 0.04 0.10 MIN 115 90 85 105 110 dB dB dB 1100fc 3 LTC1100 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, R L = 10k, C C = 1000pF, unless otherwise noted. PARAMETER CONDITIONS Output Voltage Swing RL=10k, VS = 8V RL= 2k, VS = 8V MIN LTC1100ACS TYP MAX MIN LTC1100CSW TYP MAX UNITS - 7.2 - 7.7 6.2 7.5 - 7.2 - 7.7 6.2 7.5 V V 3.3 4.5 mA mA Supply Current 2.4 3.4 2.8 4.0 2.4 3.4 Internal Sampling Frequency 2.8 2.8 kHz Bandwidth 18 180 18 180 kHz kHz G = 100 G = 10 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: These parameters are guaranteed by design. Thermocouple effects preclude measurement of these voltage levels in high speed automatic test systems. VOS is measured to a limit determined by test equipment capability. Note 3: See Applications Information, Single Supply Operation. Note 4: Please consult Linear Technology Marketing. W BLOCK DIAGRA S 2 R R 14 7 + 99R 5 (V ) 99R 2 - 1 3 R 90R - 9R 4 - R 13 3 + - 15 R = 2.5k + 90R + 6 8 6 9R 10 (V+) 11 R = 2.5k + 7 (V - ) 4 (V -) LTC1100 * BD01 LTC1100 * BD02 NOTE: FOR A VOLTAGE GAIN OF 10V/V SHORT PIN 2 TO 3, AND PIN 14 TO 15. U W TYPICAL PERFOR A CE CHARACTERISTICS 0.05 DIFFERENTIAL GAIN (dB) VS = 8V RL = 50k 0.03 0.02 0.01 0 -0.01 -50 45 210 40 180 35 PHASE GAIN (G = 100) 30 120 25 90 60 20 GAIN (G = 10) 15 30 10 -25 75 0 25 50 TEMPERATURE (C) 100 125 5 100 0 1k 10k 100k -30 1M FREQUENCY (Hz) LTC1100 * TPC01 150 LTC1100 * TPC02 25 20 PHASE SHIFT (DEGREES) GAIN ERROR (%) 0.04 Gain Nonlinearity vs Temperature Gain, Phase vs Frequency GAIN NONLINEARITY (ppm) Gain Error vs Temperature VS = 8V RL = 50k 15 10 5 0 -5 -50 -25 75 0 25 50 TEMPERATURE (C) 100 125 LTC1100 * TPC03 1100fc 4 LTC1100 U W TYPICAL PERFOR A CE CHARACTERISTICS Power Supply Rejection Ratio vs Frequency Supply Current vs Supply Voltage 150 POWER SUPPLY REJECTION RATIO (dB) 3 TA = 25C 2 TA = 125C 1 8 125 100 75 50 25 2 6 10 12 14 16 4 8 TOTAL SUPPLY VOLTAGE V+ TO V - (V) 1k 10 100 FREQUENCY (Hz) 1 LTC1100 * TPC04 G = 100, RC = 100k CC = 10pF G = 10, RC = CC = 0pF 1 40 3 20 6 0 0.1 - 2 7 VS = 5V, TA 85C 5 NEGATIVE 4 3 2 + 1 10k POSITIVE VS = 2.5V, TA 85C NEGATIVE POSITIVE 0 100k 1 2 3 4 5 6 7 8 LOAD RESISTANCE (k) Bias Current vs Common Mode Voltage 60 TA = 25C - 60 -120 TA = -55C -180 -200 3 4 LTC1100 * TPC10 MOD NGE 3 4 6 5 SUPPLY VOLTAGE (V) 8 7 VS = 5V 9 8 RL = 100k 7 RL = 2k 6 5 4 3 2 1 1k 10k FREQUENCY (Hz) 100k LTC1100 * TPC09 Internal Sampling Frequency vs Supply Voltage 4 TA = -55C 90 75 60 45 30 3 TA = 25C 2 TA = 125C 1 15 0 0 -6 -5 -4 -3 -2 -1 0 1 2 COMMON MODE VOLTAGE (V) ON E RA 0 100 10 SAMPLING FREQUENCY (kHz) 120 0 9 105 VS = 5V TA = 125C MM LTC1100 * TPC06 Voltage Noise vs Frequency VOLTAGE NOISE DENSITY (nV/ Hz) BIAS CURRENT (pA) 180 E CO LTC1100 * TPC08 LTC1100 * TPC07 240 ATIV 2 0 10 100 1k FREQUENCY (Hz) MM Undistorted Output Swing vs Frequency POSITIVE 6 LTC1100 1 NEG -4 100k VS = 8V, TA 85C 8 NEGATIVE CC E CO -2 10 9 VOUT SWING (V) CMRR (dB) RC 60 360 10k 10 120 80 ITIV NGE 0 Output Voltage Swing vs Load G = 100, RC = CC = 0pF POS E RA LTC1100 * TPC05 CMRR vs Frequency 100 2 OD ON M -8 0.1 18 4 -6 0 0 TA = 25C 6 PEAK-TO-PEAK OUTPUT SWING (V) SUPPLY CURRENT (mA) TA = -55C COMMON MODE RANGE (V) 4 300 Common Mode Range vs Supply Voltage 10 100 1k 10k FREQUENCY (Hz) 100k LTC1100 * TPC11 2 6 10 12 14 16 4 8 TOTAL SUPPLY VOLTAGE V + TO V - (V) 18 LTC1100 * TPC12 1100fc 5 LTC1100 U W TYPICAL PERFOR A CE CHARACTERISTICS Large-Signal Transient Response G = 100, VS = 5V Small-Signal Transient Response G = 100, VS = 5V Overload Recovery G = 100, VS = 5V 1V/DIV 50mV/DIV 2V/DIV 2V/DIV 10s/DIV 5s/DIV 10s/DIV LTC1100 * TPC13 LTC1100 * TPC14 Large-Signal Transient Response G = 10 (LTC1100CS Only), VS = 5V LTC1100 * TPC15 Small-Signal Transient Response G = 10 (LTC1100CS Only), VS = 5V Overload Recovery G = 10 (LTC1100CS Only), VS = 5V 1V/DIV 50ms/DIV 2V/DIV 2V/DIV 10s/DIV 10s/DIV LTC1100 * TPC16 1s/DIV LTC1100 * TPC17 LTC1100 * TPC18 U U U PI FU CTIO S 8-Pin DIP (16-Pin SO) Pin 1 (2) GND REF: Connect to system ground. This sets the zero reference for the internal op amps. Pin 2 (4) CMRR: This pin tailors the gain of the internal amplifiers to maximize AC CMRR. For applications which emphasize CMRR requirements, connect a 100k resistor and a 10pF capacitor in series from CMRR to ground. See the Applications section. Pin 3 (6) -VIN: Inverting Input. Pin 4 (7) V - : Negative Supply. Pin 5 (10) V + : Positive Supply. Pin 6 (11) VIN: Noninverting Input. Pin 7 (13) COMP: This pin reduces the bandwidth of the internal amplifiers for applications at or near DC. Clock feedthrough from the internal sampling clock can also be suppressed by using the COMP pin. The standard compensation circuit is a capacitor from COMP to VOUT, sized to provide an RC pole with the internal 247k resistor (22.5k for LTC1100CS in gain-of-10 mode). See the Applications section. Pin 8 (15) VOUT: Signal Output. 16-Pin SO Package Only (3) G = 10: Short to pin (2) for gain of 10. Leave disconnected for gain of 100. (14) G = 10: Short to pin (15) for gain of 10. Leave disconnected for gain of 100. NOTE: Both pins must be shorted or open to provide correct gain. (1),(5),(8),(9),(12),(16) NC: No Internal Connection. 1100fc 6 LTC1100 U W U U APPLICATIO S I FOR ATIO Common Mode Rejection Aliasing Due to very precise matching of the internal resistors, no trims are required to obtain a DC CMRR of better than 100dB; however, things change as frequency rises. The inverting amplifier is in a gain of 1.01 (1.1 for gain of 10), while the noninverting amplifier is in a gain of 99 (9 for gain of 10). As frequency rises, the higher gain amplifier hits its gain-bandwidth limit long before the low gain amplifier, degrading CMRR. The solution is straightforward -- slow down the inverting amplifier to match the noninverting amp. Figure 1 shows the recommended circuit. The problem is less pronounced in the LTC1100CS in gain-of-10 mode; no CMRR trims are necessary. The LTC1100 is a chopper-stabilized instrumentation amplifier; like all sampled systems it exhibits aliasing behavior for input frequencies at or near the internal sampling frequency. The LTC1100 incorporates specialized anti-aliasing circuitry which typically attenuates aliasing products by 60dB; however, extremely sensitive systems may still have to take precautions to avoid aliasing errors. For more information, see the LTC1051/ LTC1053 data sheet. - 3 - 8 LTC1100 + 6 + 2 100k 10pF LTC1100 * TA02 Figure 1. Improving AC CMRR Overcompensation Many instrumentation amplifier applications process DC or low frequency signals only; consequently, the 18kHz (180kHz for G = 10) bandwidth of the LTC1100 can be reduced to minimize system errors or reduce transmitted clock noise by using the COMP pin. A feedback cap from COMP to VOUT will react with the 247k internal resistor (22.5k for G = 10) to limit the bandwidth, as in Figure 2. Single Supply Operation The LTC1100 will operate on a single 5V supply, and the common mode range of the internal op amps includes ground; single supply operation is limited only by the output swing of the op amps. The internal inverting amplifier has a negative saturation limit of 5mV typically, setting the minimum common mode limit at 5mV/1.01 (or 1.1 for gain of 10). The inputs can be biased above ground, as shown in Figure 3. Low cost biasing components can be used since any errors appear as a common mode term and are rejected. The minimum differential input voltage is limited by the swing of the output op amp. Lightly loaded, it will swing down to 5mV, allowing differential input voltages as low as 50V (450V for gain of 10). Single supply operation limits the LTC1100 to positive differential inputs only; negative inputs will give a saturated zero output. 5V 5V RBIAS 6 CB 3 - + - 7 LTC1100 6 8 5 LTC1100 SENSOR 3 + 8 OUTPUT 0V TO 5V 4, 1 1N4148 f 3dB = 1 2 R INT x CB R INT = 247k FOR G = 100 22.5k FOR G = 10 LTC1100 * TA03 LTC1100 * TA04 Figure 3 Figure 2. Overcompensation to Reduce System Bandwidth 1100fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7 LTC1100 U PACKAGE DESCRIPTIO J8 Package 8-Lead CERDIP (Narrow .300 Inch, Hermetic) (Reference LTC DWG # 05-08-1110) .300 BSC (7.62 BSC) .008 - .018 (0.203 - 0.457) CORNER LEADS OPTION (4 PLCS) 0 - 15 .015 - .060 (0.381 - 1.524) .023 - .045 (0.584 - 1.143) HALF LEAD OPTION .045 - .068 (1.143 - 1.650) FULL LEAD OPTION .405 (10.287) MAX .005 (0.127) MIN .200 (5.080) MAX 8 NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS .014 - .026 (0.360 - 0.660) 5 .025 (0.635) RAD TYP .220 - .310 (5.588 - 7.874) 1 .045 - .065 (1.143 - 1.651) 6 7 2 3 4 .125 3.175 MIN .100 (2.54) BSC J8 0801 OBSOLETE PACKAGE N8 Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) .300 - .325 (7.620 - 8.255) .045 - .065 (1.143 - 1.651) ( .400* (10.160) MAX .065 (1.651) TYP .008 - .015 (0.203 - 0.381) +.035 .325 -.015 +0.889 8.255 -0.381 .130 .005 (3.302 0.127) .120 (3.048) .020 MIN (0.508) MIN .018 .003 .100 (2.54) BSC ) (0.457 0.076) 8 7 6 5 1 2 3 4 NOTE: 1. DIMENSIONS INCHES ARE MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) .255 .015* (6.477 0.381) N8 1002 SW Package 16-Lead Plastic Small Outline (Wide .300 Inch) (Reference LTC DWG # 05-08-1620) .050 BSC .045 .005 .030 .005 TYP .398 - .413 (10.109 - 10.490) NOTE 4 16 N 15 14 13 12 11 10 9 N .325 .005 .420 MIN .394 - .419 (10.007 - 10.643) NOTE 3 1 2 3 N/2 N/2 NOTE: 1. DIMENSIONS IN RECOMMENDED SOLDER PAD LAYOUT 1 .005 (0.127) RAD MIN .291 - .299 (7.391 - 7.595) NOTE 4 .010 - .029 x 45 (0.254 - 0.737) .009 - .013 (0.229 - 0.330) 3 .093 - .104 (2.362 - 2.642) 4 5 6 7 8 .037 - .045 (0.940 - 1.143) 0 - 8 TYP NOTE 3 .016 - .050 (0.406 - 1.270) 8 2 Linear Technology Corporation .050 (1.270) BSC .014 - .019 (0.356 - 0.482) TYP .004 - .012 (0.102 - 0.305) INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS. 4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) S16 (WIDE) 0502 1100fc LW/TP 1202 1K REV C * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 1994