HY62KF16403E Series 256Kx16bit full CMOS SRAM Document Title 256K x 16bit 2.7 ~ 3.6V Super low Power FCMOS Slow SRAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft Dec.26.2001 Preliminary 0.1 Absolute Maximum Ratings - Vcc changed -0.3V to 4.6V -> -0.3V to 4.0V Nov.14.2002 Final Dec.26.2003 Final DC Electric Characteristics - ICC changed 4mA -> 3mA - ICC1 changed 25mA at 55ns -> 20mA at 55ns - ICC1 changed 20mA at 70ns -> 15mA at 70ns - ICC1 changed 3mA at 1us -> 2mA at 1us AC Test Conditions - Output Load changed 5pF -> 30pF Data Retention Electric Characteristics - ICCDR changed 10uA -> 6uA Marking Information - Part Name changed HY62KF6403E -> HY62KF16403E 0.2 Add 44-Pin Padpitch to TSOPII Package Information This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 0.2 / Dec. 2003 1 HY62KF16403E Series 256Kx16bit full CMOS SRAM DESCRIPTION The HY62KF16403E is a high speed, super low power and 4Mbit full CMOS SRAM organized as 256K words by 16bits. The HY62KF16403E uses high performance full CMOS process technology and is designed for high speed and low power circuit technology. It is particularly well-suited for the high density low power system application. This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 1.2V. FEATURES Fully static operation and Tri-state output TTL compatible inputs and outputs Battery backup - 1.2V(min) data retention Standard pin configuration - 44pin 400mil TSOP-II (Forward) 16M Pseudo SRAM PRODUCT FAMILY Part Number Voltage Speed Operation Current/Icc HY62KF16403E-I 2.7~3.6 (V) 55/70 (ns) 3mA Standby Current SL LL 6uA 15uA Temp.(oC) -40 ~ 85 Note 1) I : Industrial Temperature. 2) Current value is max. This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 0.2 / Dec. 2003 2 HY62KF16403E Series 256Kx16bit full CMOS SRAM PIN CONNECTION A4 A3 A2 A1 A0 CS I/O1 I/O2 I/O3 I/O4 Vss Vcc I/O5 I/O6 I/O7 I/O8 WE A17 A16 A15 A14 A13 1 12 13 22 44 TSOPII (Forward) 33 32 23 A5 A6 A7 OE UB LB I/O16 I/O15 I/O13 Vss Vcc Vcc I/O12 I/O11 I/O10 I/O9 NC A8 A9 A10 A11 A12 PAD DESCRIPTION SYMBOL DESCRIPTION CS Chip Select WE Write Enable OE Output Enable LB Lower Byte Control (IO1~IO8) UB Upper Byte Control (IO9~IO16) I/O1 ~ I/O16 Data Inputs/Outputs A0 ~ A17 Address Inputs VDD Power(2.7V~3.6V) VSS Ground NC No connection Rev 0.2 / Dec. 2003 3 HY62KF16403E Series 256Kx16bit full CMOS SRAM FUNCTIONAL BLOCK DIAGRAM 256K x 16bit Super low Power FCMOS Slow SRAM ROW DECODER A0 I/O1 SENSE AMP DATA I/O BUFFER COLUMN DECODER BLOCK DECODER 256K x 16 WRITE DRIVER PRE DECODER ADD INPUT BUFFER MEMORY ARRAY I/O8 I/O9 I/O16 A17 / CS / OE / LB / UB / WE Rev 0.2 / Dec. 2003 4 HY62KF16403E Series 256Kx16bit full CMOS SRAM ORDERING INFORMATION Part Number Speed Power Temparature Package HY62KF16403E-SD(I) 55/70 SL-Part I1) TSOP-II HY62KF16403E-DD(I) 55/70 LL-Part I1) TSOP-II Note 1) I : Industrial -40 ~ 85 oC ABSOLUTE MAXIMUM RATING1) Input/Output Voltage Power Supply Parameter Symbol VIN, VOUT VDD Rating -0.3 to VCC+0.3V -0.3 to 4.0 Unit V V Ambient Temperature TA -40 to 85 oC Storage Temperature TSTG -55 to 150 oC PD 1.0 Power Dissipation TSOLDER Ball Soldering Temperature & Time 260 . 10 W oC . Sec Note1) Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and the functional operation of the device under these or any other conditions above those indicated in the operation of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect reliability. TRUTH TABLE MODE Deselected Output Disabled Read Write CS WE OE LB UB H X X X X I/O I/O1 ~ I/O8 High-Z I/O9 ~ I/O16 High-Z L X X H H High-Z High-Z L H H X X High-Z High-Z L H DOUT High-Z H L High-Z DOUT L L H L L X L L DOUT DOUT L H DIN High-Z H L High-Z DIN L L DIN DIN POWER Standby Active Active Active Note 1). H=VIH, L=VIL, X=Don't Care(VIL or VIH) 2). UB, LB(Upper, Lower Byte enable) These active LOW inputs allow individual bytes to be written or read. When LB is LOW, data is written or read to the lower byte, I/O1 - I/O8. When UB is LOW, data is written or read to the upper byte, I/O9 - I/O16. Rev 0.2 / Dec. 2003 5 HY62KF16403E Series 256Kx16bit full CMOS SRAM DC OPERATING CONDITION (TA= -40 to 85 oC ) Parameter Power Supply Voltage Gruond Input High Voltage Input Low Voltage Symbol VDD VSS VIH VIL Min 2.7 0 2.2 -0.31) Typ 3.0 or 3.3 Max 3.6 0 VCC+0.3 0.6 - Unit V V V V Note : 1) VIL=-1.5V for Pulse Width less then 30ns. Undershoot is sampled, not 100% tested. DC CHARACTERISTICS (VDD= 2.7V ~ 3.6V, TA= -40 to 85oC) Parameter Symbol Speed Test Condition Min Tpy. Max Input Leakage Current ILI VSS VIN VCC -1 1 Output Leakage Current ILO VSS VOUT VCC CS=VIH or OE=VIH or WE=VIL -1 1 Operating Power Supply Current ICC CS=VIL, VIN=VIH or VIL, II/O=0mA - 3 Average Operating Current TTL Standby Current Standby Current (CMOS Input) CS=VIL, VIN=VIH or VIL, Cycle Time= min. 100% Duty, II/O=0mA ICC1 ISB ISB1 55ns 20 70ns 15 CS 0.2V, VIN 0.2V or VCC-0.2V VIN, Cycle Time=1us. 100% Duty, II/O=0mA - 2 CS=VIH, VIN=VIH or VIL - 300 VCC-0.2V CS, VCC-0.2V VIN or VIN VSS+0.2V 3.0 ~ 3.6 V - 0.2 6 - 0.2 15 2.7 ~ 3.3 V - 0.2 6 - 0.2 12 Unit uA mA uA Output Low Voltage VOL IOL= 2.1mA - - 0.4 V Output High Voltage VOH IOH= -1.0mA 2.4 - - V Rev 0.2 / Dec. 2003 6 HY62KF16403E Series 256Kx16bit full CMOS SRAM AC OPERATING TEST CONDITION (TA= -40 to 85 oC) Parameter Input Pulse Level Input Rising and Fall Time Input and Output Timing Reference Level tCLZ, tOLZ, tCHZ, tOHZ, tWHZ, tOW Output Load Others Value 0.4 to 2.2V 5ns 1.5V CL = 30pF + 1TTL Load CL = 30pF + 1TTL Load AC TEST LOADS V TM =2.8V 1029 O hm D OUT CL(1) 1728 O hm Note 1) Including jig and scope capacitance. CAPACITANCE (Temp.= 25 oC, f=1.0MHz) Parameter Symbol Condition Max. Unit CIN VIN = 0V 8 pF COUT VI/O = 0V 10 pF Input Capacitance (Add, CS, WE, OE) Output Capacitance (I/O) Note : These parameters are sampled and not 100% tested. Rev 0.2 / Dec. 2003 7 HY62KF16403E Series 256Kx16bit full CMOS SRAM AC CHARACTERISTICS (AC operating conditions unless otherwise specified) Parameter Symbol 55ns Min 75ns Max Min Max Unit Read Cycle Read Cycle Time tRC 55 - 75 - ns Address Access Time tAA - 55 - 75 ns Chip Select Access Time tACS - 55 - 75 ns Output Enable to Output Valid tOE - 30 - 35 ns LB, UB Access Time tBA - 55 - 75 ns Chip Select to Output in Low Z tCLZ 10 - 10 - ns Output Enable to Output in Low Z tOLZ 5 - 5 - ns LB, UB Enable to Output in Low Z tBLZ 10 - 10 - ns Chip Disable to Output in High Z tCHZ 0 20 0 25 ns Out Disable to Output in High Z tOHZ 0 20 0 25 ns LB, UB Disable to Output in High Z tBHZ 0 20 0 25 ns Output Hold from Address Change tOH 10 - 10 - ns Write Cycle Write Cycle Time tWC 55 - 75 - ns Chip Selection to End of Write tCW 50 - 60 - ns Address Valid to End of Write tAW 50 - 60 - ns LB, UB Valid to End of Write tBW 50 - 60 - ns Address Set-up Time tAS 0 - 0 - ns Write Pulse Width tWP 45 - 50 - ns Write Recovery Time tWR 0 - 0 - ns Write to Output in High Z tWHZ 0 20 0 20 ns Data to Write Time Overlap tDW 25 - 30 - ns Data Hold from Write Time tDH 0 - 0 - ns Output Active from End of Write tOW 5 - 5 - ns Rev 0.2 / Dec. 2003 8 HY62KF16403E Series 256Kx16bit full CMOS SRAM READ CYCLE 1 ( Note 1, 4 ) tRC ADD tAA tOH tACS CS tCHZ(3) tBA UB, LB tBHZ(3) tOE OE tOHZ(3) tOLZ(3) tBLZ(3) tCLZ(3) Data Out High-Z Data Valid READ CYCLE 2 ( Note 1, 2, 4 ) tRC ADD tAA tOH tOH Data Out Previous Data Data Valid READ CYCLE 3 ( Note 1, 2, 4 ) CS UB, LB tACS tCHZ (3) tCLZ (3) Data Out Rev 0.2 / Dec. 2003 Data Valid 9 HY62KF16403E Series 256Kx16bit full CMOS SRAM Notes : 1. A read occurs during the overlap of a low OE, a high WE, a low CS and UB and /or LB . 2. OE = VIL 3. tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels. 4. CS in high for the standby, low for active. UB and LB in high for the standby, low for active. Rev 0.2 / Dec. 2003 10 HY62KF16403E Series 256Kx16bit full CMOS SRAM WRITE CYCLE 1 ( Note 1, 4, 8 ) ( WE Controlled ) tWC ADD tWR(2) tCW CS tAW tBW UB, LB WE tWP tAS tDW tDH High-Z Data Valid Data In tWHZ (3,7) tOW (5) (6) Data Out WRITE CYCLE 2 ( Note 1, 4, 8 ) ( CS Controlled ) tWC ADD tAS tWR (2) tCW CS tAW tBW UB, LB tWP WE tDW Data In Data Out High-Z tDH Data Valid High-Z Rev 0.2 / Dec. 2003 11 HY62KF16403E Series 256Kx16bit full CMOS SRAM Notes : 1. A write occurs during the overlap of a low WE, a low CS and a low UB and/or LB . 2. tWR is measured from the earlier of CS, LB, UB, or WE going high to the end of write cycle. 3. During this period, I/O pins are in the output state so that the input signals of opposite phase to the output must not be applied. 4. If the CS, LB and UB low transition occur simultaneously with the WE low transition or after the WE transition, outputs remain in a high impedance state. 5. Q(data out) is the invalid data. 6. Q(data out) is the read data of the next address. 7. CS in high for the standby, low for active UB and LB in high for the standby, low for active. DATA RETENTION ELECTRIC CHARACTERISTIC (TA= -40 to 85 oC) Symbol Parameter VDR Vcc for Data Retention Iccdr VCC=1.5V VCC-0.2V CS or Data Retention Current VCC-0.2V VIN or VIN VSS+0.2V tCDR Chip Deselect to Data Retention Time tR Operating Recovery Time Min Typ.1) Max Unit 1.2 - 3.6 V SL - 0.1 3.0 LL - 0.1 6.0 0 - - Test Condition VCC-0.2V CS, VCC-0.2V VIN or VIN VSS+0.2V See Data Retention Timing Diagram uA ns tRC - - Notes : 1. Typical values are under the condition of TA = 25oC. 2. Typical value are sampled and not 100% tested. DATA RETENTION TIMING DIAGRAM DATA RETENTION MODE VCC 2.7V tCDR tR VIH VDR CS > VCC-0.2V CS VSS Rev 0.2 / Dec. 2003 12 HY62KF16403E Series 256Kx16bit full CMOS SRAM PACKAGE INFORMATION 44pin 400mil Thin Small Outline Package Forward (D) 0.0235 (0.597) 0.0160 (0.406) 0.4040 (10.262) 0.3960 (10.058) 0.4700 (11.938) 0.4620 (11.735) 0.0083 (0.210) 0.0047 (0.120) UNIT : Inch (mm) Max Min 0.047 (1.194) 0.039 (0.991) 0.0320 (0.805) (BSC) Rev 0.2 / Dec. 2003 0.016 (0.4) 0.012 (0.3) 0.0315 (0.80) (BSC) 5deg 0deg 0.729(18.517) 0.0059 (0.150) 0.002 (0.050) 13