55 V, EMI Enhanced, Zero Drift, Ultralow Noise, Rail-to-Rail Output Operational Amplifiers ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet OUT A 1 8 V+ -IN A 2 ADA4522-2 7 OUT B +IN A 3 TOP VIEW (Not to Scale) 6 -IN B 5 +IN B V- 4 Figure 1. 8-Lead MSOP (RM Suffix) and 8-Lead SOIC (R Suffix) Pin Configuration For the ADA4522-1 and ADA4522-4 pin connections and for more information about the pin connections for these products, see the Pin Configurations and Function Descriptions section. 100 APPLICATIONS Inductance, capacitance, and resistance (LCR) meter/ megohmmeter front-end amplifiers Load cell and bridge transducers Magnetic force balance scales High precision shunt current sensing Thermocouple/resistance temperature detector (RTD) sensors Programmable logic controller (PLC) input and output amplifiers 5V 30V 55V AV = 100 10 1 0.1 10 100 1k 10k 100k 1M FREQUENCY (Hz) 13168-165 VOLTAGE NOISE DENSITY (nV/Hz) Low offset voltage: 5 V maximum Extremely low offset voltage drift: 22 nV/C maximum Low voltage noise density: 5.8 nV/Hz typical 117 nV p-p typical from 0.1 Hz to 10 Hz Low input bias current: 50 pA typical Unity-gain crossover: 3 MHz typical Single-supply operation: input voltage range includes ground and rail-to-rail output Wide range of operating voltages Single-supply operation: 4.5 V to 55 V Dual-supply operation: 2.25 V to 27.5 V Integrated EMI filters Unity-gain stable 13168-001 PIN CONNECTION DIAGRAM FEATURES Figure 2. Voltage Noise Density vs. Frequency, VSY = 15 V GENERAL DESCRIPTION The ADA4522-1/ADA4522-2/ADA4522-4 are single/dual/quad channel, zero drift op amps with low noise and power, ground sensing inputs, and rail-to-rail output, optimized for total accuracy over time, temperature, and voltage conditions. The wide operating voltage and temperature ranges, as well as the high open-loop gain and very low dc and ac errors make the devices well suited for amplifying very small input signals and for accurately reproducing larger signals in a wide variety of applications. The ADA4522-1/ADA4522-2/ADA4522-4 performance is specified at 5.0 V, 30 V, and 55 V power supply voltages. These devices operate over the range of 4.5 V to 55 V, and are excellent for applications using single-ended supplies of 5 V, 10 V, 12 V, and 30 V, or for applications using higher single supplies and dual supplies of 2.5 V, 5 V, and 15 V. The ADA4522-1/ ADA4522-2/ADA4522-4 use on-chip filtering to achieve high immunity to electromagnetic interference (EMI). Table 1. Zero Drift Op Amps (<0.1 V/C) Supply Voltage Single Dual Quad 5V ADA4528-1 AD8628 AD8538 ADA4051-1 ADA4528-2 AD8629 AD8539 ADA4051-2 AD8630 16 V AD8638 AD8639 30 V ADA4638-1 55 V ADA4522-1 ADA4522-2 ADA4522-4 The ADA4522-1/ADA4522-2/ADA4522-4 are fully specified over the extended industrial temperature range of -40C to +125C and are available in 8-lead MSOP, 8-lead SOIC, 14-lead SOIC, and 14-lead TSSOP packages. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2015-2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet TABLE OF CONTENTS Features .......................................................................................... 1 Input Protection ......................................................................... 22 Applications ....................................................................................... 1 Single-Supply and Rail-to-Rail Output ................................... 23 General Description ......................................................................... 1 Large Signal Transient Response .............................................. 23 Pin Connection Diagram ................................................................ 1 Noise Considerations ................................................................. 24 Revision History ............................................................................... 2 EMI Rejection Ratio .................................................................. 25 Specifications..................................................................................... 3 Capacitive Load Stability ........................................................... 25 Electrical Characteristics--5.0 V Operation ............................ 3 Applications Information .............................................................. 27 Electrical Characteristics--30 V Operation ............................. 4 Single-Supply Instrumentation Amplifier .............................. 27 Electrical Characteristics--55 V Operation ............................. 5 Absolute Maximum Ratings............................................................ 7 Load Cell/Strain Gage Sensor Signal Conditioning Using the ADA4522-2 .................................................................................. 27 Thermal Resistance ...................................................................... 7 Precision Low-Side Current Shunt Sensor.............................. 28 Power Sequencing ........................................................................ 7 Printed Circuit Board Layout ................................................... 28 ESD Caution .................................................................................. 7 Comparator Operation .............................................................. 29 Pin Configurations and Function Descriptions ........................... 8 Use of Large Source Resistance ................................................ 30 Typical Performance Characteristics ........................................... 10 Outline Dimensions ....................................................................... 31 Theory of Operation ...................................................................... 21 Ordering Guide .......................................................................... 32 On-Chip Input EMI Filter and Clamp Circuit ....................... 22 Thermal Shutdown..................................................................... 22 REVISION HISTORY 9/2017--Rev. E to Rev. F Added Power Sequencing Section .................................................. 7 Added Use of Large Source Resistance Section .......................... 30 Added Figure 89 and Table 11; Renumbered Sequentially ....... 30 10/2016--Rev. D to Rev. E Changes to Figure 73 ...................................................................... 23 4/2016--Rev. C to Rev. D Changed ADA4522-4 Pin 4 to V+ .............................. Throughout Changed ADA4522-4 Pin 11 to V- ............................ Throughout Changes to Figure 5 and Table 9 ..................................................... 9 2/2016--Rev. B to Rev. C Added ADA4522-1 ............................................................. Universal Changes to Common-Mode Rejection Ratio Parameter and Supply Current per Amplifier Parameter, Table 2 ........................ 3 Changes to Offset Voltage Drift Parameter, and Supply Current per Amplifier Parameter, Table 3.................................................... 4 Changes to Offset Voltage Drift Parameter, Input Offset Current Parameter, and Supply Current per Amplifier Parameter, Table 4 ................................................................................................ 5 Added Figure 3 and Table 7; Renumbered Sequentially ............. 8 Moved Theory of Operation Section ........................................... 21 Changes to Figure 71 ...................................................................... 21 Changes to Figure 72 ...................................................................... 22 Changes to Ordering Guide .......................................................... 32 1/2016--Rev. A to Rev. B Updated Outline Dimensions ....................................................... 29 10/2015--Rev. 0 to Rev. A Added ADA4522-4 ............................................................. Universal Changes to General Description Section .......................................1 Change to Common-Mode Rejection Ratio Parameter, Table 2 ...3 Change to Offset Voltage Drift Parameter, Table 3 .......................4 Change to Offset Voltage Drift Parameter and Input Offset Current Parameter, Table 4 ..............................................................5 Changes to Table 6.............................................................................7 Added Figure 4 and Table 8; Renumbered Sequentially ..............8 Changes to Figure 34...................................................................... 13 Changes to Figure 67...................................................................... 19 Changes to Applications Information Section ........................... 20 Changes to Thermal Shutdown Section ...................................... 21 Changes to Single-Supply Instrumentation Amplifier Section....... 25 Changes to Precision Low-Side Current Shunt Sensor Section ...... 27 Changes to Printed Circuit Board Layout Section ............................ 28 Added Figure 89 and Figure 90; Outline Dimensions ............... 30 Changes to Ordering Guide .......................................................... 30 5/2015--Revision 0: Initial Version Rev. F | Page 2 of 33 Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 SPECIFICATIONS ELECTRICAL CHARACTERISTICS--5.0 V OPERATION VSY = 5.0 V, VCM = VSY/2 V, TA = 25C, unless otherwise specified. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Symbol Test Conditions/Comments VOS VCM = VSY/2 -40C TA +125C Min TCVOS IB Typ Max Unit 0.7 5 6.5 15 150 500 2 250 350 500 3.5 V V nV/C pA pA nA pA pA pA V dB dB dB dB dB 2.5 50 -40C TA +85C -40C TA +125C Input Offset Current IOS 80 -40C TA +85C -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio IVR CMRR Large Signal Voltage Gain AV Input Resistance Differential Mode Common Mode Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Low ADA4522-1, ADA4522-2, VCM = 0 V to 3.5 V ADA4522-4, VCM = 0 V to 3.5 V -40C TA +125C RL = 10 k, VOUT = 0.5 V to 4.5 V -40C TA +125C 0 135 130 130 125 125 30 100 k G CINDM CINCM 7 35 pF pF 4.98 V V mV mV mA mA mA mA mA VOH VOL IOUT ISC+ Short-Circuit Current Sink ISC- RL = 10 k to VSY/2 -40C TA +125C RL = 10 k to VSY/2 -40C TA +125C Dropout voltage = 1 V 4.97 4.95 20 DYNAMIC PERFORMANCE Slew Rate ZOUT PSRR ISY SR+ SR- TA = 125C f = 1 MHz, AV = 1 VSY = 4.5 V to 55 V -40C TA +125C ADA4522-2, ADA4522-4, IOUT = 0 mA ADA4522-2, ADA4522-4, -40C TA +125C ADA4522-1, IOUT = 0 mA ADA4522-1, -40C TA +125C RL = 10 k, CL = 50 pF, AV = 1 RL = 10 k, CL = 50 pF, AV = 1 Rev. F | Page 3 of 33 30 50 14 22 15 29 19 4 TA = 125C Supply Current per Amplifier 145 RINDM RINCM Continuous Output Current Short-Circuit Current Source Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio 155 145 150 145 160 830 840 1.4 1.3 900 950 910 970 dB dB A A A A V/s V/s ADA4522-1/ADA4522-2/ADA4522-4 Parameter Gain Bandwidth Product Unity-Gain Crossover -3 dB Closed-Loop Bandwidth Phase Margin Settling Time to 0.1% Channel Separation EMI Rejection Ratio of +IN/+IN x NOISE PERFORMANCE Total Harmonic Distortion Plus Noise Bandwidth (BW) = 80 kHz BW = 500 kHz Peak-to-Peak Voltage Noise Voltage Noise Density Peak-to-Peak Current Noise Current Noise Density Data Sheet Symbol GBP UGC f-3 dB M tS CS EMIRR Test Conditions/Comments VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 100 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 1 VIN = 1 V step, RL = 10 k, CL = 50 pF, AV = 1 VIN = 1 V p-p, f = 10 kHz, RL = 10 k, CL = 50 pF VIN = 100 mV peak, f = 400 MHz VIN = 100 mV peak, f = 900 MHz VIN = 100 mV peak, f = 1800 MHz VIN = 100 m peak, f = 2400 MHz THD + N AV = 1, f = 1 kHz, VIN = 0.6 V rms eN p-p eN iN p-p iN Min Typ 2.7 3 6.5 64 4 98 72 80 83 85 Max 0.001 0.02 117 5.8 16 0.8 AV = 100, f = 0.1 Hz to 10 Hz AV = 100, f = 1 kHz AV = 100, f = 0.1 Hz to 10 Hz AV = 100, f = 1 kHz Unit MHz MHz MHz Degrees s dB dB dB dB dB % % nV p-p nV/Hz pA p-p pA/Hz ELECTRICAL CHARACTERISTICS--30 V OPERATION VSY = 30 V, VCM = VSY/2 V, TA = 25C, unless otherwise specified. Table 3. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Test Conditions/Comments VOS VCM = VSY/2 -40C TA +125C ADA4522-1, ADA4522-2 ADA4522-4 Offset Voltage Drift TCVOS Input Bias Current IB Min Typ Max Unit 1 5 7.2 22 25 150 500 3 300 400 500 28.5 V V nV/C nV/C pA pA nA pA pA pA V dB dB dB dB 4 5.3 50 -40C TA +85C -40C TA +125C Input Offset Current IOS 80 -40C TA +85C -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio IVR CMRR Large Signal Voltage Gain AV Input Resistance Differential Mode Common Mode Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Low Continuous Output Current VCM = 0 V to 28.5 V -40C TA +125C RL = 10 k, VOUT = 0.5 V to 29.5 V -40C TA +125C 0 145 140 140 135 160 150 RINDM RINCM 30 400 k G CINDM CINCM 7 35 pF pF 29.89 V V mV mV mA VOH VOL IOUT RL = 10 k to VSY/2 -40C TA +125C RL = 10 k to VSY/2 -40C TA +125C Dropout voltage = 1 V Rev. F | Page 4 of 33 29.87 29.80 110 14 130 200 Data Sheet Parameter Short-Circuit Current Source ADA4522-1/ADA4522-2/ADA4522-4 Symbol ISC+ Test Conditions/Comments Min Typ 21 15 33 22 4 150 145 160 TA = 125C Short-Circuit Current Sink Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Unity-Gain Crossover -3 dB Closed-Loop Bandwidth Phase Margin Settling Time to 0.1% Settling Time to 0.01% Channel Separation EMI Rejection Ratio of +IN/+IN x NOISE PERFORMANCE Total Harmonic Distortion Plus Noise BW = 80 kHz BW = 500 kHz Peak-to-Peak Voltage Noise Voltage Noise Density Peak-to-Peak Current Noise Current Noise Density ISC- ZOUT PSRR ISY TA = 125C f = 1 MHz, AV = 1 VSY = 4.5 V to 55 V -40C TA +125C ADA4522-2, ADA4522-4, IOUT = 0 mA ADA4522-2, ADA4522-4, -40C TA +125C ADA4522-1, IOUT = 0 mA ADA4522-1, -40C TA +125C SR+ SR- GBP UGC f-3 dB M tS tS CS EMIRR RL = 10 k, CL = 50 pF, AV = 1 RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 100 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 V step, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 V step, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 V p-p, f = 10 kHz, RL = 10 k, CL = 50 pF VIN = 100 mV peak, f = 400 MHz VIN = 100 mV peak, f = 900 MHz VIN = 100 mV peak, f = 1800 MHz VIN = 100 mV peak, f = 2400 MHz THD + N AV = 1, f = 1 kHz, VIN = 6 V rms eN p-p eN iN p-p iN 830 840 AV = 100, f = 0.1 Hz to 10 Hz AV = 100, f = 1 kHz AV = 100, f = 0.1 Hz to 10 Hz AV = 100, f = 1 kHz Max 900 950 910 970 Unit mA mA mA mA dB dB A A A A 1.8 0.9 2.7 3 6.5 64 12 14 98 72 80 83 85 V/s V/s MHz MHz MHz Degrees s s dB dB dB dB dB 0.0005 0.004 117 5.8 16 0.8 % % nV p-p nV/Hz pA p-p pA/Hz ELECTRICAL CHARACTERISTICS--55 V OPERATION VSY = 55 V, VCM = VSY/2 V, TA = 25C, unless otherwise specified. Table 4. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Test Conditions/Comments VOS VCM = VSY/2 -40C TA +125C ADA4522-1, ADA4522-2 ADA4522-4 Offset Voltage Drift TCVOS Input Bias Current IB Min Typ Max Unit 1.5 7 10 30 40 150 500 4.5 300 400 500 550 V V nV/C nV/C pA pA nA pA pA pA pA 6 9 50 -40C TA +85C -40C TA +125C Input Offset Current IOS 80 -40C TA +85C ADA4522-1, ADA4522-2, -40C TA +125C ADA4522-4, -40C TA +125C Rev. F | Page 5 of 33 ADA4522-1/ADA4522-2/ADA4522-4 Parameter Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Input Resistance Differential Mode Common Mode Input Capacitance Differential Mode Common Mode OUTPUT CHARACTERISTICS Output Voltage High Low Symbol IVR CMRR AV Data Sheet Test Conditions/Comments VCM = 0 V to 53.5 V -40C TA +125C RL = 10 k, VOUT = 0.5 V to 54.5 V -40C TA +125C Min 0 140 135 135 125 CINDM CINCM 7 35 pF pF 54.8 V V mV mV mA mA mA mA mA VOH VOL ISC- RL = 10 k to VSY/2 -40C TA +125C RL = 10 k to VSY/2 -40C TA +125C Dropout voltage = 1 V 54.75 54.65 200 NOISE PERFORMANCE Total Harmonic Distortion Plus Noise BW = 80 kHz BW = 500 kHz Peak-to-Peak Voltage Noise Voltage Noise Density Peak-to-Peak Current Noise Current Noise Density ZOUT PSRR ISY TA = 125C f = 1 MHz, AV = 1 VSY = 4.5 V to 55 V -40C TA +125C ADA4522-2, ADA4522-4, IOUT = 0 mA ADA4522-2, ADA4522-4, -40C TA +125C ADA4522-1, IOUT = 0 mA ADA4522-1, -40C TA +125C SR+ SR- GBP UGC f-3 dB M tS tS CS EMIRR RL = 10 k, CL = 50 pF, AV = 1 RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 100 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 mV p-p, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 V step, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 V step, RL = 10 k, CL = 50 pF, AV = 1 VIN = 10 V p-p, f = 10 kHz, RL = 10 k, CL = 50 pF VIN = 100 mV peak, f = 400 MHz VIN = 100 mV peak, f = 900 MHz VIN = 100 mV peak, f = 1800 MHz VIN = 100 mV peak, f = 2400 MHz THD + N AV = 1, f = 1 kHz, VIN = 10 V rms eN p-p eN iN p-p iN AV = 100, f = 0.1 Hz to 10 Hz AV = 100, f = 1 kHz AV = 100, f = 0.1 Hz to 10 Hz AV = 100, f = 1 kHz Rev. F | Page 6 of 33 250 350 14 21 15 32 22 4 TA = 125C Gain Bandwidth Product Unity-Gain Crossover -3 dB Closed-Loop Bandwidth Phase Margin Settling Time to 0.1% Settling Time to 0.01% Channel Separation EMI Rejection Ratio of +IN/+IN x 137 k G Short-Circuit Current Sink DYNAMIC PERFORMANCE Slew Rate 144 Unit V dB dB dB dB 30 1000 IOUT ISC+ Supply Current per Amplifier Max 53.5 RINDM RINCM Continuous Output Current Short-Circuit Current Source Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Typ 150 145 160 830 840 900 950 910 970 dB dB A A A A 1.7 0.8 2.7 3 6.5 64 12 14 98 72 80 83 85 V/s V/s MHz MHz MHz Degrees s s dB dB dB dB dB 0.0007 0.003 117 5.8 16 0.8 % % nV p-p nV/Hz pA p-p pA/Hz Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 5. Parameter Supply Voltage Input Voltage Input Current1 Differential Input Voltage Output Short-Circuit Duration to Ground Temperature Range Storage Operating Junction Lead Temperature (Soldering, 60 sec) 1 Rating 60 V (V-) - 300 mV to (V+) + 300 mV 10 mA 5 V Indefinite -65C to +150C -40C to +125C -65C to +150C 300C JA is specified for the worst case conditions, that is, a device soldered in a circuit board for surface-mount packages using a standard 4-layer JEDEC board. Table 6. Thermal Resistance Package Type RM-8 R-8 RU-14 R-14 JA 194 122 112 115 JC 38 41 43 36 Unit C/W C/W C/W C/W POWER SEQUENCING The input pins have clamp diodes to the power supply pins. Limit the input current to 10 mA or less whenever input signals exceed the power supply rail by 300 mV. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Apply the op amp supplies simultaneously; if this is not possible, apply the positive power supply first, before the negative power supply. ESD CAUTION Rev. F | Page 7 of 33 ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet NIC 1 8 NIC -IN 2 ADA4522-1 7 V+ +IN 3 TOP VIEW (Not to Scale) 6 OUT 5 NIC V- 4 NOTES 1. NIC = NOT INTERNALLY CONNECTED. 13168-101 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 3. ADA4522-1 Pin Configuration Table 7. ADA4522-1 Pin Function Descriptions Mnemonic NIC -IN +IN V- OUT V+ Description Not Internally Connected Inverting Input Noninverting Input Negative Supply Voltage Output Positive Supply Voltage OUT A 1 8 V+ -IN A 2 ADA4522-2 7 OUT B +IN A 3 TOP VIEW (Not to Scale) 6 -IN B 5 +IN B V- 4 13168-002 Pin No. 1, 5, 8 2 3 4 6 7 Figure 4. ADA4522-2 Pin Configuration Table 8. ADA4522-2 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic OUT A -IN A +IN A V- +IN B -IN B OUT B V+ Description Output, Channel A Inverting Input, Channel A Noninverting Input, Channel A Negative Supply Voltage Noninverting Input, Channel B Inverting Input, Channel B Output, Channel B Positive Supply Voltage Rev. F | Page 8 of 33 ADA4522-1/ADA4522-2/ADA4522-4 OUT A 1 14 OUT D 2 13 -IN D +IN A 3 ADA4522-4 12 +IN D TOP VIEW (Not to Scale) 11 V- 10 +IN C -IN A V+ 4 +IN B 5 -IN B 6 9 -IN C OUT B 7 8 OUT C 13168-189 Data Sheet Figure 5. ADA4522-4 Pin Configuration Table 9. ADA4522-4 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Mnemonic OUT A -IN A +IN A V+ +IN B -IN B OUT B OUT C -IN C +IN C V- +IN D -IN D OUT D Description Output, Channel A Inverting Input, Channel A Noninverting Input, Channel A Positive Supply Voltage Noninverting Input, Channel B Inverting Input, Channel B Output, Channel B Output, Channel C Inverting Input, Channel C Noninverting Input, Channel C Negative Supply Voltage Noninverting Input, Channel D Inverting Input, Channel D Output, Channel D Rev. F | Page 9 of 33 ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, unless otherwise noted. 60 50 40 30 20 -3 -2 -1 0 1 2 3 4 5 VOS (V) NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 30 30 20 0 5 10 15 20 25 30 VSY = 15V -40C TA +125C 160 CHANNELS MEAN = -2.48nV/C STD DEV. = 2.65nV/C 25 20 15 10 5 10 -4 -3 -2 -1 0 1 2 3 4 5 VOS (V) 0 -30 -25 -20 -15 -10 13168-004 0 -5 -5 0 5 10 15 20 25 30 TCVOS (nV/C) Figure 7. Input Offset Voltage Distribution, VSY = 15 V Figure 10. Input Offset Voltage Drift Distribution, VSY = 15 V 35 VSY = 27.5V VCM = VSY/2 600 CHANNELS MEAN = 0.69V STD DEV. = 0.81V NUMBER OF AMPLIFIERS 30 50 40 30 20 10 VSY = 27.5V -40C TA +125C 160 CHANNELS MEAN = -4.54nV/C STD DEV. = 4.01nV/C 25 20 15 10 5 0 -5 -4 -3 -2 -1 0 1 2 3 4 VOS (V) 5 13168-005 NUMBER OF AMPLIFIERS -5 TCVOS (nV/C) 35 VSY = 15V VCM = VSY/2 600 CHANNELS MEAN = 0.31V STD DEV. = 0.62V 40 60 10 Figure 9. Input Offset Voltage Drift Distribution, VSY = 2.5 V 50 70 15 0 -30 -25 -20 -15 -10 Figure 6. Input Offset Voltage Distribution, VSY = 2.5 V 60 20 13168-006 -4 13168-003 0 -5 70 25 5 10 80 VSY = 2.5V -40C TA +125C 160 CHANNELS MEAN = -1.19nV/C STD DEV. = 1.82nV/C 13168-007 70 30 Figure 8. Input Offset Voltage Distribution, VSY = 27.5 V 0 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 TCVOS (nV/C) Figure 11. Input Offset Voltage Drift Distribution, VSY = 27.5 V Rev. F | Page 10 of 33 13168-008 NUMBER OF AMPLIFIERS 80 35 VSY = 2.5V VCM = VSY/2 600 CHANNELS MEAN = 0.10V STD DEV. = 0.59V NUMBER OF AMPLIFIERS 90 2000 VSY = 5V 20 CHANNELS 1500 1 1000 VSY = 5V +125C +85C +25C -40C IB (pA) 3 -1 500 -3 0 -5 0 1.0 2.0 3.0 3.5 VCM (V) Figure 12. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = 5 V 5 -500 13168-009 VOS (V) 5 ADA4522-1/ADA4522-2/ADA4522-4 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VCM (V) 13168-012 Data Sheet Figure 15. Input Bias Current (IB) vs. Common-Mode Voltage (VCM), VSY = 5 V 3000 VSY = 30V 20 CHANNELS VSY = 30V 2500 3 1 IB (pA) VOS (V) 2000 -1 +125C +85C +25C -40C 1500 1000 500 -3 0 5.0 10.0 15.0 20.0 25.0 28.5 VCM (V) -500 13168-010 -5 5.0 10.0 15.0 20.0 25.0 28.5 VCM (V) Figure 16. Input Bias Current (IB) vs. Common-Mode Voltage (VCM), VSY = 30 V Figure 13. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = 30 V 5 0 13168-013 0 VSY = 55V 20 CHANNELS 5000 VSY = 55V 4500 3 4000 +125C +85C +25C -40C 3000 IB (pA) VOS (V) 3500 1 -1 2500 2000 1500 1000 -3 500 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 53.5 VCM (V) Figure 14. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = 55 V Rev. F | Page 11 of 33 -500 0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 53.5 VCM (V) Figure 17. Input Bias Current (IB) vs. Common-Mode Voltage (VCM), VSY = 55 V 13168-014 0 0 13168-011 -5 ADA4522-1/ADA4522-2/ADA4522-4 2000 IB (pA) 2500 800 IB (pA) 1000 600 1500 400 1000 200 500 0 0 -200 -500 -25 0 25 50 75 100 125 TEMPERATURE (C) -1000 -50 13168-015 -400 -50 IB+ IB- IOS ISY PER AMPLIFIER (mA) IB (pA) 50 75 100 500 0.6 0.4 0.2 0 -25 0 25 50 75 100 125 TEMPERATURE (C) 0 13168-017 -500 -50 100k 5 10 15 20 25 30 35 40 45 50 55 60 +125C +85C +25C -40C VSY = 2.5V TO 27.5V 10k OUTPUT VOLTAGE LOW (VOL) TO SUPPLY RAIL (mV) 10k 0 Figure 22. Supply Current (ISY) per Amplifier vs. Supply Voltage (VSY) +125C +85C +25C -40C VSY = 2.5V TO 27.5V +125C +85C +25C -40C VSY (V) Figure 19. Input Bias Current (IB) vs. Temperature, VSY = 15 V 1k 100 10 1 1k 100 10 1 0.01 0.1 ILOAD (mA) 1 10 100 13168-024 0.1 0.001 125 0.8 1000 OUTPUT VOLTAGE HIGH (VOH) TO SUPPLY RAIL (mV) 25 1.0 1500 100k 0 Figure 21. Input Bias Current (IB) vs. Temperature, VSY = 27.5 V VSY = 15V VCM = VSY/2 2000 -25 TEMPERATURE (C) Figure 18. Input Bias Current (IB) vs. Temperature, VSY = 2.5 V 2500 IB+ IB- IOS 3000 13168-016 IB+ IB- IOS 1200 VSY = 27.5V VCM = VSY/2 3500 13168-025 1400 4000 VSY = 2.5V VCM = VSY/2 Figure 20. Output Voltage High (VOH) to Supply Rail vs. Load Current (ILOAD) 0.1 0.001 0.01 0.1 1 ILOAD (mA) 10 100 13168-027 1600 Data Sheet Figure 23. Output Voltage Low (VOL) to Supply Rail vs. Load Current (ILOAD) Rev. F | Page 12 of 33 150 VSY = 2.5V OUTPUT VOLTAGE LOW (VOL) TO SUPPLY RAIL (mV) 125 RL = 2k 100 75 50 RL = 10k 25 0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C) 50 200 RL = 10k -25 0 25 50 75 100 125 150 VSY = 15V 150 RL = 10k 125 100 75 50 -25 0 25 50 75 100 125 150 TEMPERATURE (C) Figure 25. Output Voltage High (VOH) to Supply Rail vs. Temperature, VSY = 15 V 100 75 50 RL = 100k 0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C) Figure 28. Output Voltage Low (VOL) to Supply Rail vs. Temperature, VSY = 15 V 350 VSY = 27.5V 300 VSY = 27.5V RL = 10k 200 150 100 50 RL = 100k 0 25 50 200 150 100 50 75 100 125 13168-020 -25 RL = 10k 250 150 TEMPERATURE (C) Figure 26. Output Voltage High (VOH) to Supply Rail vs. Temperature, VSY = 27.5 V Rev. F | Page 13 of 33 0 -50 RL = 100k -25 0 25 50 75 100 125 150 TEMPERATURE (C) Figure 29. Output Voltage Low (VOL) to Supply Rail vs. Temperature, VSY = 27.5 V 13168-023 OUTPUT VOLTAGE LOW (VOL) TO SUPPLY RAIL (mV) 300 250 0 -50 RL = 10k 125 25 RL = 100k 0 -50 150 13168-022 OUTPUT VOLTAGE LOW (VOL) TO SUPPLY RAIL (mV) 175 13168-019 OUTPUT VOLTAGE HIGH (VOH) TO SUPPLY RAIL (mV) 75 Figure 27. Output Voltage Low (VOL) to Supply Rail vs. Temperature, VSY = 2.5 V VSY = 15V 25 OUTPUT VOLTAGE HIGH (VOH) TO SUPPLY RAIL (mV) RL = 2k 100 TEMPERATURE (C) 175 350 125 0 -50 Figure 24. Output Voltage High (VOH) to Supply Rail vs. Temperature, VSY = 2.5 V 200 VSY = 2.5V 25 13168-018 OUTPUT VOLTAGE HIGH (VOH) TO SUPPLY RAIL (mV) 150 ADA4522-1/ADA4522-2/ADA4522-4 13168-021 Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 140 Data Sheet 140 VSY = 2.5V TO 27.5V 100 100 80 80 PSRR (dB) 120 CMRR (dB) 120 60 PSRR+ PSRR- VSY = 2.5V TO 27.5V 60 40 40 20 20 1k 10k 100k 1M 10M FREQUENCY (Hz) -20 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 30. CMRR vs. Frequency 1k AV = 100 AV = 10 AV = 1 Figure 33. PSRR vs. Frequency 0.840 VSY = 2.5V TO 27.5V 10 1 0.1 0.01 0.830 0.825 0.820 0.815 10k 100k 1M 10M 100M FREQUENCY (Hz) 0.805 -50 13168-031 1k 90 60 40 45 GAIN 20 0 50 75 100 125 150 VSY = 2.5V TO 27.5V 50 0 40 AV = 100 30 AV = 10 20 10 AV = 1 0 -40 100 1k 10k 100k 1M 10M -45 FREQUENCY (Hz) -20 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 35. Closed-Loop Gain vs. Frequency Figure 32. Open-Loop Gain and Phase Margin vs. Frequency Rev. F | Page 14 of 33 10M 13168-133 -10 VSY = 2.5V TO 27.5V RL = 10k 13168-026 OPEN-LOOP GAIN (dB) PHASE 80 60 135 CLOSED-LOOP GAIN (dB) 100 25 Figure 34. Supply Current (ISY) per Amplifier vs. Temperature PHASE MARGIN (Degrees) CL = 50pF CL = 100pF CL = 50pF CL = 100pF 0 TEMPERATURE (C) Figure 31. Closed-Loop Output Impedance vs. Frequency 120 -25 13168-028 0.810 0.001 100 -20 5V 30V 55V 0.835 ISY PER AMPLIFIER (mA) OUTPUT IMPEDANCE () 100 13168-032 100 13168-030 0 0 10 ADA4522-1/ADA4522-2/ADA4522-4 1.5 1.0 0.04 VOLTAGE (V) 0.5 0 -0.5 0 -0.02 -0.04 -1.5 -0.06 TIME (4s/DIV) -0.08 TIME (400ns/DIV) Figure 36. Large Signal Transient Response, VSY = 2.5 V 20 Figure 39. Small Signal Transient Response, VSY = 2.5 V 0.08 VSY = 15V VIN = 15V p-p AV = 1 RL = 10k CL = 100pF RS_IN+ = 100 RS_IN- = 100 15 10 0.04 VOLTAGE (V) 5 0 -5 0.02 0 -0.02 -10 -0.04 -15 -0.06 -20 TIME (10s/DIV) -0.08 TIME (400ns/DIV) Figure 37. Large Signal Transient Response, VSY = 15 V 30 0.08 VSY = 27.5V VIN = 100mV p-p AV = 1 RL = 10k CL = 100pF 0.06 0.04 VOLTAGE (V) 10 0 -10 0.02 0 -0.02 -0.04 -20 TIME (10s/DIV) Figure 38. Large Signal Transient Response, VSY = 27.5 V -0.08 TIME (400ns/DIV) Figure 41. Small Signal Transient Response, VSY = 27.5 V Rev. F | Page 15 of 33 13168-039 -0.06 -30 13168-036 VOLTAGE (V) Figure 40. Small Signal Transient Response, VSY = 15 V VSY = 27.5V VIN = 50V p-p AV = 1 RL = 10k CL = 100pF RS_IN+ = 100 RS_IN- = 100 20 VSY = 15V VIN = 100mV p-p AV = 1 RL = 10k CL = 100pF 0.06 13168-035 VOLTAGE (V) 0.02 -1.0 -2.0 VSY = 2.5V VIN = 100mV p-p AV = 1 RL = 10k CL = 100pF 0.06 13168-034 VOLTAGE (V) 0.08 VSY = 2.5V VIN = 1.5V p-p AV = 1 RL = 10k CL = 100pF RS_IN+ = 100 RS_IN- = 100 13168-038 2.0 13168-037 Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 45 40 0 VSY = 2.5V RL = 10k AV = 1 VIN = 100mV p-p -20 CHANNEL SEPARATION (dB) 50 Data Sheet OVERSHOOT (%) 35 OS+ 30 25 OS- 20 15 10 VIN = 0.5V p-p VIN = 1V p-p VIN = 2V p-p VSY = 2.5V AV = -10 RL = 10k -40 -60 -80 -100 -120 100 1000 LOAD CAPACITANCE (pF) -140 0.01 13168-040 0 VSY = 15V 45 RL = 10k AV = 1 40 VIN = 100mV p-p CHANNEL SEPARATION (dB) -20 20 OS- 15 10 1000 13168-041 100 LOAD CAPACITANCE (pF) -60 -80 -100 0 CHANNEL SEPARATION (dB) -20 30 OS+ 25 20 OS- 15 10 1 10 100 Figure 46. Channel Separation vs. Frequency, VSY = 15 V VSY = 27.5V 45 RL = 10k AV = 1 40 VIN = 100mV p-p 35 0.1 FREQUENCY (kHz) 50 OVERSHOOT (%) -40 -140 0.01 Figure 43. Small Signal Overshoot vs. Load Capacitance, VSY = 15 V VIN = 10V p-p VIN = 30V p-p VIN = 50V p-p VSY = 27.5V AV = -10 RL = 10k -40 -60 -80 -100 -120 100 LOAD CAPACITANCE (pF) 1000 13168-042 5 0 10 VIN = 5V p-p VIN = 10V p-p VIN = 25V p-p VSY = 15V AV = -10 RL = 10k -120 5 0 10 100 13168-044 OVERSHOOT (%) OS+ 25 10 Figure 45. Channel Separation vs. Frequency, VSY = 2.5 V 50 30 1 FREQUENCY (kHz) Figure 42. Small Signal Overshoot vs. Load Capacitance, VSY = 2.5 V 35 0.1 Figure 44. Small Signal Overshoot vs. Load Capacitance, VSY = 27.5 V Rev. F | Page 16 of 33 -140 0.01 0.1 1 10 100 FREQUENCY (kHz) Figure 47. Channel Separation vs. Frequency, VSY = 27.5 V 13168-045 0 10 13168-043 5 Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 100 1 80kHz LOW-PASS FILTER 500kHz LOW-PASS FILTER 80kHz LOW-PASS FILTER 500kHz LOW-PASS FILTER 10 0.1 THD + N (%) THD + N (%) 1 0.1 0.01 0.01 0.001 0.0001 0.001 0.01 0.1 1 AMPLITUDE (V rms) 0.0001 10 100 1k 10k 100k FREQUENCY (Hz) Figure 48. THD + N vs. Amplitude, VSY = 2.5 V 100 VSY = 2.5V AV = 1 RL = 10k VIN = 0.6V rms 13168-053 VSY = 2.5V AV = 1 FREQUENCY = 1kHz RL = 10k 13168-050 0.001 Figure 51. THD + N vs. Frequency, VSY = 2.5 V 1 80kHz LOW-PASS FILTER 500kHz LOW-PASS FILTER 80kHz LOW-PASS FILTER 500kHz LOW-PASS FILTER 10 0.1 THD + N (%) THD + N (%) 1 0.1 0.01 0.01 0.001 0.0001 0.001 0.01 0.1 1 10 AMPLITUDE (V rms) 0.0001 10 100 1k 10k 100k FREQUENCY (Hz) Figure 52. THD + N vs. Frequency, VSY = 15 V Figure 49. THD + N vs. Amplitude, VSY = 15 V 100 VSY = 15V AV = 1 RL = 10k VIN = 6V rms 13168-054 VSY = 15V AV = 1 FREQUENCY = 1kHz RL = 10k 13168-051 0.001 1 80kHz LOW-PASS FILTER 500kHz LOW-PASS FILTER 80kHz LOW-PASS FILTER 500kHz LOW-PASS FILTER 10 0.1 THD + N (%) THD + N (%) 1 0.1 0.01 0.01 0.001 0.0001 0.001 0.01 0.1 1 AMPLITUDE (V rms) 10 0.0001 10 VSY = 27.5V AV = 1 RL = 10k VIN = 10V rms 100 1k 10k FREQUENCY (Hz) Figure 53. THD + N vs. Frequency, VSY = 27.5 V Figure 50. THD + N vs. Amplitude, VSY = 27.5 V Rev. F | Page 17 of 33 100k 13168-055 VSY = 27.5V AV = 1 FREQUENCY = 1kHz RL = 10k 13168-052 0.001 ADA4522-1/ADA4522-2/ADA4522-4 -0.6 -0.8 -1.0 5 VSY = 2.5V VIN = 350mV p-p RL = 10k CL = 100pF AV = -10 VOUT -1.2 4 3 2 1 0 0 -1.4 -1 TIME (1s/DIV) 3 VSY = 2.5V VIN = 350mV p-p RL = 10k CL = 100pF AV = -10 -0.2 -0.4 -0.6 2 1 0 VOUT -0.8 -1 -1.0 -2 -1.2 -3 TIME (1s/DIV) Figure 54. Positive Overload Recovery, VSY = 2.5 V 2 4 VIN OUTPUT VOLTAGE (V) -0.4 0.2 5 13168-059 INPUT VOLTAGE (V) -0.2 6 INPUT VOLTAGE (V) VIN 0.4 13168-056 0 7 OUTPUT VOLTAGE (V) 0.2 Data Sheet Figure 57. Negative Overload Recovery, VSY = 2.5 V 35 6 20 0 30 4 15 -2 25 2 -12 -4 -8 -5 TIME (4s/DIV) -10 -15 -10 -20 TIME (2s/DIV) Figure 58. Negative Overload Recovery, VSY = 15 V Figure 55. Positive Overload Recovery, VSY = 15 V 70 6 40 0 60 4 30 -2 50 2 2 -8 -10 -12 40 30 20 10 VOUT -14 20 VIN 10 0 -2 -4 -6 VSY = 27.5V VIN = 4V p-p RL = 10k CL = 100pF AV = -10 0 -10 VOUT -40 -10 TIME (4s/DIV) Figure 59. Negative Overload Recovery, VSY = 27.5 V Figure 56. Positive Overload Recovery, VSY = 27.5 V Rev. F | Page 18 of 33 -20 -30 -8 0 -10 TIME (10s/DIV) INPUT VOLTAGE (V) -3 VSY = 27.5V VIN = 4V p-p RL = 10k CL = 100pF AV = -10 13168-058 -4 OUTPUT VOLTAGE (V) VIN INPUT VOLTAGE (V) -5 VOUT -6 0 -14 0 OUTPUT VOLTAGE (V) 5 -2 5 VSY = 15V VIN = 2V p-p RL = 10k CL = 100pF AV = -10 13168-060 VOUT 10 0 OUTPUT VOLTAGE (V) -10 15 10 VIN 13168-061 -8 20 INPUT VOLTAGE (V) -3 VSY = 15V VIN = 2V p-p RL = 10k CL = 100pF AV = -10 OUTPUT VOLTAGE (V) -4 13168-057 INPUT VOLTAGE (V) VIN Data Sheet 100 10 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) 10 1 0.1 10 1k 10k 100k 1M Figure 63. Voltage Noise Density vs. Frequency, AV = 100 100 VSY = 15V AV = 1 VSY = 15V AND 27.5V AV = 100 PEAK-TO-PEAK NOISE = 117nV p-p 75 INPUT REFERRED VOLTAGE (nV) VOLTAGE NOISE DENSITY (nV/Hz) 100 FREQUENCY (Hz) Figure 60. Voltage Noise Density vs. Frequency, VSY = 2.5 V 100 5V 30V 55V AV = 100 13168-065 VOLTAGE NOISE DENSITY (nV/Hz) VSY = 2.5V AV = 1 13168-062 VOLTAGE NOISE DENSITY (nV/Hz) 100 ADA4522-1/ADA4522-2/ADA4522-4 10 50 25 0 -25 -50 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -100 TIME (1s/DIV) Figure 64. 0.1 Hz to 10 Hz Noise Figure 61. Voltage Noise Density vs. Frequency, VSY = 15 V 10 CURRENT NOISE DENSITY (pA/Hz) VSY = 27.5V AV = 1 10 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) 13168-064 VOLTAGE NOISE DENSITY (nV/Hz) 100 VSY = 2.5V VSY = 15V VSY = 27.5V RS = 100k AV = 100 1 0.1 10 100 1k 10k FREQUENCY (Hz) Figure 65. Current Noise Density vs. Frequency Figure 62. Voltage Noise Density vs. Frequency, VSY = 27.5 V Rev. F | Page 19 of 33 100k 13168-067 100 13168-063 1 10 13168-066 -75 Data Sheet INPUT VOLTAGE (1V/DIV) INPUT VOLTAGE (1V/DIV) ADA4522-1/ADA4522-2/ADA4522-4 VSY = 2.5V RL = 10k CL = 50pF DUT AV = -1 +1V 0 INPUT -1V INPUT +1V 0 -1V VSY = 2.5V RL = 10k CL = 50pF DUT AV = -1 OUTPUT +10mV 0 -10mV +10mV 0 -10mV ERROR BAND POST GAIN = 10 13168-046 ERROR BAND POST GAIN = 10 TIME (2s/DIV) TIME (2s/DIV) Figure 69. Positive Settling Time to 0.1%, VSY = 2.5 V INPUT VOLTAGE (5V/DIV) VSY = 15V AND 27.5V RL = 10k CL = 50pF DUT AV = -1 0 INPUT OUTPUT +50mV ERROR BAND POST GAIN = 10 VSY = 15V AND 27.5V RL = 10k CL = 50pF DUT AV = -1 +5V 0 -5V INPUT +50mV OUTPUT ERROR BAND POST GAIN = 10 0 -50mV 13168-047 -50mV TIME (4s/DIV) RL = 10k AV = -1 VIN = 26V VSY = 27.5V 50 40 30 VIN = 13.5V VSY = 15V 20 0 100 VIN = 1V VSY = 2.5V 1k 10k 100k 1M FREQUENCY (Hz) 10M 13168-166 10 TIME (4s/DIV) Figure 70. Positive Settling Time to 0.1%, VSY = 15 V and 27.5 V Figure 67. Negative Settling Time to 0.1%, VSY = 15 V and 27.5 V 60 0 Figure 68. Output Voltage Swing vs. Frequency Rev. F | Page 20 of 33 13168-049 -5V OUTPUT VOLTAGE SWING (V p-p) INPUT VOLTAGE (5V/DIV) Figure 66. Negative Settling Time to 0.1%, VSY = 2.5 V +5V 13168-048 OUTPUT Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 THEORY OF OPERATION The ADA4522-1/ADA4522-2/ADA4522-4 are single, dual, and quad, ultralow noise, high voltage, zero drift, rail-to-rail output operational amplifiers. They feature a chopping technique that offers an ultralow input offset voltage of 5 V and an input offset voltage drift of 22 nV/C maximum for the ADA4522-1 and ADA4522-2 and 25 nV/C maximum for the ADA4522-4. Offset voltage errors due to common-mode voltage swings and power supply variations are also corrected by the chopping technique, resulting in a superb typical CMRR figure of 160 dB and a PSRR figure of 160 dB at a 30 V supply voltage. The ADA4522-1/ADA4522-2/ADA4522-4 have wide operating voltages from 2.25 V (or 4.5 V) to 27.5 V (or 55 V). The devices are single supply amplifiers, where their input voltage range includes the lower supply rail. They also offer low voltage noise density of 5.8 nV/Hz (at f = 1 kHz, AV = 100) and reduced 1/f noise component. These features are ideal for the amplification of low level signals in high precision applications. A few examples of such applications are weigh scales, high precision current sensing, high voltage buffers, and signal conditioning for temperature sensors, among others. Figure 71 shows the ADA4522-1/ADA4522-2/ADA4522-4 architecture block diagram. The architecture consists of an input EMI filter and clamp circuitry, three gain stages (Gm1, Gm2, and Gm3), input and output chopping networks (CHOPIN and +IN x -IN x CHOPIN EMI FILTER AND CLAMP CHOPOUT), a clock generator, offset and ripple correction loop circuitry, frequency compensation capacitors (C1, C2, and C3), and thermal shutdown circuitry. An EMI filter and clamp circuit is implemented at the input front end to protect the internal circuitry against electrostatic discharge (ESD) stresses and high voltage transients. The ability of the amplifier to reject EMI is explained in detail in the EMI Rejection Ratio section. CHOPIN and CHOPOUT are controlled by a clock generator and operate at 4.8 MHz. The input baseband signal is initially modulated by CHOPIN. Next, CHOPOUT demodulates the input signal and modulates the millivolt level input offset voltage and 1/f noise of the input transconductance amplifier, Gm1, to the chopping frequency at 4.8 MHz. The chopping networks remove the low frequency errors, but, in return, the networks introduce chopping artifacts at the chopping frequency. Therefore, a offset and ripple correction loop, operating at 800 kHz, is used. This frequency is the switching frequency of the amplifier. This circuitry reduces chopping artifacts, allowing the ADA4522-1/ ADA4522-2/ADA4522-4 to have a high chopping frequency with minimal artifacts. The thermal shutdown circuit shuts down the circuit when the die is overheated (see the Thermal Shutdown section for more information). C1 CHOPOUT C2 Gm1 Gm2 Gm3 OUT C3 OFFSET AND RIPPLE CORRECTION LOOP CLOCK GENERATOR THERMAL SHUTDOWN 4.8MHz CLOCKS NOTES 1. THE INPUTS ARE +IN x/-IN x ON THE ADA4522-2 AND ADA4522-4, AND +IN/-IN ON THE ADA4522-1. 2. THE OUTPUT IS OUT ON THE ADA4522-1 AND OUT x ON THE ADA4522-2 AND ADA4522-4. Figure 71. ADA4522-1/ADA4522-2/ADA4522-4 Architecture Block Diagram Rev. F | Page 21 of 33 13168-068 800kHz CLOCKS ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet ON-CHIP INPUT EMI FILTER AND CLAMP CIRCUIT Figure 72 shows the input EMI filter and clamp circuit. The ADA4522-1/ADA4522-2/ADA4522-4 have internal ESD protection diodes (D1, D2, D3, and D4) that are connected between the inputs and each supply rail. These diodes protect the input transistors in the event of electrostatic discharge and are reverse biased during normal operation. This protection scheme allows voltages as high as approximately 300 mV beyond the rails to be applied at the input of either terminal without causing permanent damage. See Table 5 in the Absolute Maximum Ratings section for more information. The EMI filter is composed of two 200 input series resistors (RS1 and RS2), two common-mode capacitors (CCM1 and CCM2), and a differential capacitor (CDM). These RC networks set the -3 dB low-pass cutoff frequencies at 50 MHz for commonmode signals, and at 33 MHz for differential signals. After the EMI filter, back to back diodes (D5 and D6) are added to protect internal circuit devices from high voltage input transients. Each diode has about 1 V of forward turn on voltage. See the Large Signal Transient Response section for more information on the effect of high voltage input transient on the ADA4522-1/ ADA4522-2/ADA4522-4. As specified in the Absolute Maximum Ratings section (see Table 5), the maximum input differential voltage is limited to 5 V. If more than 5 V is applied, a continuous current larger than 10 mA flows through one of the back to back diodes. This current compromises long-term reliability and can cause permanent damage to the device. V+ RS1 200 D1 +IN x D2 D3 CCM1 -IN x D4 RS2 C 200 DM D5 D6 CCM2 PD_PER_AMP = (VSY+ - VSY-) x ISY_PER_AMP + IOUT x (VSY+ - VOUT) (2) When sinking current, replace (VSY+ - VOUT) in Equation 2 with (VOUT - VSY-). Also, take note to include the power dissipation of all channels of the amplifier when calculating the total power dissipation for the ADA4522-1/ADA4522-2/ADA4522-4. The thermal shutdown circuitry does not guarantee the device to be free of permanent damage if the junction temperature exceeds 150C. However, the internal thermal shutdown function may help avoid permanent damage or reduce the degree of damage. Each amplifier channel has thermal shutdown circuitry, composed of a temperature sensor with hysteresis. As soon as the junction temperature reaches 190C, the thermal shutdown circuitry shuts down the amplifier. Note that either one of the two thermal shutdown circuitries is activated; this activation disables the channel. When the amplifier is disabled, the output becomes open state and the quiescent current of the channel decreases to 0.1 mA. When the junction temperature cools down to 160C, the thermal shutdown circuitry enables the amplifier and the quiescent current increases to its typical value. When overheating in the die is caused by an undesirable excess amount of output current, the thermal shutdown circuit repeats its function. The junction temperature keeps increasing until it reaches 190C and one of the channels is disabled. Then, the junction temperature cools down until it reaches 160C, and the channel is enabled again. The process then repeats. INPUT PROTECTION 13168-069 V- NOTES 1. THE INPUTS ARE +IN x/-IN x ON THE ADA4522-2 AND ADA4522-4, AND +IN/-IN ON THE ADA4522-1. The total power dissipation is the sum of quiescent power of the device and the power required to drive a load for all channels of an amplifier. The power dissipation per amplifier (PD_PER_AMP) for sourcing a load is shown in Equation 2. Figure 72. Input EMI Filter and Clamp Circuit THERMAL SHUTDOWN The ADA4522-1/ADA4522-2/ADA4522-4 have internal thermal shutdown circuitry for each channel of the amplifier. The thermal shutdown circuitry prevents internal devices from being damaged by an overheat condition in the die. Overheating can occur due to a high ambient temperature, a high supply voltage, and/or high output currents. As specified in Table 5, take care to maintain the junction temperature below 150C. Two conditions affect junction temperature (TJ): the total power dissipation of the device (PD) and the ambient temperature surrounding the package (TA). Use the following equation to estimate the approximate junction temperature: TJ = PD x JA + TA When either input of the ADA4522-1/ADA4522-2/ADA4522-4 exceeds one of the supply rails by more than 300 mV, the ESD diodes mentioned in the On-Chip Input EMI Filter and Clamp Circuit section become forward-biased and large amounts of current begin to flow through them. Without current limiting, this excessive fault current causes permanent damage to the device. If the inputs are expected to be subject to overvoltage conditions, insert a resistor in series with each input to limit the input current to 10 mA maximum. However, consider the resistor thermal noise effect on the entire circuit. At a 15 V supply voltage, the broadband voltage noise of the ADA4522-1/ADA4522-2/ADA4522-4 is approximately 5.8 nV/Hz (at unity gain), and a 1 k resistor has a thermal noise of 4 nV/Hz. Adding a 1 k resistor increases the total noise to 7 nV/Hz. (1) where JA is the thermal resistance between the die and the ambient environment, as shown in Table 6. Rev. F | Page 22 of 33 Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 The ADA4522-1/ADA4522-2/ADA4522-4 are single-supply amplifiers, where their input voltage range includes the lower supply rail. This feature is ideal for applications where the input common-mode voltage is at the lower supply rail, for example, ground sensing. Conversely, the amplifier output is rail to rail. Figure 73 shows the input and output waveforms of the ADA4522-1/ADA4522-2/ADA4522-4 configured as a unitygain buffer with a supply voltage of 15 V. With an input voltage of 15 V, the low output voltage tracks the input voltage, whereas the high output swing clamps/distorts when the input goes out of the input voltage range (-15 V IVR +13.5 V). However, the device does not exhibit phase reversal. 20 VIN 10 VSY = 15V AV = 1 30 VSY = 27.5V 20 10 0 20 VOUT 10 0 -30 TIME (10s/DIV) Figure 74. Large Signal Transient Response Example RS_IN- 100 -20 13168-070 -10 TIME (400s/DIV) 13168-071 -20 -20 LARGE SIGNAL TRANSIENT RESPONSE VIN = 50V p-p The noninverting input is driven by an input signal source and the inverting input is driven by the output of the amplifier. The maximum amplifier output current depends on the input step function and the external source resistance at the input terminals of the amplifier. Case 1 If the external source resistance is low (for example, 100 in Figure 75) or if the input step function is large, the maximum amplifier output current is limited to the output short-circuit current as specified in the Specifications section. The maximum differential voltage between the input signal and the amplifier output is then limited by the maximum amplifier output current multiplied by the total input resistance (internal and external) and the turn-on voltage of the back to back diode (see Figure 72 for the input EMI filter and clamp circuit architecture). ADA4522-1/ ADA4522-2/ ADA4522-4 100pF RS_IN+ 100 VSY- Figure 73. Input and Output Waveforms, No Phase Reversal When the ADA4522-1/ADA4522-2/ADA4522-4 are configured in a closed-loop configuration with a large input transient (for example, a step input voltage), the internal back to back diodes may turn on. Consider a case where the amplifier is in unity-gain configuration with a step input waveform. This case is shown in Figure 74. VSY+ VOUT 10k 13168-100 -10 OUTPUT VOLTAGE (V) -10 0 INPUT VOLTAGE (V) tial voltage between the input signal and amplifier output possible. The inverting input voltage then starts slewing with the slew rate specified in the Specifications section until it reaches its desired output. Therefore, as seen in Figure 74, there are two distinctive sections of the rising and falling edge of the output waveform. With this test condition, the amount and duration of the input/output current is limited and, therefore, does not damage the amplifier. VOLTAGE (V) SINGLE-SUPPLY AND RAIL-TO-RAIL OUTPUT Figure 75. Circuit Diagram for Large Signal Transient Response Case 2 If the external source resistance is high or if the input step function is small, the maximum output current is limited to the instantaneous difference between the input signal and amplifier output voltage (which is the change in the step function) divided by the source resistance. This maximum output current is less than the amplifier output short-circuit current. The maximum differential voltage between the input signal and the amplifier output is then equal to the step function. The output voltage slews until it reaches its desired output. Therefore, if desired, reduce the input current by adding a larger external resistor between the signal source and the noninverting input. Similarly, to reduce output current, add an external resistor to the feedback loop between the inverting input and output. This large signal transient response issue is typically not a problem when the amplifier is configured in closed-loop gain, where the input signal source is usually much smaller and the gain and feedback resistors limit the current. Back to back diodes are also implemented in many other amplifiers; these amplifiers show similar slewing behavior. When the noninverting input voltage changes with a step signal, the inverting input voltage (and, therefore, the output voltage) follows the change quickly until it reaches the maximum differenRev. F | Page 23 of 33 ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet NOISE CONSIDERATIONS Residual Ripple 1/f Noise As shown in Figure 60, Figure 61, and Figure 62, the ADA4522-1/ ADA4522-2/ADA4522-4 have a flat noise spectrum density at lower frequencies and exhibits spectrum density bumps and peaks at higher frequencies. The ADA4522-1/ADA4522-2/ADA4522-4 are some of the lowest noise high voltage zero drift amplifiers with 5.8 nV/Hz of voltage noise density at 1 kHz (AV = 100). Therefore, it is important to consider the input source resistance of choice to maintain a total low noise. The total input referred broadband noise (eN total) from any amplifier is primarily a function of three types of noise: input voltage noise, input current noise, and thermal (Johnson) noise from the external resistors. These uncorrelated noise sources can be summed up in a root sum squared (rss) manner by using the following equation: eN total = (eN2 + 4 kTRS + (iN x RS)2)1/2 where: eN is the input voltage noise density of the amplifier (V/Hz). k is Boltzmann's constant (1.38 x 10-23 J/K). T is the temperature in Kelvin (K). RS is the total input source resistance (). iN is the input current noise density of the amplifier (A/Hz). The total equivalent rms noise over a specific bandwidth is expressed as eN RMS = eN total BW where BW is the bandwidth in hertz. This analysis is valid for broadband noise calculation up to a decade before the switching frequency. If the bandwidth of concern includes the switching frequency, more complicated calculations must be made to include the effect of the increase in noise at the switching frequency. The offset and ripple correction loop, designed to reduce the 4.8 MHz switching artifact, also creates a noise bump centered at 800 kHz and a noise peak on top of this noise bump. Although the magnitude of the bump is mostly constant, the magnitude of the 800 kHz peak is different from unit to unit. Some units may not exhibit the 800 kHz noise peak; however, for other units, peaks occur at multiple integrals of 800 kHz, such as 1.6 MHz or 2.4 MHz. These noise peaks, albeit small in magnitude, can be significant when the amplifier has a closed-loop frequency that is higher than the chopping frequency. To suppress the noise spike to a desired level, either configure the amplifier in a high gain configuration or apply a post filter at the output of the amplifier. Figure 76 shows the voltage noise density of the ADA4522-1/ ADA4522-2/ADA4522-4 in various gain configurations. Note that the higher the gain, the lower the available bandwidth is. The earlier bandwidth roll-off effectively filters out the higher noise spectrum. 100 With a low source resistance of RS < 1 k, the voltage noise of the amplifier dominates. As the source resistance increases, the thermal noise of RS dominates. As the source resistance further increases, where RS > 50 k, the current noise becomes the main contributor of the total input noise. Rev. F | Page 24 of 33 VSY = 15V AV = 1 10 AV = 10 AV = 100 1 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 76. Voltage Noise Density with Various Gains 100M 13168-072 Source Resistance The largest noise bump is centered at 6 MHz; this bump is due to the decrease in the input gain at higher frequencies. This decrease is a typical phenomenon and can also be seen in other amplifiers. In addition to the noise bump, a sharp peak due to the chopping networks is seen at 4.8 MHz. However, this magnitude is significantly reduced by the offset and ripple correction loop. Its magnitude may be different with different amplifier units or with different circuitries around the amplifier. This peak can potentially be hidden by the noise bump and, therefore, may not be detected. VOLTAGE NOISE DENSITY (nV/Hz) 1/f noise, also known as pink noise or flicker noise, is inherent in semiconductor devices and increases as frequency decreases. At a low frequency, 1/f noise is a major noise contributor and causes a significant output voltage offset when amplified by the noise gain of the circuit. However, because the low frequency 1/f noise appears as a slow varying offset to the ADA4522-1/ ADA4522-2/ADA4522-4, it is effectively reduced by the chopping technique. This technique allows the ADA4522-1/ADA4522-2/ ADA4522-4 to have a much lower noise at dc and low frequency in comparison to standard low noise amplifiers that are susceptible to 1/f noise. Figure 64 shows the 0.1 Hz to 10 Hz noise to be only 117 nV p-p of noise. Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 Figure 77 shows the voltage noise density of the ADA4522-1/ ADA4522-2/ADA4522-4 without and with post filters at different frequencies. The post filter serves to roll off the bandwidth before the switching frequency. In this example, the noise peak at 800 kHz is about 38 nV/Hz. With a post filter at 80 kHz, the noise peak is reduced to 4.1 nV/Hz. With a post filter at 8 kHz, the noise peak is lower than the noise floor and cannot be detected. AV = 1 AV = 1 (POST FILTER AT 80kHz) AV = 1 (POST FILTER AT 8kHz) 1 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 77. Voltage Noise Density with Post Filters Current Noise Density Figure 78 shows the current noise density of the ADA4522-1/ ADA4522-2/ADA4522-4 at unity gain. At 1 kHz, the current noise density is about 1.3 pA/Hz. The current noise density is determined by measuring the voltage noise due to current noise flowing through a resistor. Due to the low current noise density of the amplifier, the voltage noise is usually measured with a high value resistor; in this case, a 100 k source resistor is used. However, the source resistor interacts with the input capacitance of the amplifier and board, causing the bandwidth to roll off. Note that Figure 78 shows the current noise density rolling off much earlier than the unity-gain bandwidth; this roll-off is expected. EMIRR = 20log(VIN_PEAK/VOS) 100 VIN = 100mV p-p 90 80 70 60 50 40 30 20 VSY = 2.5V VSY = 15V VSY = 27.5V 55V 30V 5V 10 0 10M 100M 1G FREQUENCY (Hz) 10G 13168-075 RS = 100k AV = 1 Figure 79. EMIRR vs. Frequency CAPACITIVE LOAD STABILITY 1 0.1 10 100 1k 10k FREQUENCY (Hz) Figure 78. Current Noise Density at Gain = 1 100k 13168-074 CURRENT NOISE DENSITY (pA/Hz) The ADA4522-1/ADA4522-2/ADA4522-4 have integrated EMI filters at their input stage. To describe the ability of the ADA4522-1/ADA4522-2/ADA4522-4 to perform as intended in the presence of electromagnetic energy, the electromagnetic interference rejection ratio (EMIRR) of the noninverting pin is specified in Table 2, Table 3, and Table 4 of the Specifications section. A mathematical method of measuring EMIRR is defined as follows: EMIRR (dB) 10 10 Circuit performance is often adversely affected by high frequency EMI. When the signal strength is low and transmission lines are long, an op amp must accurately amplify the input signals. However, all op amp pins--the noninverting input, inverting input, positive supply, negative supply, and output pins--are susceptible to EMI signals. These high frequency signals are coupled into an op amp by various means, such as conduction, near field radiation, or far field radiation. For example, wires and printed circuit board (PCB) traces can act as antennas and pick up high frequency EMI signals. Amplifiers do not amplify EMI or RF signals due to their relatively low bandwidth. However, due to the nonlinearities of the input devices, op amps can rectify these out of band signals. When these high frequency signals are rectified, they appear as a dc offset at the output. 13168-073 VOLTAGE NOISE DENSITY (nV/Hz) 100 EMI REJECTION RATIO The ADA4522-1/ADA4522-2/ADA4522-4 can safely drive capacitive loads of up to 250 pF in any configuration. As with most amplifiers, driving larger capacitive loads than specified may cause excessive overshoot and ringing, or even oscillation. A heavy capacitive load reduces the phase margin and causes the amplifier frequency response to peak. Peaking corresponds to overshooting or ringing in the time domain. Therefore, it is recommended that external compensation be used if the ADA4522-1/ADA4522-2/ ADA4522-4 must drive a load exceeding 250 pF. This compensation is particularly important in the unity-gain configuration, which is the worst case for stability. Rev. F | Page 25 of 33 ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet +VSY -VSY 45 40 35 30 25 20 15 VOUT ADA4522-1/ ADA4522-2/ ADA4522-4 OS+ (RISO = 0) OS- (RISO = 0) OS+ (RISO = 25) OS- (RISO = 25) OS+ (RISO = 50) OS- (RISO = 50) 10 CL 5 0 10 100 LOAD CAPACITANCE (pF) Figure 80. Stability Compensation with Isolating Resistor, RISO Figure 81 shows the effect on overshoot with different values of RISO. 1k 13168-077 VIN VSY = 15V 55 RL = 10k AV = 1 50 V = 100mV p-p IN 13168-076 RISO 60 OVERSHOOT (%) A quick and easy way to stabilize the op amp for capacitive load drive is by adding a series resistor, RISO, between the amplifier output terminal and the load capacitance, as shown in Figure 80. RISO isolates the amplifier output and feedback network from the capacitive load. However, with this compensation scheme, the output impedance as seen by the load increases, and this reduces gain accuracy. Figure 81. Small Signal Overshoot vs. Load Capacitance with Various Output Isolating Resistors Rev. F | Page 26 of 33 Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 APPLICATIONS INFORMATION SINGLE-SUPPLY INSTRUMENTATION AMPLIFIER The extremely low offset voltage and drift, high open-loop gain, high common-mode rejection, and high power supply rejection of the ADA4522-1/ADA4522-2/ADA4522-4 make them excellent op amp choices as discrete, single-supply instrumentation amplifiers. Figure 82 shows the classic 3-op-amp instrumentation amplifier using the ADA4522-1/ADA4522-2/ADA4522-4. The key to high CMRR for the instrumentation amplifier are resistors that are well matched for both the resistive ratio and relative drift. For true difference amplification, matching of the resistor ratio is very important, where R5/R2 = R6/R4. The resistors are important in determining the performance over manufacturing tolerances, time, and temperature. Assuming a perfect unity-gain difference amplifier with infinite common-mode rejection, a 1% tolerance resistor matching results in only 34 dB of common-mode rejection. Therefore, at least 0.01% or better resistors are recommended. A1 R5 R1 RG2 R3 A2 VOUT R4 R6 13168-078 VIN2 RG1 = RG2, R1 = R3, R2 = R4, R5 = R6 VOUT = (VIN2 - VIN1) (1 + R1/RG1) (R5/R2) Figure 82. Discrete 3-Op-Amp Instrumentation Amplifier To build a discrete instrumentation amplifier with external resistors without compromising on noise, pay close attention to the resistor values chosen. RG1 and RG2 each have thermal noise that is amplified by the total noise gain of the instrumentation amplifier and, therefore, a sufficiently low value must be chosen to reduce thermal noise contribution at the output while still providing an accurate measurement. Table 10 shows the external resistors noise contribution referred to the output (RTO). Table 10. Thermal Noise Contribution Example Resistor RG1 RG2 R1 R2 R3 R4 R5 R6 Value (k) 0.4 0.4 10 10 10 10 20 20 Resistor Thermal Noise (nV/Hz) 2.57 2.57 12.83 12.83 12.83 12.83 18.14 18.14 Understanding how noise impacts a discrete instrumentation amplifier or a difference amplifier (the second stage of a 3-opamp instrumentation amplifier) is important, because they are commonly used in many different applications. The Load Cell/Strain Gage Sensor Signal Conditioning section and the Precision Low-Side Current Shunt Sensor section show the ADA4522-1/ADA4522-2/ADA4522-4 used as a discrete instrumentation or difference amplifier in an application. The ADA4522-2, with its ultralow offset, drift, and noise, is well suited to signal condition a low level sensor output with high gain and accuracy. A weigh scale/load cell is an example of an application with such requirements. Figure 83 shows a configuration for a single-supply, precision, weigh scale measurement system. The ADA4522-2 is used at the front end for amplification of the low level signal from the load cell. R2 A3 Any unused channel of the ADA4522-1/ADA4522-2/ADA4522-4 must be configured in unity gain with the input common-mode voltage tied to the midpoint of the power supplies. LOAD CELL/STRAIN GAGE SENSOR SIGNAL CONDITIONING USING THE ADA4522-2 VIN1 RG1 ent set of op amp requirements. Its input noise, referred to the overall instrumentation amplifier input, is divided by the first stage gain and is not as important. Note that the input offset voltage and the input voltage noise of the amplifiers are also amplified by the overall noise gain. Thermal Noise RTO (nV/Hz) 128.30 128.30 25.66 25.66 25.66 25.66 18.14 18.14 Note that A1 and A2 have a high gain of 1 + R1/RG1. Therefore, use a high precision, low offset voltage and low noise amplifier for A1 and A2, such as the ADA4522-1/ADA4522-2/ADA4522-4. Conversely, A3 operates at a much lower gain and has a differ- Current flowing through a PCB trace produces an IR voltage drop; with longer traces, this voltage drop can be several millivolts or more, introducing a considerable error. A 1 inch long, 0.005 inch wide trace of 1 oz copper has a resistance of approximately 100 m at room temperature. With a load current of 10 mA, the resistance can introduce a 1 mV error. Therefore, a 6-wire load cell is used in the circuit. The load cell has two sense pins, in addition to excitation, ground, and two output connections. The sense pins are connected to the high side (excitation pin) and low side (ground pin) of the Wheatstone bridge. The voltage across the bridge can then be accurately measured regardless of voltage drop due to wire resistance. The two sense pins are also connected to the analogto-digital converter (ADC) reference inputs for a ratiometric configuration that is immune to low frequency changes in the power supply excitation voltage. The ADA4522-2 is configured as the first stage of a 3-op-amp instrumentation amplifier to amplify the low level amplitude signal from the load cell by a factor of 1 + 2R1/RG. Capacitors C1 and C2 are placed in the feedback loops of the amplifiers and interact with R1 and R2 to perform low-pass filtering. This filtering limits the amount of noise entering the - ADC. In addition, C3, C4, C5, R3, and R4 provide further common-mode and differential mode filtering to reduce noise and unwanted signals. Rev. F | Page 27 of 33 ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet +5V V+ 1/2 1F R1 11.3k RG 60.4 VEXC OUT- SENSE+ C1 3.3F R4 1k C2 3.3F OUT+ SENSE- R3 1k VDD REF(+) REF(-) 100pF C3 1F DIN DOUT/ RDY AD7791 AIN(+) SCLK C5 10F CS AIN(-) C4 1F GND R2 11.3k 1/2 13168-079 LOAD CELL 100pF ADA4522-2 ADA4522-2 Figure 83. Precision Weigh Scale Measurement System PRECISION LOW-SIDE CURRENT SHUNT SENSOR A typical shunt may be 100 m. At a measured current of 1 A, the voltage produced from the shunt is 100 mV, and the amplifier error sources are not critical. However, at low measured current in the 1 mA range, the 100 V generated across the shunt demands a very low offset voltage and drift amplifier to maintain absolute accuracy. The unique attributes of a zero drift amplifier provide a solution. Figure 84 shows a low-side current sensing circuit using the ADA4522-1/ADA4522-2/ADA4522-4. The ADA4522-1/ ADA4522-2/ADA4522-4 are configured as difference amplifiers with a gain of 1000. Although the ADA4522-1/ADA4522-2/ ADA4522-4 have high CMRR, the CMRR of the system is limited by the external resistors. Therefore, as mentioned in the SingleSupply Instrumentation Amplifier section, the key to high CMRR for the system is resistors that are well matched from both the resistive ratio and relative drift, where R1/R2 = R3/R4. Any unused channel of the ADA4522-1/ADA4522-2/ADA4522-4 must be configured in unity gain with the input common-mode voltage tied to the midpoint of the power supplies. VSY VOUT* RS 0.1 I R1 100 R2 100k ADA4522-1/ ADA4522-2/ ADA4522-4 R4 100k RL VSY R3 100 *VOUT = AMPLIFIER GAIN x VOLTAGE ACROSS RS = 1000 x RS x I = 100 x I 13168-080 Many applications require the sensing of signals near the positive or negative rails. Current shunt sensors are one such application and are mostly used for feedback control systems. They are also used in a variety of other applications, including power metering, battery fuel gauging, and feedback controls in industrial applications. In such applications, it is desirable to use a shunt with very low resistance to minimize series voltage drop. This configuration not only minimizes wasted power, but also allows the measurement of high currents while saving power. I Figure 84. Low-Side Current Sensing Circuit PRINTED CIRCUIT BOARD LAYOUT The ADA4522-1/ADA4522-2/ADA4522-4 are high precision devices with ultralow offset voltage and noise. Therefore, take care in the design of the PCB layout to achieve optimum performance of the ADA4522-1/ADA4522-2/ADA4522-4 at the board level. To avoid leakage currents, keep the surface of the board clean and free of moisture. Properly bypassing the power supplies and keeping the supply traces short minimizes power supply disturbances caused by output current variation. Connect bypass capacitors as close as possible to the device supply pins. Stray capacitances are a concern at the outputs and the inputs of the amplifier. It is recommended that signal traces be kept at a distance of at least 5 mm from supply lines to minimize coupling. A potential source of offset error is the Seebeck voltage on the circuit board. The Seebeck voltage occurs at the junction of two dissimilar metals and is a function of the temperature of the junction. The most common metallic junctions on a circuit board are solder to board traces and solder to component leads. Figure 85 shows a cross section of a surface-mount component soldered to a PCB. A variation in temperature across the board (where TA1 TA2) causes a mismatch in the Seebeck voltages at the solder joints, thereby resulting in thermal voltage errors that degrade the Rev. F | Page 28 of 33 Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 to the lower supply rail, resulting in an increase in the total supply current of the system. Both comparator configurations yield the same result. At 30 V of power supply, ISY+ remains at 1.55 mA per dual amplifier, but ISY- increases close to 2 mA in magnitude per dual amplifier. performance of the ultralow offset voltage of the ADA4522-1/ ADA4522-2/ADA4522-4. COMPONENT LEAD VSC1 + SURFACE-MOUNT COMPONENT VTS1 + + VSC2 SOLDER +VSY + VTS2 PC BOARD ISY+ ADA4522-1/ ADA4522-2/ ADA4522-4 VOUT Figure 85. Mismatch in Seebeck Voltages Causes Seebeck Voltage Error 10k -VSY Figure 86. Comparator Configuration A To minimize these thermocouple effects, orient resistors so that heat sources warm both ends equally. Where possible, it is recommended that the input signal paths contain matching numbers and types of components to match the number and type of thermocouple junctions. For example, dummy components, such as zero value resistors, can be used to match the thermoelectric error source (real resistors in the opposite input path). Place matching components in close proximity and orient them in the same manner to ensure equal Seebeck voltages, thus cancelling thermal errors. Additionally, use leads that are of equal length to keep thermal conduction in equilibrium. Keep heat sources on the PCB as far away from amplifier input circuitry as is practical. COMPARATOR OPERATION An op amp is designed to operate in a closed-loop configuration with feedback from its output to its inverting input. In contrast to op amps, comparators are designed to operate in an open-loop configuration and to drive logic circuits. Although op amps are different from comparators, occasionally an unused section of a dual op amp is used as a comparator to save board space and cost; however, this is not recommended for the ADA4522-1/ ADA4522-2/ADA4522-4. Figure 86 and Figure 87 show the ADA4522-1/ADA4522-2/ ADA4522-4 configured as a comparator, with 10 k resistors in series with the input pins. Any unused channels are configured as buffers with the input voltage kept at the midpoint of the power supplies. The ADA4522-1/ADA4522-2/ADA4522-4 have input devices that are protected from large differential input voltages by Diode D5 and Diode D6, as shown in Figure 72. These diodes consist of substrate PNP bipolar transistors, and conduct whenever the differential input voltage exceeds approximately 600 mV; however, these diodes also allow a current path from the input +VSY A1 ISY+ ADA4522-1/ ADA4522-2/ ADA4522-4 10k VOUT 10k A2 ISY- -VSY Figure 87. Comparator Configuration B 2.2 2.0 ISY PER DUAL AMPLIFIER (mA) It is highly recommended to use a ground plane. A ground plane helps distribute heat throughout the board, maintain a constant temperature across the board, and reduce EMI noise pickup. ISY- A2 13168-082 In Figure 85, VSC1 and VSC2 are the Seebeck voltages due to solder to component at Junction 1 and Junction 2, respectively. VTS1 and VTS2 are the Seebeck voltages due to solder to trace at Junction 1 and Junction 2. TA1 and TA2 are the temperatures of Junction 1 and Junction 2, respectively. ISY- 1.8 1.6 ISY+ 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 VSY (V) 13168-084 IF TA1 TA2, THEN VTS1 + VSC1 VTS2 + VSC2 13168-083 COPPER TRACE A1 10k TA2 13168-081 TA1 Figure 88. Supply Current (ISY) per Dual Amplifier vs. Supply Voltage (VSY) (ADA4522-1/ADA4522-2/ADA4522-4 as a Comparator) Note that 10 k resistors are used in series with the input of the op amp. If smaller resistor values are used, the supply current of the system increases much more. For more details on op amps as comparators, see the AN-849 Application Note, Using Op Amps as Comparators. Rev. F | Page 29 of 33 ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet USE OF LARGE SOURCE RESISTANCE Workaround The ADA4522-1/ADA4522-2/ADA4522-4 are designed to work with low value source resistance. Note that the amplifier has an ultralow voltage noise density of 6 nV/Hz. A 1 k resistor contributes 4 nV/Hz; therefore, placing a 1 k resistor at the input increases total noise to 7.2 nV/Hz. For this noise reason, it is recommended to avoid using large source resistance. To avoid the amplifier output railing to the positive supply, implement one of the following actions (see Table 11 and Figure 89): When the ADA4522-1/ADA4522-2/ADA4522-4 are configured in a unity-gain follower configuration with a large source resistance and slow power supply ramp rate, the amplifier output may rail to the positive supply. Condition 1.5 V VSY - VIN < 2.5 V 2.5 V VSY - VIN < 3.5 V VSY - VIN 3.5 V +VSY RS VOUT ADA4522-1/ ADA4522-2/ ADA4522-4 -VSY 13168-200 VIN Reduce the value of the source resistance (RS). Insert a feedback resistor (RF). Table 11. Amplifier Output Railing Workaround Recommendations Unity Gain Follower with Large Source Resistance RF Figure 89. Insert RF When Large RS is Used Rev. F | Page 30 of 33 Recommendation RF = 200 or RF 50 RS, whichever is greater RS 200 or RF 2 RS RS 500 or RF 0.5 RS Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 OUTLINE DIMENSIONS 3.20 3.00 2.80 3.20 3.00 2.80 8 5.15 4.90 4.65 5 1 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15 MAX 1.10 MAX 0.80 0.55 0.40 0.23 0.09 6 0 0.40 0.25 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 90. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 5.00 (0.1968) 4.80 (0.1890) 8 1 5 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 91. 8-Lead Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) Rev. F | Page 31 of 33 012407-A 4.00 (0.1574) 3.80 (0.1497) ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet 8.75 (0.3445) 8.55 (0.3366) 4.00 (0.1575) 3.80 (0.1496) 8 14 1 7 6.20 (0.2441) 5.80 (0.2283) 1.27 (0.0500) BSC COPLANARITY 0.10 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) 0.25 (0.0098) 0.10 (0.0039) SEATING PLANE 0.51 (0.0201) 0.31 (0.0122) 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 060606-A COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 92. 14-Lead Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 14 8 4.50 4.40 4.30 6.40 BSC 1 7 PIN 1 0.65 BSC 1.20 MAX 0.15 0.05 COPLANARITY 0.10 0.30 0.19 0.20 0.09 SEATING PLANE 8 0 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 93. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters Rev. F | Page 32 of 33 0.75 0.60 0.45 061908-A 1.05 1.00 0.80 Data Sheet ADA4522-1/ADA4522-2/ADA4522-4 ORDERING GUIDE Model1 ADA4522-1ARMZ ADA4522-1ARMZ-R7 ADA4522-1ARMZ-RL ADA4522-1ARZ ADA4522-1ARZ-R7 ADA4522-1ARZ-RL ADA4522-2ARMZ ADA4522-2ARMZ-R7 ADA4522-2ARMZ-RL ADA4522-2ARZ ADA4522-2ARZ-R7 ADA4522-2ARZ-RL ADA4522-4ARUZ ADA4522-4ARUZ-R7 ADA4522-4ARUZ-RL ADA4522-4ARZ ADA4522-4ARZ-R7 ADA4522-4ARZ-RL 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Small Outline Package [SOIC_N] 8-Lead Small Outline Package [SOIC_N] 8-Lead Small Outline Package [SOIC_N] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Small Outline Package [SOIC_N] 8-Lead Small Outline Package [SOIC_N] 8-Lead Small Outline Package [SOIC_N] 14-Lead Thin Shrink Small Outline Package [TSSOP] 14-Lead Thin Shrink Small Outline Package [TSSOP] 14-Lead Thin Shrink Small Outline Package [TSSOP] 14-Lead Standard Small Outline Package [SOIC_N] 14-Lead Standard Small Outline Package [SOIC_N] 14-Lead Standard Small Outline Package [SOIC_N] Z = RoHS Compliant Part. (c)2015-2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13168-0-9/17(F) Rev. F | Page 33 of 33 Package Option RM-8 RM-8 RM-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 R-8 R-8 R-8 RU-14 RU-14 RU-14 R-14 R-14 R-14 Branding A3G A3G A3G A39 A39 A39