55 V, EMI Enhanced, Zero Drift, Ultralow Noise,
Rail-to-Rail Output Operational Amplifiers
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F Document Feedback
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FEATURES
Low offset voltage: 5 μV maximum
Extremely low offset voltage drift: 22 nV/°C maximum
Low voltage noise density: 5.8 nV/√Hz typical
117 nV p-p typical from 0.1 Hz to 10 Hz
Low input bias current: 50 pA typical
Unity-gain crossover: 3 MHz typical
Single-supply operation: input voltage range includes
ground and rail-to-rail output
Wide range of operating voltages
Single-supply operation: 4.5 V to 55 V
Dual-supply operation: ±2.25 V to ±27.5 V
Integrated EMI filters
Unity-gain stable
APPLICATIONS
Inductance, capacitance, and resistance (LCR) meter/
megohmmeter front-end amplifiers
Load cell and bridge transducers
Magnetic force balance scales
High precision shunt current sensing
Thermocouple/resistance temperature detector (RTD) sensors
Programmable logic controller (PLC) input and output
amplifiers
GENERAL DESCRIPTION
The ADA4522-1/ADA4522-2/ADA4522-4 are single/dual/quad
channel, zero drift op amps with low noise and power, ground
sensing inputs, and rail-to-rail output, optimized for total
accuracy over time, temperature, and voltage conditions. The
wide operating voltage and temperature ranges, as well as the
high open-loop gain and very low dc and ac errors make the
devices well suited for amplifying very small input signals and
for accurately reproducing larger signals in a wide variety of
applications.
The ADA4522-1/ADA4522-2/ADA4522-4 performance is
specified at 5.0 V, 30 V, and 55 V power supply voltages. These
devices operate over the range of 4.5 V to 55 V, and are excellent
for applications using single-ended supplies of 5 V, 10 V, 12 V,
and 30 V, or for applications using higher single supplies and
du a l s u ppl i es o f ± 2 .5 V, ± 5 V, a n d ± 1 5 V. Th e ADA4522-1/
ADA4522-2/ADA4522-4 use on-chip filtering to achieve high
immunity to electromagnetic interference (EMI).
The ADA4522-1/ADA4522-2/ADA4522-4 are fully specified
over the extended industrial temperature range of −40°C to
+125°C and are available in 8-lead MSOP, 8-lead SOIC, 14-lead
SOIC, and 14-lead TSSOP packages.
PIN CONNECTION DIAGRAM
OUT A
1
–IN A
2
+IN A
3
V–
4
V+
8
OUT B
7
–IN B
6
+IN B
5
ADA4522-2
TOP VIEW
(Not to Scale)
13168-001
Figure 1. 8-Lead MSOP (RM Suffix) and 8-Lead SOIC (R Suffix)
Pin Configuration
For the ADA4522-1 and ADA4522-4 pin connections and for
more information about the pin connections for these products,
see the Pin Configurations and Function Descriptions section.
100
10
1
0.1
10 100k 1M10k1k100
VOLTAGE NOISE DENSITY (nV/Hz)
FREQUENCY (Hz)
A
V
= 100 5V
30V
55V
13168-165
Figure 2. Voltage Noise Density vs. Frequency, VSY = ±15 V
Table 1. Zero Drift Op Amps (<0.1 μV/°C)
Supply Voltage 5 V 16 V 30 V 55 V
Single ADA4528-1 AD8638 ADA4638-1 ADA4522-1
AD8628
AD8538
ADA4051-1
Dual ADA4528-2 AD8639 ADA4522-2
AD8629
AD8539
ADA4051-2
Quad AD8630 ADA4522-4
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 2 of 33
TABLE OF CONTENTS
Features .......................................................................................... 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Connection Diagram ................................................................ 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics—5.0 V Operation ............................ 3
Electrical Characteristics—30 V Operation ............................. 4
Electrical Characteristics—55 V Operation ............................. 5
Absolute Maximum Ratings ............................................................ 7
Thermal Resistance ...................................................................... 7
Power Sequencing ........................................................................ 7
ESD Caution .................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ........................................... 10
Theory of Operation ...................................................................... 21
On-Chip Input EMI Filter and Clamp Circuit ....................... 22
Thermal Shutdown ..................................................................... 22
Input Protection ......................................................................... 22
Single-Supply and Rail-to-Rail Output ................................... 23
Large Signal Transient Response .............................................. 23
Noise Considerations ................................................................. 24
EMI Rejection Ratio .................................................................. 25
Capacitive Load Stability ........................................................... 25
Applications Information .............................................................. 27
Single-Supply Instrumentation Amplifier .............................. 27
Load Cell/Strain Gage Sensor Signal Conditioning Using the
ADA4522-2 .................................................................................. 27
Precision Low-Side Current Shunt Sensor.............................. 28
Printed Circuit Board Layout ................................................... 28
Comparator Operation .............................................................. 29
Use of Large Source Resistance ................................................ 30
Outline Dimensions ....................................................................... 31
Ordering Guide .......................................................................... 32
REVISION HISTORY
9/2017—Rev. E to Rev. F
Added Power Sequencing Section .................................................. 7
Added Use of Large Source Resistance Section .......................... 30
Added Figure 89 and Table 11; Renumbered Sequentially ....... 30
10/2016—Rev. D to Rev. E
Changes to Figure 73 ...................................................................... 23
4/2016—Rev. C to Rev. D
Changed ADA4522-4 Pin 4 to V+ .............................. Throughout
Changed ADA4522-4 Pin 11 to V− ............................ Throughout
Changes to Figure 5 and Table 9 ..................................................... 9
2/2016—Rev. B to Rev. C
Added ADA4522-1 ............................................................. Universal
Changes to Common-Mode Rejection Ratio Parameter and
Supply Current per Amplifier Parameter, Table 2 ........................ 3
Changes to Offset Voltage Drift Parameter, and Supply Current
per Amplifier Parameter, Table 3 .................................................... 4
Changes to Offset Voltage Drift Parameter, Input Offset Current
Parameter, and Supply Current per Amplifier Parameter,
Table 4 ................................................................................................ 5
Added Figure 3 and Table 7; Renumbered Sequentially ............. 8
Moved Theory of Operation Section ........................................... 21
Changes to Figure 71 ...................................................................... 21
Changes to Figure 72 ...................................................................... 22
Changes to Ordering Guide .......................................................... 32
1/2016—Rev. A to Rev. B
Updated Outline Dimensions ....................................................... 29
10/2015—Rev. 0 to Rev. A
Added ADA4522-4 ............................................................. Universal
Changes to General Description Section ....................................... 1
Change to Common-Mode Rejection Ratio Parameter, Table 2 ... 3
Change to Offset Voltage Drift Parameter, Table 3 ....................... 4
Change to Offset Voltage Drift Parameter and Input Offset
Current Parameter, Table 4 .............................................................. 5
Changes to Table 6 ............................................................................. 7
Added Figure 4 and Table 8; Renumbered Sequentially .............. 8
Changes to Figure 34 ...................................................................... 13
Changes to Figure 67 ...................................................................... 19
Changes to Applications Information Section ........................... 20
Changes to Thermal Shutdown Section ...................................... 21
Changes to Single-Supply Instrumentation Amplifier Section ....... 25
Changes to Precision Low-Side Current Shunt Sensor Section ...... 27
Changes to Printed Circuit Board Layout Section ............................ 28
Added Figure 89 and Figure 90; Outline Dimensions ............... 30
Changes to Ordering Guide .......................................................... 30
5/2015—Revision 0: Initial Version
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 3 of 33
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5.0 V OPERATION
VSY = 5.0 V, VCM = VSY/2 V, TA = 25°C, unless otherwise specified.
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS V
CM = VSY/2 0.7 5 μV
−40°C ≤ TA ≤ +125°C 6.5 μV
Offset Voltage Drift TCVOS 2.5 15 nV/°C
Input Bias Current IB 50 150 pA
−40°C ≤ TA ≤ +85°C 500 pA
−40°C ≤ TA ≤ +125°C 2 nA
Input Offset Current IOS 80 250 pA
−40°C ≤ TA ≤ +85°C 350 pA
−40°C ≤ TA ≤ +125°C 500 pA
Input Voltage Range IVR 0 3.5 V
Common-Mode Rejection Ratio CMRR ADA4522-1, ADA4522-2, VCM = 0 V to 3.5 V 135 155 dB
ADA4522-4, VCM = 0 V to 3.5 V 130 145 dB
−40°C ≤ TA ≤ +125°C 130 dB
Large Signal Voltage Gain AV R
L = 10 kΩ, VOUT = 0.5 V to 4.5 V 125 145 dB
−40°C ≤ TA ≤ +125°C 125 dB
Input Resistance
Differential Mode RINDM 30 kΩ
Common Mode RINCM 100 GΩ
Input Capacitance
Differential Mode CINDM 7 pF
Common Mode CINCM 35 pF
OUTPUT CHARACTERISTICS
Output Voltage
High VOH R
L = 10 kΩ to VSY/2 4.97 4.98 V
−40°C ≤ TA ≤ +125°C 4.95 V
Low VOL R
L = 10 kΩ to VSY/2 20 30 mV
−40°C ≤ TA ≤ +125°C 50 mV
Continuous Output Current IOUT Dropout voltage = 1 V 14 mA
Short-Circuit Current Source ISC+ 22 mA
T
A = 125°C 15 mA
Short-Circuit Current Sink ISC− 29 mA
T
A = 125°C 19 mA
Closed-Loop Output Impedance ZOUT f = 1 MHz, AV = 1 4 Ω
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = 4.5 V to 55 V 150 160 dB
−40°C ≤ TA ≤ +125°C 145 dB
Supply Current per Amplifier ISY ADA4522-2, ADA4522-4, IOUT = 0 mA 830 900 μA
ADA4522-2, ADA4522-4, −40°C ≤ TA ≤ +125°C 950 μA
ADA4522-1, IOUT = 0 mA 840 910 μA
ADA4522-1, −40°C ≤ TA ≤ +125°C 970 μA
DYNAMIC PERFORMANCE
Slew Rate SR+ RL = 10 kΩ, CL = 50 pF, AV = 1 1.4 V/μs
SR− RL = 10 kΩ, CL = 50 pF, AV = 1 1.3 V/μs
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 4 of 33
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
Gain Bandwidth Product GBP VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 100 2.7 MHz
Unity-Gain Crossover UGC VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1 3 MHz
−3 dB Closed-Loop Bandwidth f−3 dB V
IN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1 6.5 MHz
Phase Margin ΦM V
IN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1 64 Degrees
Settling Time to 0.1% tS V
IN = 1 V step, RL = 10 kΩ, CL = 50 pF, AV = 1 4 μs
Channel Separation CS VIN = 1 V p-p, f = 10 kHz, RL = 10 kΩ, CL = 50 pF 98 dB
EMI Rejection Ratio of +IN/+IN x EMIRR VIN = 100 mV peak, f = 400 MHz 72 dB
V
IN = 100 mV peak, f = 900 MHz 80 dB
V
IN = 100 mV peak, f = 1800 MHz 83 dB
V
IN = 100 m peak, f = 2400 MHz 85 dB
NOISE PERFORMANCE
Total Harmonic Distortion Plus Noise THD + N AV = 1, f = 1 kHz, VIN = 0.6 V rms
Bandwidth (BW) = 80 kHz 0.001 %
BW = 500 kHz 0.02 %
Peak-to-Peak Voltage Noise eN p-p A
V = 100, f = 0.1 Hz to 10 Hz 117 nV p-p
Voltage Noise Density eN A
V = 100, f = 1 kHz 5.8 nV/√Hz
Peak-to-Peak Current Noise iN p-p A
V = 100, f = 0.1 Hz to 10 Hz 16 pA p-p
Current Noise Density iN A
V = 100, f = 1 kHz 0.8 pA/√Hz
ELECTRICAL CHARACTERISTICS—30 V OPERATION
VSY = 30 V, VCM = VSY/2 V, TA = 25°C, unless otherwise specified.
Table 3.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS V
CM = VSY/2 1 5 μV
−40°C ≤ TA ≤ +125°C 7.2 μV
Offset Voltage Drift TCVOS ADA4522-1, ADA4522-2 4 22 nV/°C
ADA4522-4 5.3 25 nV/°C
Input Bias Current IB 50 150 pA
−40°C ≤ TA ≤ +85°C 500 pA
−40°C ≤ TA ≤ +125°C 3 nA
Input Offset Current IOS 80 300 pA
−40°C ≤ TA ≤ +85°C 400 pA
−40°C ≤ TA ≤ +125°C 500 pA
Input Voltage Range IVR 0 28.5 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 28.5 V 145 160 dB
−40°C ≤ TA ≤ +125°C 140 dB
Large Signal Voltage Gain AV R
L = 10 kΩ, VOUT = 0.5 V to 29.5 V 140 150 dB
−40°C ≤ TA ≤ +125°C 135 dB
Input Resistance
Differential Mode RINDM 30 kΩ
Common Mode RINCM 400 GΩ
Input Capacitance
Differential Mode CINDM 7 pF
Common Mode CINCM 35 pF
OUTPUT CHARACTERISTICS
Output Voltage
High VOH R
L = 10 kΩ to VSY/2 29.87 29.89 V
−40°C ≤ TA ≤ +125°C 29.80 V
Low VOL R
L = 10 kΩ to VSY/2 110 130 mV
−40°C ≤ TA ≤ +125°C 200 mV
Continuous Output Current IOUT Dropout voltage = 1 V 14 mA
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 5 of 33
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
Short-Circuit Current Source ISC+ 21 mA
T
A = 125°C 15 mA
Short-Circuit Current Sink ISC− 33 mA
T
A = 125°C 22 mA
Closed-Loop Output Impedance ZOUT f = 1 MHz, AV = 1 4 Ω
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = 4.5 V to 55 V 150 160 dB
−40°C ≤ TA ≤ +125°C 145 dB
Supply Current per Amplifier ISY ADA4522-2, ADA4522-4, IOUT = 0 mA 830 900 μA
ADA4522-2, ADA4522-4, −40°C ≤ TA ≤ +125°C 950 μA
ADA4522-1, IOUT = 0 mA 840 910 μA
ADA4522-1, −40°C ≤ TA ≤ +125°C 970 μA
DYNAMIC PERFORMANCE
Slew Rate SR+ RL = 10 kΩ, CL = 50 pF, AV = 1 1.8 V/μs
SR− RL = 10 kΩ, CL = 50 pF, AV = 1 0.9 V/μs
Gain Bandwidth Product GBP VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 100 2.7 MHz
Unity-Gain Crossover UGC VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1 3 MHz
−3 dB Closed-Loop Bandwidth f−3 dB V
IN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1 6.5 MHz
Phase Margin ΦM V
IN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1 64 Degrees
Settling Time to 0.1% tS V
IN = 10 V step, RL = 10 kΩ, CL = 50 pF, AV = 1 12 μs
Settling Time to 0.01% tS V
IN = 10 V step, RL = 10 kΩ, CL = 50 pF, AV = 1 14 μs
Channel Separation CS VIN = 10 V p-p, f = 10 kHz, RL = 10 kΩ, CL = 50 pF 98 dB
EMI Rejection Ratio of +IN/+IN x EMIRR VIN = 100 mV peak, f = 400 MHz 72 dB
V
IN = 100 mV peak, f = 900 MHz 80 dB
V
IN = 100 mV peak, f = 1800 MHz 83 dB
V
IN = 100 mV peak, f = 2400 MHz 85 dB
NOISE PERFORMANCE
Total Harmonic Distortion Plus Noise THD + N AV = 1, f = 1 kHz, VIN = 6 V rms
BW = 80 kHz 0.0005 %
BW = 500 kHz 0.004 %
Peak-to-Peak Voltage Noise eN p-p A
V = 100, f = 0.1 Hz to 10 Hz 117 nV p-p
Voltage Noise Density eN AV = 100, f = 1 kHz 5.8 nV/√Hz
Peak-to-Peak Current Noise iN p-p A
V = 100, f = 0.1 Hz to 10 Hz 16 pA p-p
Current Noise Density iN A
V = 100, f = 1 kHz 0.8 pA/√Hz
ELECTRICAL CHARACTERISTICS—55 V OPERATION
VSY = 55 V, VCM = VSY/2 V, TA = 25°C, unless otherwise specified.
Table 4.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS V
CM = VSY/2 1.5 7 μV
−40°C ≤ TA ≤ +125°C 10 μV
Offset Voltage Drift TCVOS ADA4522-1, ADA4522-2 6 30 nV/°C
ADA4522-4 9 40 nV/°C
Input Bias Current IB 50 150 pA
−40°C ≤ TA ≤ +85°C 500 pA
−40°C ≤ TA ≤ +125°C 4.5 nA
Input Offset Current IOS 80 300 pA
−40°C ≤ TA ≤ +85°C 400 pA
ADA4522-1, ADA4522-2, −40°C ≤ TA ≤ +125°C 500 pA
ADA4522-4, −40°C ≤ TA ≤ +125°C 550 pA
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 6 of 33
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
Input Voltage Range IVR 0 53.5 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 53.5 V 140 144 dB
−40°C ≤ TA ≤ +125°C 135 dB
Large Signal Voltage Gain AV R
L = 10 kΩ, VOUT = 0.5 V to 54.5 V 135 137 dB
−40°C ≤ TA ≤ +125°C 125 dB
Input Resistance
Differential Mode RINDM 30 kΩ
Common Mode RINCM 1000 GΩ
Input Capacitance
Differential Mode CINDM 7 pF
Common Mode CINCM 35 pF
OUTPUT CHARACTERISTICS
Output Voltage
High VOH R
L = 10 kΩ to VSY/2 54.75 54.8 V
−40°C ≤ TA ≤ +125°C 54.65 V
Low VOL R
L = 10 kΩ to VSY/2 200 250 mV
−40°C ≤ TA ≤ +125°C 350 mV
Continuous Output Current IOUT Dropout voltage = 1 V 14 mA
Short-Circuit Current Source ISC+ 21 mA
T
A = 125°C 15 mA
Short-Circuit Current Sink ISC− 32 mA
T
A = 125°C 22 mA
Closed-Loop Output Impedance ZOUT f = 1 MHz, AV = 1 4 Ω
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = 4.5 V to 55 V 150 160 dB
−40°C ≤ TA ≤ +125°C 145 dB
Supply Current per Amplifier ISY ADA4522-2, ADA4522-4, IOUT = 0 mA 830 900 μA
ADA4522-2, ADA4522-4, −40°C ≤ TA ≤ +125°C 950 μA
ADA4522-1, IOUT = 0 mA 840 910 μA
ADA4522-1, −40°C ≤ TA ≤ +125°C 970 μA
DYNAMIC PERFORMANCE
Slew Rate SR+ RL = 10 kΩ, CL = 50 pF, AV = 1 1.7 V/μs
SR− RL = 10 kΩ, CL = 50 pF, AV = 1 0.8 V/μs
Gain Bandwidth Product GBP VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 100 2.7 MHz
Unity-Gain Crossover UGC VIN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1 3 MHz
−3 dB Closed-Loop Bandwidth f−3 dB V
IN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1 6.5 MHz
Phase Margin ΦM V
IN = 10 mV p-p, RL = 10 kΩ, CL = 50 pF, AV = 1 64 Degrees
Settling Time to 0.1% tS V
IN = 10 V step, RL = 10 kΩ, CL = 50 pF, AV = 1 12 μs
Settling Time to 0.01% tS V
IN = 10 V step, RL = 10 kΩ, CL = 50 pF, AV = 1 14 μs
Channel Separation CS VIN = 10 V p-p, f = 10 kHz, RL = 10 kΩ, CL = 50 pF 98 dB
EMI Rejection Ratio of +IN/+IN x EMIRR VIN = 100 mV peak, f = 400 MHz 72 dB
V
IN = 100 mV peak, f = 900 MHz 80 dB
V
IN = 100 mV peak, f = 1800 MHz 83 dB
V
IN = 100 mV peak, f = 2400 MHz 85 dB
NOISE PERFORMANCE
Total Harmonic Distortion Plus Noise THD + N AV = 1, f = 1 kHz, VIN = 10 V rms
BW = 80 kHz 0.0007 %
BW = 500 kHz 0.003 %
Peak-to-Peak Voltage Noise eN p-p A
V = 100, f = 0.1 Hz to 10 Hz 117 nV p-p
Voltage Noise Density eN A
V = 100, f = 1 kHz 5.8 nV/√Hz
Peak-to-Peak Current Noise iN p-p AV = 100, f = 0.1 Hz to 10 Hz 16 pA p-p
Current Noise Density iN A
V = 100, f = 1 kHz 0.8 pA/√Hz
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 7 of 33
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Rating
Supply Voltage 60 V
Input Voltage (V−) − 300 mV to (V+) + 300 mV
Input Current1 ±10 mA
Differential Input Voltage ±5 V
Output Short-Circuit
Duration to Ground
Indefinite
Temperature Range
Storage −65°C to +150°C
Operating −40°C to +125°C
Junction −65°C to +150°C
Lead Temperature (Soldering,
60 sec)
300°C
1 The input pins have clamp diodes to the power supply pins. Limit the input
current to ±10 mA or less whenever input signals exceed the power supply
rail by 300 mV.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst case conditions, that is, a device
soldered in a circuit board for surface-mount packages using a
standard 4-layer JEDEC board.
Table 6. Thermal Resistance
Package Type θJA θ
JC Unit
RM-8 194 38 °C/W
R-8 122 41 °C/W
RU-14 112 43 °C/W
R-14 115 36 °C/W
POWER SEQUENCING
Apply the op amp supplies simultaneously; if this is not
possible, apply the positive power supply first, before the
negative power supply.
ESD CAUTION
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 8 of 33
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NIC
1
–IN
2
+IN
3
V–
4
NIC
8
V+
7
OUT
6
NIC
5
ADA4522-1
TOP VIEW
(Not to Scale)
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
13168-101
Figure 3. ADA4522-1 Pin Configuration
Table 7. ADA4522-1 Pin Function Descriptions
Pin No. Mnemonic Description
1, 5, 8 NIC Not Internally Connected
2 −IN Inverting Input
3 +IN Noninverting Input
4 V− Negative Supply Voltage
6 OUT Output
7 V+ Positive Supply Voltage
OUT A
1
–IN A
2
+IN A
3
V–
4
V+
8
OUT B
7
–IN B
6
+IN B
5
ADA4522-2
TOP VIEW
(Not to Scale)
13168-002
Figure 4. ADA4522-2 Pin Configuration
Table 8. ADA4522-2 Pin Function Descriptions
Pin No. Mnemonic Description
1 OUT A Output, Channel A
2 −IN A Inverting Input, Channel A
3 +IN A Noninverting Input, Channel A
4 V− Negative Supply Voltage
5 +IN B Noninverting Input, Channel B
6 −IN B Inverting Input, Channel B
7 OUT B Output, Channel B
8 V+ Positive Supply Voltage
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 9 of 33
1
2
3
4
5
6
7
–IN A
+IN A
V+
OUT B
–IN B
+IN B
OUT A 14
13
12
11
10
9
8
–IN D
+IN D
V–
OUT C
–IN C
+IN C
OUT D
ADA4522-4
TOP VIEW
(Not to Scale)
13168-189
Figure 5. ADA4522-4 Pin Configuration
Table 9. ADA4522-4 Pin Function Descriptions
Pin No. Mnemonic Description
1 OUT A Output, Channel A
2 −IN A Inverting Input, Channel A
3 +IN A Noninverting Input, Channel A
4 V+ Positive Supply Voltage
5 +IN B Noninverting Input, Channel B
6 −IN B Inverting Input, Channel B
7 OUT B Output, Channel B
8 OUT C Output, Channel C
9 −IN C Inverting Input, Channel C
10 +IN C Noninverting Input, Channel C
11 V− Negative Supply Voltage
12 +IN D Noninverting Input, Channel D
13 −IN D Inverting Input, Channel D
14 OUT D Output, Channel D
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 10 of 33
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
90
0
10
20
30
40
50
60
70
80
–5 –4 –3 –2 –1 0 1 2 3 4 5
NUMBER OF AMPLIFIERS
V
OS
(µV)
V
SY
= ±2.5V
V
CM
= V
SY
/2
600 CHANNELS
MEAN = 0.10µV
STD DEV. = 0.59µV
13168-003
Figure 6. Input Offset Voltage Distribution, VSY = ±2.5 V
80
0
10
20
30
40
50
60
70
–5 –4 –3 –2 –1 0 1 2 3 4 5
NUMBER OF AMPLIFIERS
V
OS
(µV)
V
SY
= ±15V
V
CM
= V
SY
/2
600 CHANNELS
MEAN = 0.31µV
STD DEV. = 0.62µV
13168-004
Figure 7. Input Offset Voltage Distribution, VSY = ±15 V
70
0
10
20
30
40
50
60
–5 –4 –3 –2 –1 0 1 2 3 4 5
NUMBER OF AMPLIFIERS
V
OS
(µV)
V
SY
= ±27.5V
V
CM
= V
SY
/2
600 CHANNELS
MEAN = 0.69µV
STD DEV. = 0.81µV
13168-005
Figure 8. Input Offset Voltage Distribution, VSY = ±27.5 V
35
0
5
10
15
20
25
30
–30 –25 –20 –15 –10 –5 0 5 10 15 2520 30
NUMBER OF AMPLIFIERS
TCV
OS
(nV/°C)
V
SY
= ±2.5V
–40°C T
A
+125°C
160 CHANNELS
MEAN = –1.19nV/°C
STD DEV. = 1.82nV/°C
13168-006
Figure 9. Input Offset Voltage Drift Distribution, VSY = ±2.5 V
35
0
5
10
15
20
25
30
–30 –25 –20 –15 –10 –5 0 5 10 15 2520 30
NUMBER OF AMPLIFIERS
TCV
OS
(nV/°C)
V
SY
= ±15V
–40°C T
A
+125°C
160 CHANNELS
MEAN = –2.48nV/°C
STD DEV. = 2.65nV/°C
13168-007
Figure 10. Input Offset Voltage Drift Distribution, VSY = ±15 V
35
0
5
10
15
20
25
30
–30 –25 –20 –15 –10 –5 0 5 10 15 2520 30
NUMBER OF AMPLIFIERS
TCV
OS
(nV/°C)
V
SY
= ±27.5V
–40°C T
A
+125°C
160 CHANNELS
MEAN = –4.54nV/°C
STD DEV. = 4.01nV/°C
13168-008
Figure 11. Input Offset Voltage Drift Distribution, VSY = ±27.5 V
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 11 of 33
5
–5
–3
1
–1
3
01.0 3.02.0 3.5
V
OS
(µV)
V
CM
(V)
V
SY
= 5V
20 CHANNELS
13168-009
Figure 12. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = 5 V
5
–5
–3
1
–1
3
0 5.0 25.015.010.0 20.0 28.5
VOS (µV)
VCM (V)
VSY = 30V
20 CHANNELS
13168-010
Figure 13. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM),
VSY = 30 V
5
–5
–3
1
–1
3
0 5.0 45.025.015.0 35.010.0 50.030.020.0 40.0 53.5
V
OS
(µV)
V
CM
(V)
V
SY
= 55V
20 CHANNELS
13168-011
Figure 14. Input Offset Voltage (VOS) vs. Common-Mode Voltage (VCM),
VSY = 55 V
2000
–500
0
1000
500
1500
00.5 2.51.51.0 3.02.0 3.5
I
B
(pA)
V
CM
(V)
+125°C
+85°C
+25°C
–40°C
V
SY
= 5V
13168-012
Figure 15. Input Bias Current (IB) vs. Common-Mode Voltage (VCM), VSY = 5 V
3000
–500
0
2000
1000
1500
500
2500
0 5.0 25.015.010.0 20.0 28.5
I
B
(pA)
V
CM
(V)
+125°C
+85°C
+25°C
–40°C
V
SY
= 30V
13168-013
Figure 16. Input Bias Current (IB) vs. Common-Mode Voltage (VCM), VSY = 30 V
5000
–500
0
3500
1500
2500
500
4500
3000
1000
2000
4000
0 10.0 50.030.020.0 40.05.0 45.025.015.0 35.0 53.5
I
B
(pA)
V
CM
(V)
+125°C
+85°C
+25°C
–40°C
V
SY
= 55V
13168-014
Figure 17. Input Bias Current (IB) vs. Common-Mode Voltage (VCM),
VSY = 55 V
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 12 of 33
1600
–400
–200
1200
400
800
0
1000
200
600
1400
–50 0 10050–25 7525 125
I
B
(pA)
TEMPERATURE (°C)
V
SY
= ±2.5V
V
CM
= V
SY
/2
I
B
+
I
B
–
I
OS
13168-015
Figure 18. Input Bias Current (IB) vs. Temperature, VSY = ±2.5 V
2500
–500
0
1500
500
1000
2000
–50 0 10050–25 7525 125
I
B
(pA)
TEMPERATURE (°C)
V
SY
= ±15V
V
CM
= V
SY
/2
I
B
+
I
B
–
I
OS
13168-017
Figure 19. Input Bias Current (IB) vs. Temperature, VSY = ±15 V
V
SY
= ±2.5V TO ±27.5V
100k
0.1
100
1
10
1k
10k
0.001 0.1 100.01 1 100
OUTPUT VOLTAGE HIGH (V
OH
)
TO SUPPLY RAIL (mV)
I
LOAD
(mA)
13168-024
+125°C
+85°C
+25°C
–40°C
Figure 20. Output Voltage High (VOH) to Supply Rail vs. Load Current (ILOAD)
4000
–1000
–500
3000
1000
2000
0
2500
500
1500
3500
–50 0 10050–25 7525 125
I
B
(pA)
TEMPERATURE (°C)
V
SY
= ±27.5V
V
CM
= V
SY
/2
I
B
+
I
B
–
I
OS
13168-016
Figure 21. Input Bias Current (IB) vs. Temperature, VSY = ±27.5 V
1.0
0
0.4
0.2
0.6
0.8
0 5 10 15 20 25 30 35 40 45 50 55 60
I
SY
PER AMPLIFIER (mA)
V
SY
(V)
+125°C
+85°C
+25°C
–40°C
13168-025
Figure 22. Supply Current (ISY) per Amplifier vs. Supply Voltage (VSY)
100k
0.1
100
1
10
1k
10k
0.001 0.1 100.01 1 100
I
LOAD
(mA)
V
SY
= ±2.5V TO ±27.5V
13168-027
+125°C
+85°C
+25°C
–40°C
OUTPUT VOLTAGE LOW (V
OL
)
TO SUPPLY RAIL (mV)
Figure 23. Output Voltage Low (VOL) to Supply Rail vs. Load Current (ILOAD)
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 13 of 33
150
0
25
100
50
75
125
–50 0 12510050–25 7525 150
TEMPERATURE (°C)
R
L
= 2k
V
SY
= ±2.5V
R
L
= 10k
13168-018
OUTPUT VOLTAGE HIGH (V
OH
)
TO SUPPLY RAIL (mV)
Figure 24. Output Voltage High (VOH) to Supply Rail vs. Temperature,
VSY = ±2.5 V
200
0
25
100
50
75
125
150
175
–50 0 12510050–25 7525 150
TEMPERATURE (°C)
R
L
= 10k
V
SY
= ±15V
R
L
= 100k
13168-019
OUTPUT VOLTAGE HIGH (V
OH
)
TO SUPPLY RAIL (mV)
Figure 25. Output Voltage High (VOH) to Supply Rail vs. Temperature, VSY = ±15 V
350
0
50
200
100
150
250
300
–50 0 12510050–25 7525 150
TEMPERATURE (°C)
V
SY
= ±27.5V
R
L
= 100k
R
L
= 10k
13168-020
OUTPUT VOLTAGE HIGH (V
OH
)
TO SUPPLY RAIL (mV)
Figure 26. Output Voltage High (VOH) to Supply Rail vs. Temperature,
VSY = ±27.5 V
150
0
25
100
50
75
125
–50 0 12510050–25 7525 150
TEMPERATURE (°C)
V
SY
= ±2.5V
R
L
= 10k
R
L
= 2k
13168-021
OUTPUT VOLTAGE LOW (V
OL
)
TO SUPPLY RAIL (mV)
Figure 27. Output Voltage Low (VOL) to Supply Rail vs. Temperature,
VSY = ±2.5 V
200
0
25
100
50
75
125
150
175
–50 0 12510050–25 7525 150
TEMPERATURE (°C)
V
SY
= ±15V
R
L
= 100k
R
L
= 10k
13168-022
OUTPUT VOLTAGE LOW (V
OL
)
TO SUPPLY RAIL (mV)
Figure 28. Output Voltage Low (VOL) to Supply Rail vs. Temperature, VSY = ±15 V
350
0
50
200
100
150
250
300
–50 0 12510050–25 7525 150
TEMPERATURE (°C)
V
SY
= ±27.5V
R
L
= 100k
R
L
= 10k
13168-023
OUTPUT VOLTAGE LOW (V
OL
)
TO SUPPLY RAIL (mV)
Figure 29. Output Voltage Low (VOL) to Supply Rail vs. Temperature,
VSY = ±27.5 V
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 14 of 33
140
0
40
20
80
120
60
100
10 100 1k 10k 100k 1M 10M
CMRR (dB)
FREQUENCY (Hz)
V
SY
= ±2.5V TO ±27.5V
13168-030
Figure 30. CMRR vs. Frequency
1k
0.001
0.01
1
100
0.1
10
100 1k 10k 100k 1M 10M 100M
OUTPUT IMPEDANCE ()
FREQUENCY (Hz)
A
V
= 100
A
V
= 10
A
V
= 1
13168-031
V
SY
= ±2.5V TO ±27.5V
Figure 31. Closed-Loop Output Impedance vs. Frequency
120
–40
20
0
–20
60
100
40
80
135
–45
0
45
90
100 1k 10k 100k 1M 10M
OPEN-LOOP GAIN (dB)
PHASE MARGIN (Degrees)
FREQUENCY (Hz)
C
L
= 50pF
C
L
= 100pF
C
L
= 50pF
C
L
= 100pF
13168-026
PHASE
GAIN
V
SY
= ±2.5V TO ±27.5V
R
L
= 10k
Figure 32. Open-Loop Gain and Phase Margin vs. Frequency
140
–20
0
40
20
80
120
60
100
100 1k 10k 100k 1M 10M 100M
PSRR (dB)
FREQUENCY (Hz)
PSRR+
PSRR–
V
SY
= ±2.5V TO ±27.5V
13168-032
Figure 33. PSRR vs. Frequency
0.840
0.805
0.815
0.810
0.825
0.835
0.820
0.830
–50 –25 0 25 50 75 100 125 150
I
SY
PER AMPLIFIER (mA)
TEMPERATURE (°C)
5V
30V
55V
13168-028
Figure 34. Supply Current (ISY) per Amplifier vs. Temperature
13168-133
–20
–10
0
10
20
30
40
50
60
100 1k 10k 100k 1M 10M
CLOSED-LOOP GAIN (dB)
FREQUENCY (Hz)
A
V
= 10
A
V
= 1
V
SY
= ±2.5V TO ±27.5V
A
V
= 100
Figure 35. Closed-Loop Gain vs. Frequency
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 15 of 33
2.0
–2.0
–1.0
–1.5
0
1.5
1.0
–0.5
0.5
VOLTAGE (V)
TIME (4µs/DIV)
V
SY
= ±2.5V
V
IN
= 1.5V p-p
A
V
= 1
R
L
= 10k
C
L
= 100pF
R
S_IN+
= 100
R
S_IN–
= 100
13168-034
Figure 36. Large Signal Transient Response, VSY = ±2.5 V
20
15
–20
–15
–10
–5
0
5
10
VOLTAGE (V)
TIME (10µs/DIV)
V
SY
= ±15V
V
IN
= 15V p-p
A
V
= 1
R
L
= 10k
C
L
= 100pF
R
S_IN+
= 100
R
S_IN–
= 100
13168-035
Figure 37. Large Signal Transient Response, VSY = ±15 V
30
–30
–20
–10
0
10
20
VOLTAGE (V)
TIME (10µs/DIV)
VSY = ±27.5V
VIN = 50V p-p
AV = 1
RL = 10k
CL = 100pF
RS_IN+ = 100
RS_IN– = 100
13168-036
Figure 38. Large Signal Transient Response, VSY = ±27.5 V
0.08
–0.08
–0.06
–0.04
–0.02
0
0.02
0.04
0.06
VOLTAGE (V)
TIME (400ns/DIV)
VSY = ±2.5V
VIN = 100mV p-p
AV = 1
RL = 10k
CL = 100pF
13168-037
Figure 39. Small Signal Transient Response, VSY = ±2.5 V
0.08
–0.08
–0.06
–0.04
–0.02
0
0.02
0.04
0.06
VOLTAGE (V)
TIME (400ns/DIV)
VSY = ±15V
VIN = 100mV p-p
AV = 1
RL = 10k
CL = 100pF
13168-038
Figure 40. Small Signal Transient Response, VSY = ±15 V
0.08
–0.08
–0.06
–0.04
–0.02
0
0.02
0.04
0.06
VOLTAGE (V)
TIME (400ns/DIV)
VSY = ±27.5V
VIN = 100mV p-p
AV = 1
RL = 10k
CL = 100pF
13168-039
Figure 41. Small Signal Transient Response, VSY = ±27.5 V
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 16 of 33
50
45
40
35
30
25
20
15
10
5
0
10 100 1000
OVERSHOOT (%)
LOAD CAPACITANCE (pF)
OS+
V
SY
= ±2.5V
R
L
= 10k
A
V
= 1
V
IN
= 100mV p-p
OS–
13168-040
Figure 42. Small Signal Overshoot vs. Load Capacitance, VSY = ±2.5 V
50
45
40
35
30
25
20
15
10
5
0
10 100 1000
OVERSHOOT (%)
LOAD CAPACITANCE (pF)
OS+
V
SY
= ±15V
R
L
= 10k
A
V
= 1
V
IN
= 100mV p-p
OS–
13168-041
Figure 43. Small Signal Overshoot vs. Load Capacitance, VSY = ±15 V
50
45
40
35
30
25
20
15
10
5
0
10 100 1000
OVERSHOOT (%)
LOAD CAPACITANCE (pF)
OS+
V
SY
= ±27.5V
R
L
= 10k
A
V
= 1
V
IN
= 100mV p-p
OS–
13168-042
Figure 44. Small Signal Overshoot vs. Load Capacitance, VSY = ±27.5 V
0
–140
–120
–100
–80
–60
–40
–20
0.01 1 1000.1 10
CHANNEL SEPARATION (dB)
FREQUENCY (kHz)
V
SY
= ±2.5V
A
V
= –10
R
L
= 10k
V
IN
= 0.5V p-p
V
IN
= 1V p-p
V
IN
= 2V p-p
13168-043
Figure 45. Channel Separation vs. Frequency, VSY = ±2.5 V
0
–140
–120
–100
–80
–60
–40
–20
0.01 1 1000.1 10
CHANNEL SEPARATION (dB)
FREQUENCY (kHz)
V
SY
= ±15V
A
V
= –10
R
L
= 10k
V
IN
= 5V p-p
V
IN
= 10V p-p
V
IN
= 25V p-p
13168-044
Figure 46. Channel Separation vs. Frequency, VSY = ±15 V
0
–140
–120
–100
–80
–60
–40
–20
0.01 1 1000.1 10
CHANNEL SEPARATION (dB)
FREQUENCY (kHz)
V
SY
= ±27.5V
A
V
= –10
R
L
= 10k
V
IN
= 10V p-p
V
IN
= 30V p-p
V
IN
= 50V p-p
13168-045
Figure 47. Channel Separation vs. Frequency, VSY = ±27.5 V
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 17 of 33
100
10
1
0.1
0.01
0.001
0.0001
0.001 10.10.01
THD + N (%)
AMPLITUDE (V rms)
V
SY
= ±2.5V
A
V
= 1
FREQUENCY = 1kHz
R
L
= 10k
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
13168-050
Figure 48. THD + N vs. Amplitude, VSY = ±2.5 V
100
10
1
0.1
0.01
0.001
0.0001
0.001 1010.10.01
THD + N (%)
AMPLITUDE (V rms)
V
SY
= ±15V
A
V
= 1
FREQUENCY = 1kHz
R
L
= 10k
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
13168-051
Figure 49. THD + N vs. Amplitude, VSY = ±15 V
100
10
1
0.1
0.01
0.001
0.0001
0.001 1010.10.01
THD + N (%)
AMPLITUDE (V rms)
V
SY
= ±27.5V
A
V
= 1
FREQUENCY = 1kHz
R
L
= 10k
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
13168-052
Figure 50. THD + N vs. Amplitude, VSY = ±27.5 V
1
0.1
0.01
0.001
0.0001
10 100k10k1k100
THD + N (%)
FREQUENCY (Hz)
V
SY
= ±2.5V
A
V
= 1
R
L
= 10k
V
IN
= 0.6V rms
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
13168-053
Figure 51. THD + N vs. Frequency, VSY = ±2.5 V
1
0.1
0.01
0.001
0.0001
10 100k10k1k100
THD + N (%)
FREQUENCY (Hz)
V
SY
= ±15V
A
V
= 1
R
L
= 10k
V
IN
= 6V rms
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
13168-054
Figure 52. THD + N vs. Frequency, VSY = ±15 V
1
0.1
0.01
0.001
0.0001
10 100k10k1k100
THD + N (%)
FREQUENCY (Hz)
V
SY
= ±27.5V
A
V
= 1
R
L
= 10k
V
IN
= 10V rms
80kHz LOW-PASS FILTER
500kHz LOW-PASS FILTER
13168-055
Figure 53. THD + N vs. Frequency, VSY = ±27.5 V
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 18 of 33
0.2
–0.2
–0.6
–1.0
–1.4
0
–0.4
–0.8
–1.2
7
5
3
1
–1
6
4
2
0
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TIME (1µs/DIV)
V
SY
= ±2.5V
V
IN
= 350mV p-p
R
L
= 10k
C
L
= 100pF
A
V
= –10
V
IN
V
OUT
13168-056
Figure 54. Positive Overload Recovery, VSY = ±2.5 V
2
–2
–3
–10
–14
0
–4
–8
–12
35
25
15
5
–5
30
20
10
0
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TIME (4µs/DIV)
VSY = ±15V
VIN = 2V p-p
RL = 10k
CL = 100pF
AV = –10
VIN
VOUT
13168-057
Figure 55. Positive Overload Recovery, VSY = ±15 V
2
–2
–3
–10
–14
0
–4
–8
–12
70
50
30
10
–10
60
40
20
0
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TIME (10µs/DIV)
VSY = ±27.5V
VIN = 4V p-p
RL = 10k
CL = 100pF
AV = –10
VIN
VOUT
13168-058
Figure 56. Positive Overload Recovery, VSY = ±27.5 V
0.4
0
–0.4
–0.8
–1.2
0.2
–0.2
–0.6
–1.0
5
3
1
–1
–3
4
2
0
–2
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TIME (1µs/DIV)
VSY = ±2.5V
VIN = 350mV p-p
RL = 10k
CL = 100pF
AV = –10
VIN
VOUT
13168-059
Figure 57. Negative Overload Recovery, VSY = ±2.5 V
6
2
–2
–6
–10
4
0
–4
–8
20
10
0
–10
–20
15
5
–5
–15
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TIME (2µs/DIV)
V
SY
= ±15V
V
IN
= 2V p-p
R
L
= 10k
C
L
= 100pF
A
V
= –10
V
IN
V
OUT
13168-060
Figure 58. Negative Overload Recovery, VSY = ±15 V
6
2
–2
–6
–10
4
0
–4
–8
40
20
0
–20
–40
30
10
–10
–30
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TIME (4µs/DIV)
V
SY
= ±27.5V
V
IN
= 4V p-p
R
L
= 10k
C
L
= 100pF
A
V
= –10
V
IN
V
OUT
13168-061
Figure 59. Negative Overload Recovery, VSY = ±27.5 V
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 19 of 33
100
10
1
10 100k 100M10k 10M1k100 1M
VOLTAGE NOISE DENSITY (nV/Hz)
FREQUENCY (Hz)
V
SY
= ±2.5V
A
V
= 1
13168-062
Figure 60. Voltage Noise Density vs. Frequency, VSY = ±2.5 V
100
10
1
10 100k 100M10k 10M1k100 1M
VOLTAGE NOISE DENSITY (nV/Hz)
FREQUENCY (Hz)
V
SY
= ±15V
A
V
= 1
13168-063
Figure 61. Voltage Noise Density vs. Frequency, VSY = ±15 V
100
10
1
10 100k 100M10k 10M1k100 1M
VOLTAGE NOISE DENSITY (nV/Hz)
FREQUENCY (Hz)
V
SY
= ±27.5V
A
V
= 1
13168-064
Figure 62. Voltage Noise Density vs. Frequency, VSY = ±27.5 V
100
10
1
0.1
10 100k 1M10k1k100
VOLTAGE NOISE DENSITY (nV/Hz)
FREQUENCY (Hz)
A
V
= 100 5V
30V
55V
13168-065
Figure 63. Voltage Noise Density vs. Frequency, AV = 100
INPUT REFERRED VOLTAGE (nV)
TIME (1s/DIV)
V
SY
= ±15V AND ±27.5V
A
V
= 100
PEAK-TO-PEAK NOISE = 117nV p-p
13168-066
–100
–75
–50
–25
0
25
50
75
100
Figure 64. 0.1 Hz to 10 Hz Noise
10
1
0.1
10 100k10k1k100
CURRENT NOISE DENSITY (pA/Hz)
FREQUENCY (Hz)
RS = 100k
AV = 100
VSY = ±2.5V
VSY = ±15V
VSY = ±27.5V
13168-067
Figure 65. Current Noise Density vs. Frequency
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 20 of 33
INPUT VOLTAGE (1V/DIV)
TIME (2µs/DIV)
V
SY
= ±2.5V
R
L
= 10k
C
L
= 50pF
DUT A
V
= –1
INPUT
OUTPUT
+10mV
0
–10mV
+1V
0
–1V
ERROR BAND
POST GAIN = 10
13168-046
Figure 66. Negative Settling Time to 0.1%, VSY = ±2.5 V
INPUT VOLTAGE (5V/DIV)
TIME (4µs/DIV)
V
SY
= ±15V AND ±27.5V
R
L
= 10k
C
L
= 50pF
DUT A
V
= –1
INPUT
OUTPUT
+50mV
0
–50mV
ERROR BAND
POST GAIN = 10
13168-047
+5V
0
–5V
Figure 67. Negative Settling Time to 0.1%, VSY = ±15 V and ±27.5 V
13168-166
0
10
20
30
40
50
60
100 1k 10k 100k 1M 10M
OUTPUT VOLTAGE SWING (V p-p)
FREQUENCY (Hz)
R
L
= 10k
A
V
= –1
V
IN
= ±26V
V
SY
= ±27.5V
V
IN
= ±13.5V
V
SY
= ±15V
V
IN
= ±1V
V
SY
= ±2.5V
Figure 68. Output Voltage Swing vs. Frequency
INPUT VOLTAGE (1V/DIV)
TIME (2µs/DIV)
V
SY
= ±2.5V
R
L
= 10k
C
L
= 50pF
DUT A
V
= –1
INPUT
OUTPUT
+10mV
0
–10mV
ERROR BAND
POST GAIN = 10
13168-048
+1V
0
–1V
Figure 69. Positive Settling Time to 0.1%, VSY = ±2.5 V
INPUT VOLTAGE (5V/DIV)
TIME (4µs/DIV)
V
SY
= ±15V AND ±27.5V
R
L
= 10k
C
L
= 50pF
DUT A
V
= –1
INPUT
OUTPUT
+50mV
0
–50mV
ERROR BAND
POST GAIN = 10
13168-049
+5V
0
–5V
Figure 70. Positive Settling Time to 0.1%, VSY = ±15 V and ±27.5 V
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 21 of 33
THEORY OF OPERATION
The ADA4522-1/ADA4522-2/ADA4522-4 are single, dual, and
quad, ultralow noise, high voltage, zero drift, rail-to-rail output
operational amplifiers. They feature a chopping technique that
offers an ultralow input offset voltage of 5 μV and an input
offset voltage drift of 22 nV/°C maximum for the ADA4522-1
and ADA4522-2 and 25 nV/°C maximum for the ADA4522-4.
Offset voltage errors due to common-mode voltage swings and
power supply variations are also corrected by the chopping
technique, resulting in a superb typical CMRR figure of 160 dB
and a PSRR figure of 160 dB at a 30 V supply voltage.
The ADA4522-1/ADA4522-2/ADA4522-4 have wide operating
voltages from ±2.25 V (or 4.5 V) to ±27.5 V (or 55 V). The
devices are single supply amplifiers, where their input voltage
range includes the lower supply rail. They also offer low voltage
noise density of 5.8 nV/√Hz (at f = 1 kHz, AV = 100) and reduced
1/f noise component. These features are ideal for the amplifica-
tion of low level signals in high precision applications. A few
examples of such applications are weigh scales, high precision
current sensing, high voltage buffers, and signal conditioning
for temperature sensors, among others.
Figure 71 shows the ADA4522-1/ADA4522-2/ADA4522-4
architecture block diagram. The architecture consists of an
input EMI filter and clamp circuitry, three gain stages (Gm1, Gm2,
and Gm3), input and output chopping networks (CHOPIN and
CHOPOUT), a clock generator, offset and ripple correction loop
circuitry, frequency compensation capacitors (C1, C2, and C3),
and thermal shutdown circuitry.
An EMI filter and clamp circuit is implemented at the input
front end to protect the internal circuitry against electrostatic
discharge (ESD) stresses and high voltage transients. The ability
of the amplifier to reject EMI is explained in detail in the EMI
Rejection Ratio section.
CHOPIN and CHOPOUT are controlled by a clock generator and
operate at 4.8 MHz. The input baseband signal is initially
modulated by CHOPIN. Next, CHOPOUT demodulates the input
signal and modulates the millivolt level input offset voltage and
1/f noise of the input transconductance amplifier, Gm1, to the
chopping frequency at 4.8 MHz. The chopping networks remove
the low frequency errors, but, in return, the networks introduce
chopping artifacts at the chopping frequency. Therefore, a offset
and ripple correction loop, operating at 800 kHz, is used. This
frequency is the switching frequency of the amplifier. This
circuitry reduces chopping artifacts, allowing the ADA4522-1/
ADA4522-2/ADA4522-4 to have a high chopping frequency
with minimal artifacts.
The thermal shutdown circuit shuts down the circuit when
the die is overheated (see the Thermal Shutdown section for
more information).
13168-068
G
m1
G
m2
G
m3
EMI
FILTER
AND
CLAMP
THERMAL
SHUTDOWN
OFFSET
AND RIPPLE
CORRECTION
LOOP
+
IN x
–
IN x
CHOP
IN
CHOP
OUT
C3
OUT
C2
C1
4.8M Hz CLO CKS
800kHz CLOCKS
CLOCK
GENERATOR
NOTES
1. THE I N PUTS ARE + IN x/–IN x O N THE ADA4522-2 AND ADA4522-4,
AND +IN/ –IN O N THE ADA4522-1.
2. THE OUTP UT IS OUT ON TH E ADA4522-1 AND OUT x ON T HE
ADA4522-2 AND ADA4522-4.
Figure 71. ADA4522-1/ADA4522-2/ADA4522-4 Architecture Block Diagram
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 22 of 33
ON-CHIP INPUT EMI FILTER AND CLAMP CIRCUIT
Figure 72 shows the input EMI filter and clamp circuit. The
ADA4522-1/ADA4522-2/ADA4522-4 have internal ESD
protection diodes (D1, D2, D3, and D4) that are connected
between the inputs and each supply rail. These diodes protect
the input transistors in the event of electrostatic discharge and
are reverse biased during normal operation. This protection
scheme allows voltages as high as approximately 300 mV
beyond the rails to be applied at the input of either terminal
without causing permanent damage. See Table 5 in the Absolute
Maximum Ratings section for more information.
The EMI filter is composed of two 200 Ω input series resistors
(RS1 and RS2), two common-mode capacitors (CCM1 and CCM2),
and a differential capacitor (CDM). These RC networks set the
−3 dB low-pass cutoff frequencies at 50 MHz for common-
mode signals, and at 33 MHz for differential signals. After the
EMI filter, back to back diodes (D5 and D6) are added to protect
internal circuit devices from high voltage input transients. Each
diode has about 1 V of forward turn on voltage. See the Large
Signal Transient Response section for more information on the
effect of high voltage input transient on the ADA4522-1/
ADA4522-2/ADA4522-4.
As specified in the Absolute Maximum Ratings section (see
Table 5), the maximum input differential voltage is limited to
±5 V. If more than ±5 V is applied, a continuous current larger
than ±10 mA flows through one of the back to back diodes.
This current compromises long-term reliability and can cause
permanent damage to the device.
V
+
+
IN x
–
IN x
V–
R
S1
200
R
S2
200
D1
D2 D5 D6
D4
D3 C
CM1
C
DM
C
CM2
13168-069
NOTES
1. THE INPUTS ARE +IN x/–IN x ON THE ADA4522-2
AND ADA4522-4, AND +IN/–IN ON THE ADA4522-1.
Figure 72. Input EMI Filter and Clamp Circuit
THERMAL SHUTDOWN
The ADA4522-1/ADA4522-2/ADA4522-4 have internal
thermal shutdown circuitry for each channel of the amplifier. The
thermal shutdown circuitry prevents internal devices from being
damaged by an overheat condition in the die. Overheating can
occur due to a high ambient temperature, a high supply voltage,
and/or high output currents. As specified in Table 5, take care to
maintain the junction temperature below 150°C.
Two conditions affect junction temperature (TJ): the total power
dissipation of the device (PD) and the ambient temperature
surrounding the package (TA). Use the following equation to
estimate the approximate junction temperature:
TJ = PD × θJA + TA (1)
where θJA is the thermal resistance between the die and the
ambient environment, as shown in Table 6.
The total power dissipation is the sum of quiescent power of the
device and the power required to drive a load for all channels of
an amplifier. The power dissipation per amplifier (PD_PER_AMP)
for sourcing a load is shown in Equation 2.
PD_PER_AMP = (VSY+ − VSY−) × ISY_PER_AMP + IOUT × (VSY+ − VOUT) (2)
When sinking current, replace (VSY+ − VOUT) in Equation 2 with
(VOUT − VSY−).
Also, take note to include the power dissipation of all channels
of the amplifier when calculating the total power dissipation for
the ADA4522-1/ADA4522-2/ADA4522-4.
The thermal shutdown circuitry does not guarantee the device
to be free of permanent damage if the junction temperature
exceeds 150°C. However, the internal thermal shutdown function
may help avoid permanent damage or reduce the degree of
damage. Each amplifier channel has thermal shutdown circuitry,
composed of a temperature sensor with hysteresis.
As soon as the junction temperature reaches 190°C, the thermal
shutdown circuitry shuts down the amplifier. Note that either
one of the two thermal shutdown circuitries is activated; this
activation disables the channel. When the amplifier is disabled,
the output becomes open state and the quiescent current of the
channel decreases to 0.1 mA. When the junction temperature
cools down to 160°C, the thermal shutdown circuitry enables
the amplifier and the quiescent current increases to its typical
value.
When overheating in the die is caused by an undesirable excess
amount of output current, the thermal shutdown circuit repeats
its function. The junction temperature keeps increasing until it
reaches 190°C and one of the channels is disabled. Then, the
junction temperature cools down until it reaches 160°C, and
the channel is enabled again. The process then repeats.
INPUT PROTECTION
When either input of the ADA4522-1/ADA4522-2/ADA4522-4
exceeds one of the supply rails by more than 300 mV, the ESD
diodes mentioned in the On-Chip Input EMI Filter and Clamp
Circuit section become forward-biased and large amounts of
current begin to flow through them. Without current limiting,
this excessive fault current causes permanent damage to the
device. If the inputs are expected to be subject to overvoltage
conditions, insert a resistor in series with each input to limit the
input current to ±10 mA maximum. However, consider the
resistor thermal noise effect on the entire circuit.
At a ±15 V supply voltage, the broadband voltage noise of the
ADA4522-1/ADA4522-2/ADA4522-4 is approximately
5.8 nV/√Hz (at unity gain), and a 1 kΩ resistor has a thermal
noise of 4 nV/√Hz. Adding a 1 kΩ resistor increases the total
noise to 7 nV/√Hz.
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 23 of 33
SINGLE-SUPPLY AND RAIL-TO-RAIL OUTPUT
The ADA4522-1/ADA4522-2/ADA4522-4 are single-supply
amplifiers, where their input voltage range includes the lower
supply rail. This feature is ideal for applications where the input
common-mode voltage is at the lower supply rail, for example,
ground sensing. Conversely, the amplifier output is rail to rail.
Figure 73 shows the input and output waveforms of the
ADA4522-1/ADA4522-2/ADA4522-4 configured as a unity-
gain buffer with a supply voltage of ±15 V. With an input
voltage of ±15 V, the low output voltage tracks the input voltage,
whereas the high output swing clamps/distorts when the input
goes out of the input voltage range (−15 V ≤ IVR ≤ +13.5 V).
However, the device does not exhibit phase reversal.
20
0
–20
10
–10
20
0
–20
10
–10
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TIME (400s/DIV)
V
SY
= ±15V
A
V
= 1
V
IN
V
OUT
13168-070
Figure 73. Input and Output Waveforms, No Phase Reversal
LARGE SIGNAL TRANSIENT RESPONSE
When the ADA4522-1/ADA4522-2/ADA4522-4 are configured
in a closed-loop configuration with a large input transient (for
example, a step input voltage), the internal back to back diodes may
turn on. Consider a case where the amplifier is in unity-gain
configuration with a step input waveform. This case is shown in
Figure 74.
The noninverting input is driven by an input signal source and
the inverting input is driven by the output of the amplifier. The
maximum amplifier output current depends on the input step
function and the external source resistance at the input
terminals of the amplifier.
Case 1
If the external source resistance is low (for example, 100 Ω in
Figure 75) or if the input step function is large, the maximum
amplifier output current is limited to the output short-circuit
current as specified in the Specifications section. The maximum
differential voltage between the input signal and the amplifier
output is then limited by the maximum amplifier output current
multiplied by the total input resistance (internal and external)
and the turn-on voltage of the back to back diode (see Figure 72
for the input EMI filter and clamp circuit architecture).
When the noninverting input voltage changes with a step signal,
the inverting input voltage (and, therefore, the output voltage)
follows the change quickly until it reaches the maximum differen-
tial voltage between the input signal and amplifier output possible.
The inverting input voltage then starts slewing with the slew
rate specified in the Specifications section until it reaches its
desired output. Therefore, as seen in Figure 74, there are two
distinctive sections of the rising and falling edge of the output
waveform. With this test condition, the amount and duration of
the input/output current is limited and, therefore, does not
damage the amplifier.
30
–30
–20
–10
0
10
20
VOLTAGE (V)
TIME (10µs/DIV)
V
SY
= ±27.5V
13168-071
Figure 74. Large Signal Transient Response Example
RS_IN–
100
RS_IN+
100
VSY+
VSY–
ADA4522-1/
ADA4522-2/
ADA4522-4
100pF 10k
VOUT
V
IN = 50V p-p
13168-100
Figure 75. Circuit Diagram for Large Signal Transient Response
Case 2
If the external source resistance is high or if the input step function
is small, the maximum output current is limited to the instantane-
ous difference between the input signal and amplifier output
voltage (which is the change in the step function) divided by the
source resistance. This maximum output current is less than the
amplifier output short-circuit current. The maximum differential
voltage between the input signal and the amplifier output is
then equal to the step function. The output voltage slews until it
reaches its desired output.
Therefore, if desired, reduce the input current by adding a larger
external resistor between the signal source and the noninverting
input. Similarly, to reduce output current, add an external resistor
to the feedback loop between the inverting input and output. This
large signal transient response issue is typically not a problem
when the amplifier is configured in closed-loop gain, where the
input signal source is usually much smaller and the gain and
feedback resistors limit the current.
Back to back diodes are also implemented in many other
amplifiers; these amplifiers show similar slewing behavior.
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 24 of 33
NOISE CONSIDERATIONS
1/f Noise
1/f noise, also known as pink noise or flicker noise, is inherent
in semiconductor devices and increases as frequency decreases.
At a low frequency, 1/f noise is a major noise contributor and
causes a significant output voltage offset when amplified by the
noise gain of the circuit. However, because the low frequency
1/f noise appears as a slow varying offset to the ADA4522-1/
ADA4522-2/ADA4522-4, it is effectively reduced by the chopping
technique. This technique allows the ADA4522-1/ADA4522-2/
ADA4522-4 to have a much lower noise at dc and low frequency in
comparison to standard low noise amplifiers that are susceptible
to 1/f noise. Figure 64 shows the 0.1 Hz to 10 Hz noise to be only
117 nV p-p of noise.
Source Resistance
The ADA4522-1/ADA4522-2/ADA4522-4 are some of the
lowest noise high voltage zero drift amplifiers with 5.8 nV/√Hz
of voltage noise density at 1 kHz (AV = 100). Therefore, it is
important to consider the input source resistance of choice to
maintain a total low noise. The total input referred broadband
noise (eN total) from any amplifier is primarily a function of
three types of noise: input voltage noise, input current noise,
and thermal (Johnson) noise from the external resistors.
These uncorrelated noise sources can be summed up in a root
sum squared (rss) manner by using the following equation:
eN total = (eN2 + 4 kTRS + (iN × RS)2)1/2
where:
eN is the input voltage noise density of the amplifier (V/√Hz).
k is Boltzmann’s constant (1.38 × 10−23 J/K).
T is the temperature in Kelvin (K).
RS is the total input source resistance (Ω).
iN is the input current noise density of the amplifier (A/√Hz).
The total equivalent rms noise over a specific bandwidth is
expressed as
eN RMS = eN total BW
where BW is the bandwidth in hertz.
This analysis is valid for broadband noise calculation up to a
decade before the switching frequency. If the bandwidth of
concern includes the switching frequency, more complicated
calculations must be made to include the effect of the increase
in noise at the switching frequency.
With a low source resistance of RS < 1 kΩ, the voltage noise of
the amplifier dominates. As the source resistance increases, the
thermal noise of RS dominates. As the source resistance further
increases, where RS > 50 kΩ, the current noise becomes the
main contributor of the total input noise.
Residual Ripple
As shown in Figure 60, Figure 61, and Figure 62, the ADA4522-1/
ADA4522-2/ADA4522-4 have a flat noise spectrum density at
lower frequencies and exhibits spectrum density bumps and peaks
at higher frequencies.
The largest noise bump is centered at 6 MHz; this bump is due
to the decrease in the input gain at higher frequencies. This
decrease is a typical phenomenon and can also be seen in other
amplifiers. In addition to the noise bump, a sharp peak due to the
chopping networks is seen at 4.8 MHz. However, this magnitude is
significantly reduced by the offset and ripple correction loop. Its
magnitude may be different with different amplifier units or with
different circuitries around the amplifier. This peak can potentially
be hidden by the noise bump and, therefore, may not be detected.
The offset and ripple correction loop, designed to reduce the
4.8 MHz switching artifact, also creates a noise bump centered
at 800 kHz and a noise peak on top of this noise bump. Although
the magnitude of the bump is mostly constant, the magnitude of
the 800 kHz peak is different from unit to unit. Some units may
not exhibit the 800 kHz noise peak; however, for other units,
peaks occur at multiple integrals of 800 kHz, such as 1.6 MHz or
2.4 MHz.
These noise peaks, albeit small in magnitude, can be significant
when the amplifier has a closed-loop frequency that is higher
than the chopping frequency. To suppress the noise spike to a
desired level, either configure the amplifier in a high gain
configuration or apply a post filter at the output of the amplifier.
Figure 76 shows the voltage noise density of the ADA4522-1/
ADA4522-2/ADA4522-4 in various gain configurations. Note that
the higher the gain, the lower the available bandwidth is. The
earlier bandwidth roll-off effectively filters out the higher noise
spectrum.
100
10
1
100 1k 10k 100k 1M 10M 100M
VOLTAGE NOISE DENSITY (nV/Hz)
FREQUENCY (Hz)
V
SY
= ±15V
A
V
= 1
A
V
= 10
A
V
= 100
13168-072
Figure 76. Voltage Noise Density with Various Gains
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 25 of 33
Figure 77 shows the voltage noise density of the ADA4522-1/
ADA4522-2/ADA4522-4 without and with post filters at different
frequencies. The post filter serves to roll off the bandwidth
before the switching frequency. In this example, the noise peak
at 800 kHz is about 38 nV/√Hz. With a post filter at 80 kHz, the
noise peak is reduced to 4.1 nV/√Hz. With a post filter at 8 kHz,
the noise peak is lower than the noise floor and cannot be detected.
100
10
1
1k 10k 100k 1M 10M 100M
VOLTAGE NOISE DENSITY (nV/Hz)
FREQUENCY (Hz)
A
V
= 1
A
V
= 1 (POST FILTER AT 80kHz)
A
V
= 1 (POST FILTER AT 8kHz)
13168-073
Figure 77. Voltage Noise Density with Post Filters
Current Noise Density
Figure 78 shows the current noise density of the ADA4522-1/
ADA4522-2/ADA4522-4 at unity gain. At 1 kHz, the current
noise density is about 1.3 pA/√Hz. The current noise density is
determined by measuring the voltage noise due to current noise
flowing through a resistor. Due to the low current noise density
of the amplifier, the voltage noise is usually measured with a
high value resistor; in this case, a 100 kΩ source resistor is used.
However, the source resistor interacts with the input capaci-
tance of the amplifier and board, causing the bandwidth to roll
off. Note that Figure 78 shows the current noise density rolling
off much earlier than the unity-gain bandwidth; this roll-off is
expected.
10
1
0.1
10 100 1k 10k 100k
CURRENT NOISE DENSITY (pA/Hz)
FREQUENCY (Hz)
VSY = ±2.5V
VSY = ±15V
VSY = ±27.5V
RS = 100k
AV = 1
13168-074
Figure 78. Current Noise Density at Gain = 1
EMI REJECTION RATIO
Circuit performance is often adversely affected by high fre-
quency EMI. When the signal strength is low and transmission
lines are long, an op amp must accurately amplify the input
signals. However, all op amp pins—the noninverting input,
inverting input, positive supply, negative supply, and output
pins—are susceptible to EMI signals. These high frequency
signals are coupled into an op amp by various means, such as
conduction, near field radiation, or far field radiation. For example,
wires and printed circuit board (PCB) traces can act as antennas
and pick up high frequency EMI signals.
Amplifiers do not amplify EMI or RF signals due to their rela-
tively low bandwidth. However, due to the nonlinearities of the
input devices, op amps can rectify these out of band signals. When
these high frequency signals are rectified, they appear as a dc
offset at the output.
The ADA4522-1/ADA4522-2/ADA4522-4 have integrated EMI
filters at their input stage. To describe the ability of the
ADA4522-1/ADA4522-2/ADA4522-4 to perform as intended
in the presence of electromagnetic energy, the electromagnetic
interference rejection ratio (EMIRR) of the noninverting pin is
specified in Table 2, Table 3, and Table 4 of the Specifications
section. A mathematical method of measuring EMIRR is
defined as follows:
EMIRR = 20log(VIN_PEAK/VOS)
100
50
90
40
80
30
70
20
60
10
0
10M 100M 1G 10G
EMIRR (dB)
FREQUENCY (Hz)
55V
30V
5V
V
IN
= 100mV p-p
13168-075
Figure 79. EMIRR vs. Frequency
CAPACITIVE LOAD STABILITY
The ADA4522-1/ADA4522-2/ADA4522-4 can safely drive capaci-
tive loads of up to 250 pF in any configuration. As with most
amplifiers, driving larger capacitive loads than specified may cause
excessive overshoot and ringing, or even oscillation. A heavy
capacitive load reduces the phase margin and causes the amplifier
frequency response to peak. Peaking corresponds to overshooting
or ringing in the time domain. Therefore, it is recommended that
external compensation be used if the ADA4522-1/ADA4522-2/
ADA4522-4 must drive a load exceeding 250 pF. This compensa-
tion is particularly important in the unity-gain configuration,
which is the worst case for stability.
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 26 of 33
A quick and easy way to stabilize the op amp for capacitive load
drive is by adding a series resistor, RISO, between the amplifier
output terminal and the load capacitance, as shown in Figure 80.
RISO isolates the amplifier output and feedback network from
the capacitive load. However, with this compensation scheme,
the output impedance as seen by the load increases, and this
reduces gain accuracy.
–V
SY
V
IN
+V
SY
V
OUT
C
L
ADA4522-1/
ADA4522-2/
ADA4522-4
R
ISO
13168-076
Figure 80. Stability Compensation with Isolating Resistor, RISO
Figure 81 shows the effect on overshoot with different values of
RISO.
60
25
50
55
45
20
40
15
35
10
30
5
0
10 100 1k
OVERSHOOT (%)
LOAD CAPACITANCE (pF)
V
SY
= ±15V
R
L
= 10k
A
V
= 1
V
IN
= 100mV p-p
OS+ (R
ISO
= 0)
OS– (R
ISO
= 0)
OS+ (R
ISO
= 25)
OS– (R
ISO
= 25)
OS+ (R
ISO
= 50)
OS– (R
ISO
= 50)
13168-077
Figure 81. Small Signal Overshoot vs. Load Capacitance with Various Output
Isolating Resistors
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 27 of 33
APPLICATIONS INFORMATION
SINGLE-SUPPLY INSTRUMENTATION AMPLIFIER
The extremely low offset voltage and drift, high open-loop gain,
high common-mode rejection, and high power supply rejection of
the ADA4522-1/ADA4522-2/ADA4522-4 make them excellent op
amp choices as discrete, single-supply instrumentation amplifiers.
Figure 82 shows the classic 3-op-amp instrumentation amplifier
using the ADA4522-1/ADA4522-2/ADA4522-4. The key to high
CMRR for the instrumentation amplifier are resistors that are well
matched for both the resistive ratio and relative drift. For true
difference amplification, matching of the resistor ratio is very
important, where R5/R2 = R6/R4. The resistors are important
in determining the performance over manufacturing tolerances,
time, and temperature. Assuming a perfect unity-gain difference
amplifier with infinite common-mode rejection, a 1% tolerance
resistor matching results in only 34 dB of common-mode rejection.
Therefore, at least 0.01% or better resistors are recommended.
V
IN1
V
IN2
A1
A3
A2
R
G1
R
G2
R1
R3
R2
R4
R5
V
OUT
R6
R
G1
=R
G2
, R1 = R3, R2 = R4, R5 = R6
V
OUT
=(V
IN2
–V
IN1
)(1 + R1/R
G1
)(R5/R2)
13168-078
Figure 82. Discrete 3-Op-Amp Instrumentation Amplifier
To build a discrete instrumentation amplifier with external resis-
tors without compromising on noise, pay close attention to the
resistor values chosen. RG1 and RG2 each have thermal noise that
is amplified by the total noise gain of the instrumentation amplifier
and, therefore, a sufficiently low value must be chosen to reduce
thermal noise contribution at the output while still providing an
accurate measurement. Table 10 shows the external resistors noise
contribution referred to the output (RTO).
Table 10. Thermal Noise Contribution Example
Resistor
Value
(kΩ)
Resistor Thermal
Noise (nV/√Hz)
Thermal Noise
RTO (nV/√Hz)
RG1 0.4 2.57 128.30
RG2 0.4 2.57 128.30
R1 10 12.83 25.66
R2 10 12.83 25.66
R3 10 12.83 25.66
R4 10 12.83 25.66
R5 20 18.14 18.14
R6 20 18.14 18.14
Note that A1 and A2 have a high gain of 1 + R1/RG1. Therefore,
use a high precision, low offset voltage and low noise amplifier
for A1 and A2, such as the ADA4522-1/ADA4522-2/ADA4522-4.
Conversely, A3 operates at a much lower gain and has a differ-
ent set of op amp requirements. Its input noise, referred to the
overall instrumentation amplifier input, is divided by the first
stage gain and is not as important. Note that the input offset
voltage and the input voltage noise of the amplifiers are also
amplified by the overall noise gain.
Any unused channel of the ADA4522-1/ADA4522-2/ADA4522-4
must be configured in unity gain with the input common-mode
voltage tied to the midpoint of the power supplies.
Understanding how noise impacts a discrete instrumentation
amplifier or a difference amplifier (the second stage of a 3-op-
amp instrumentation amplifier) is important, because they are
commonly used in many different applications. The Load
Cell/Strain Gage Sensor Signal Conditioning section and the
Precision Low-Side Current Shunt Sensor section show the
ADA4522-1/ADA4522-2/ADA4522-4 used as a discrete
instrumentation or difference amplifier in an application.
LOAD CELL/STRAIN GAGE SENSOR SIGNAL
CONDITIONING USING THE ADA4522-2
The ADA4522-2, with its ultralow offset, drift, and noise, is well
suited to signal condition a low level sensor output with high gain
and accuracy. A weigh scale/load cell is an example of an
application with such requirements. Figure 83 shows a configura-
tion for a single-supply, precision, weigh scale measurement
system. The ADA4522-2 is used at the front end for amplification
of the low level signal from the load cell.
Current flowing through a PCB trace produces an IR voltage
drop; with longer traces, this voltage drop can be several
millivolts or more, introducing a considerable error. A 1 inch
long, 0.005 inch wide trace of 1 oz copper has a resistance of
approximately 100 mΩ at room temperature. With a load
current of 10 mA, the resistance can introduce a 1 mV error.
Therefore, a 6-wire load cell is used in the circuit. The load cell
has two sense pins, in addition to excitation, ground, and two
output connections. The sense pins are connected to the high
side (excitation pin) and low side (ground pin) of the
Wheatstone bridge. The voltage across the bridge can then be
accurately measured regardless of voltage drop due to wire
resistance. The two sense pins are also connected to the analog-
to-digital converter (ADC) reference inputs for a ratiometric
configuration that is immune to low frequency changes in the
power supply excitation voltage.
The ADA4522-2 is configured as the first stage of a 3-op-amp
instrumentation amplifier to amplify the low level amplitude
signal from the load cell by a factor of 1 + 2R1/RG. Capacitors
C1 and C2 are placed in the feedback loops of the amplifiers
and interact with R1 and R2 to perform low-pass filtering. This
filtering limits the amount of noise entering the Σ- ADC. In
addition, C3, C4, C5, R3, and R4 provide further common-mode
and differential mode filtering to reduce noise and unwanted
signals.
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 28 of 33
OUT+
SENSE–
SENSE+
OUT–
V
EXC
1/2
V+
R1 11.3k
C1 3.3µF
1/2
ADA4522-2
ADA4522-2
R2 11.3k
C2 3.3µF
R
G
60.4
R3
1k
R4
1k
C4
1µF
C5
10µF
C3
1µF AIN(+)
REF(–)
REF(+)
DOUT/
RDY
DIN
AIN(–)
GND
V
DD
+5V
AD7791
100pF
1µF
100pF
SCLK
CS
LOAD
CELL
13168-079
Figure 83. Precision Weigh Scale Measurement System
PRECISION LOW-SIDE CURRENT SHUNT SENSOR
Many applications require the sensing of signals near the
positive or negative rails. Current shunt sensors are one such
application and are mostly used for feedback control systems.
They are also used in a variety of other applications, including
power metering, battery fuel gauging, and feedback controls in
industrial applications. In such applications, it is desirable to
use a shunt with very low resistance to minimize series voltage
drop. This configuration not only minimizes wasted power, but
also allows the measurement of high currents while saving power.
A typical shunt may be 100 m. At a measured current of 1 A,
the voltage produced from the shunt is 100 mV, and the ampli-
fier error sources are not critical. However, at low measured current
in the 1 mA range, the 100 V generated across the shunt demands
a very low offset voltage and drift amplifier to maintain absolute
accuracy. The unique attributes of a zero drift amplifier provide
a solution. Figure 84 shows a low-side current sensing circuit
using the ADA4522-1/ADA4522-2/ADA4522-4. The ADA4522-1/
ADA4522-2/ADA4522-4 are configured as difference amplifiers
with a gain of 1000. Although the ADA4522-1/ADA4522-2/
ADA4522-4 have high CMRR, the CMRR of the system is limited
by the external resistors. Therefore, as mentioned in the Single-
Supply Instrumentation Amplifier section, the key to high CMRR
for the system is resistors that are well matched from both the
resistive ratio and relative drift, where R1/R2 = R3/R4.
Any unused channel of the ADA4522-1/ADA4522-2/ADA4522-4
must be configured in unity gain with the input common-mode
voltage tied to the midpoint of the power supplies.
R2
100k
VSY
VSY
VOUT*
*VOUT = AMPLIFIER GAIN × VOLTAGE ACROSS R
S
= 1000 × RS × I
= 100 × I
RL
RS
0.1
R1
100
I
ADA4522-1/
ADA4522-2/
ADA4522-4
R4
100kR3
100
I
13168-080
Figure 84. Low-Side Current Sensing Circuit
PRINTED CIRCUIT BOARD LAYOUT
The ADA4522-1/ADA4522-2/ADA4522-4 are high precision
devices with ultralow offset voltage and noise. Therefore, take
care in the design of the PCB layout to achieve optimum
performance of the ADA4522-1/ADA4522-2/ADA4522-4 at the
board level.
To avoid leakage currents, keep the surface of the board clean
and free of moisture.
Properly bypassing the power supplies and keeping the supply
traces short minimizes power supply disturbances caused by
output current variation. Connect bypass capacitors as close
as possible to the device supply pins. Stray capacitances are a
concern at the outputs and the inputs of the amplifier. It is
recommended that signal traces be kept at a distance of at
least 5 mm from supply lines to minimize coupling.
A potential source of offset error is the Seebeck voltage on the
circuit board. The Seebeck voltage occurs at the junction of two
dissimilar metals and is a function of the temperature of the
junction. The most common metallic junctions on a circuit board
are solder to board traces and solder to component leads. Figure 85
shows a cross section of a surface-mount component soldered
to a PCB. A variation in temperature across the board (where TA1 ≠
TA2) causes a mismatch in the Seebeck voltages at the solder joints,
thereby resulting in thermal voltage errors that degrade the
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 29 of 33
performance of the ultralow offset voltage of the ADA4522-1/
ADA4522-2/ADA4522-4.
SOLDER
+
+
+
+
COMPONENT
LEAD
COPPER
TRACE
V
SC1
V
TS1
T
A1
SURFACE-MOUNT
COMPONENT
PC BOARD
T
A2
V
SC2
V
TS2
IF T
A1
T
A2
, THEN
V
TS1
+ V
SC1
V
TS2
+ V
SC2
13168-081
Figure 85. Mismatch in Seebeck Voltages Causes Seebeck Voltage Error
In Figure 85, VSC1 and VSC2 are the Seebeck voltages due to solder to
component at Junction 1 and Junction 2, respectively. VTS1 and
VTS2 are the Seebeck voltages due to solder to trace at Junction 1
and Junction 2. TA1 and TA2 are the temperatures of Junction 1
and Junction 2, respectively.
To minimize these thermocouple effects, orient resistors so
that heat sources warm both ends equally. Where possible, it
is recommended that the input signal paths contain matching
numbers and types of components to match the number and type
of thermocouple junctions. For example, dummy components,
such as zero value resistors, can be used to match the thermo-
electric error source (real resistors in the opposite input path).
Place matching components in close proximity and orient them
in the same manner to ensure equal Seebeck voltages, thus
cancelling thermal errors. Additionally, use leads that are of
equal length to keep thermal conduction in equilibrium. Keep
heat sources on the PCB as far away from amplifier input circuitry
as is practical.
It is highly recommended to use a ground plane. A ground
plane helps distribute heat throughout the board, maintain a
constant temperature across the board, and reduce EMI noise
pickup.
COMPARATOR OPERATION
An op amp is designed to operate in a closed-loop configuration
with feedback from its output to its inverting input. In contrast to
op amps, comparators are designed to operate in an open-loop
configuration and to drive logic circuits. Although op amps are
different from comparators, occasionally an unused section of a
dual op amp is used as a comparator to save board space and
cost; however, this is not recommended for the ADA4522-1/
ADA4522-2/ADA4522-4.
Figure 86 and Figure 87 show the ADA4522-1/ADA4522-2/
ADA4522-4 configured as a comparator, with 10 kΩ resistors in
series with the input pins. Any unused channels are configured as
buffers with the input voltage kept at the midpoint of the power
supplies. The ADA4522-1/ADA4522-2/ADA4522-4 have input
devices that are protected from large differential input voltages by
Diode D5 and Diode D6, as shown in Figure 72. These diodes
consist of substrate PNP bipolar transistors, and conduct whenever
the differential input voltage exceeds approximately 600 mV;
however, these diodes also allow a current path from the input
to the lower supply rail, resulting in an increase in the total
supply current of the system. Both comparator configurations yield
the same result. At 30 V of power supply, ISY+ remains at 1.55 mA
per dual amplifier, but ISY− increases close to 2 mA in magni-
tude per dual amplifier.
ADA4522-1/
ADA4522-2/
ADA4522-4
A1
10k
10k
I
SY
+
+V
SY
V
OUT
–V
SY
I
SY
–
A2
13168-082
Figure 86. Comparator Configuration A
A1
10k
10k
I
SY
+
+
V
SY
V
OUT
–V
SY
I
SY
–
A2
ADA4522-1/
ADA4522-2/
ADA4522-4
13168-083
Figure 87. Comparator Configuration B
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0 6 12 18 24 304 101622282 8 14 20 26
I
SY
PER DUAL AMPLIFIER (mA)
V
SY
(V)
I
SY
+
I
SY
–
13168-084
Figure 88. Supply Current (ISY) per Dual Amplifier vs. Supply Voltage (VSY)
(ADA4522-1/ADA4522-2/ADA4522-4 as a Comparator)
Note that 10 kΩ resistors are used in series with the input of the
op amp. If smaller resistor values are used, the supply current of the
system increases much more. For more details on op amps as
comparators, see the AN-849 Application Note, Using Op Amps
as Comparators.
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 30 of 33
USE OF LARGE SOURCE RESISTANCE
The ADA4522-1/ADA4522-2/ADA4522-4 are designed to work
with low value source resistance. Note that the amplifier has an
ultralow voltage noise density of 6 nV/√Hz. A 1 k resistor
contributes 4 nV/√Hz; therefore, placing a 1 kΩ resistor at the
input increases total noise to 7.2 nV/√Hz. For this noise reason,
it is recommended to avoid using large source resistance.
Unity Gain Follower with Large Source Resistance
When the ADA4522-1/ADA4522-2/ADA4522-4 are configured
in a unity-gain follower configuration with a large source
resistance and slow power supply ramp rate, the amplifier
output may rail to the positive supply.
ADA4522-1/
ADA4522-2/
ADA4522-4
+V
SY
R
F
R
S
V
OUT
–V
SY
V
IN
13168-200
Figure 89. Insert RF When Large RS is Used
Workaround
To avoid the amplifier output railing to the positive supply,
implement one of the following actions (see Table 11 and
Figure 89):
Reduce the value of the source resistance (RS).
Insert a feedback resistor (RF).
Table 11. Amplifier Output Railing Workaround
Recommendations
Condition Recommendation
1.5 V ≤ VSY − VIN < 2.5 V RF = 200 Ω or RF ≥ 50 RS, whichever is
greater
2.5 V ≤ VSY − VIN < 3.5 V RS ≤ 200 Ω or RF ≥ 2 RS
VSY − VIN ≥ 3.5 V RS ≤ 500 Ω or RF ≥ 0.5 RS
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 31 of 33
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 90. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 91. 8-Lead Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ADA4522-1/ADA4522-2/ADA4522-4 Data Sheet
Rev. F | Page 32 of 33
CONTRO LL ING DIME NSIONS ARE IN M IL LIMETERS ; INCH DI MENSIO NS
(IN PARENTHESES) ARE ROUNDED-OF F MIL LI METER EQUIVALENTS FO R
REF E RENC E O N LY AND ARE NO T AP PROPRIATE F O R US E I N DES I GN.
COMPL IANT TO JE DE C S TANDARDS MS -012-AB
060606-A
14 8
7
1
6.20 (0. 2 441 )
5.80 (0. 2 283 )
4.0 0 (0.1575)
3.8 0 (0.1496)
8.7 5 (0.3445)
8.5 5 (0.3366)
1.27 (0. 0 50 0)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0. 0689)
1.35 (0. 0531)
0.50 (0. 0 197 )
0.25 (0. 0 098 )
1.27 (0.0500)
0.40 (0.0157)
0.2 5 (0.0098)
0.1 7 (0.0067)
COPLANARITY
0.10
8°
0°
45°
Figure 92. 14-Lead Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
COMPLI ANT T O JEDEC ST ANDARDS MO-153-AB- 1
061908-A
8°
0°
4.50
4.40
4.30
14 8
7
1
6.40
BSC
PIN 1
5.10
5.00
4.90
0.65 BSC
0.15
0.05 0.30
0.19
1.20
MAX
1.05
1.00
0.80 0.20
0.09 0.75
0.60
0.45
COPLANARITY
0.10
SEATING
PLANE
Figure 93. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
Data Sheet ADA4522-1/ADA4522-2/ADA4522-4
Rev. F | Page 33 of 33
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
ADA4522-1ARMZ −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A3G
ADA4522-1ARMZ-R7 −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A3G
ADA4522-1ARMZ-RL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A3G
ADA4522-1ARZ −40°C to +125°C 8-Lead Small Outline Package [SOIC_N] R-8
ADA4522-1ARZ-R7 −40°C to +125°C 8-Lead Small Outline Package [SOIC_N] R-8
ADA4522-1ARZ-RL −40°C to +125°C 8-Lead Small Outline Package [SOIC_N] R-8
ADA4522-2ARMZ −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A39
ADA4522-2ARMZ-R7 −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A39
ADA4522-2ARMZ-RL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A39
ADA4522-2ARZ −40°C to +125°C 8-Lead Small Outline Package [SOIC_N] R-8
ADA4522-2ARZ-R7 −40°C to +125°C 8-Lead Small Outline Package [SOIC_N] R-8
ADA4522-2ARZ-RL −40°C to +125°C 8-Lead Small Outline Package [SOIC_N] R-8
ADA4522-4ARUZ −40°C to +125°C 14-Lead Thin Shrink Small Outline Package [TSSOP] RU-14
ADA4522-4ARUZ-R7 −40°C to +125°C 14-Lead Thin Shrink Small Outline Package [TSSOP] RU-14
ADA4522-4ARUZ-RL −40°C to +125°C 14-Lead Thin Shrink Small Outline Package [TSSOP] RU-14
ADA4522-4ARZ −40°C to +125°C 14-Lead Standard Small Outline Package [SOIC_N] R-14
ADA4522-4ARZ-R7 −40°C to +125°C 14-Lead Standard Small Outline Package [SOIC_N] R-14
ADA4522-4ARZ-RL −40°C to +125°C 14-Lead Standard Small Outline Package [SOIC_N] R-14
1 Z = RoHS Compliant Part.
©2015–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13168-0-9/17(F)
