FSTD16861MTDX - Fairchild Semiconductor Corporation

May 2001

Revised June 2005

FSTD16861 20-Bit Bus Switch with Level Shifting

FSTD16861

20-Bit Bus Switch with Level Shifting

General Descript ion

The Fai rchild Switch F STD16 861 provides 20-bits of high-

speed CMOS TTL-compatible bus switching. The low On

Resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

addition al ground boun ce noise. A diode to VCC has been

integrated into the circuit to allow for level shifting between

5V inputs and 3.3V outputs.

The device is organized as a 10-bit or 20-bit bus switch.

When OE1 is LOW, the switch is ON and Port 1A is con-

nected to Port 1B. When OE2 is LOW, Port 2A is connected

to Port 2B. When OEX is HIGH, a high impedance state

exists between the A and B Ports.

Features

■4

switch connection between two ports.

■Minimal propagation delay through the switch.

■Low lCC.

■Zero bounce in flow-through mode.

■Control inputs compatible with TTL level.

■TruTranslation

voltage translation from 5.0V inputs to

3.3V outputs

■Power-off high impedance inputs and outputs

■Supports live insertion/withdrawal (Note 1)

Note 1: To ensure the high-impedance state during power up or power

down, OE should be tied to VCC through a pull-up resistor; the minimum

value of th e resistor is determin ed by the curr ent-so urcing capab ility of the

driver.

Ordering Code:

Devices also available in Tape and R eel. Specify by ap pending th e s uffix let t er “X” to the or dering code.

TruTranslation

is tradem ark of Fa irc hild Semic onduct or C orpora tio n.

Order Number Package Number Package Description

FSTD16861MTD MTD48 48-Lead Thin Shrink Sm all Outline Package (TSSOP), JEDEC MO-1 53, 6.1mm Wide

www.fairchildsemi.com 2

FSTD16861

Connection Diagram

Pin Descriptions

Logic Diagram

Truth Table

HIGH Voltag e Level

LOW Voltage Le ve l

High Impedance

Pin Name Description

OE1, OE2Bus Switch Enables

1An, 2AnBus A

1Bn, 2BnBus B

Inputs Inputs/Outputs

OE1OE21A, 1B 2A, 2B

LL1A

1B 2A

LH1A

1B Z

HL Z 2A

HH Z Z

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FSTD16861

Absolute Maximum Ratings(Note 2) Recomm ended Operating

Conditions (Note 5)

Note 2: The “Absolute Maximum Ratings” are those val ues beyond w hich

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “R ecomm ended O peratin g Con ditions ” table will defin e the condition s

for actu al device operation.

Note 3: VS is the voltage observed/applied at either the A or B Ports across

the switch.

Note 4: The input and output negative voltage ratings may be exceeded if

the in put and output diode cu rrent ra t ings are obser v ed.

Note 5: Unused cont rol input s must be he ld HIG H or L OW. They ma y not

float.

DC Electrical Characteristics

Note 6: Typical values are at VCC

5.0V an d T A



Note 7: Measured by t he v oltage dr op betwee n A and B pin s a t the indicat ed curre nt th rough the s w it c h. On Resistan c e is determin ed by the lower of th e

voltages o n t he t w o (A or B) pin s.

Supply Voltage (VCC)



0.5V to



7.0V

DC Switch Voltage (VS) (Note 3)



0.5V to



7.0V

DC Input Voltage (VIN) (N ote 4)



0.5V to



7.0V

DC Input Diode Current (lIK) VIN





50 mA

DC Output Current (IOUT)128 mA

DC VCC/GND Current (ICC/IGND)

100 mA

Storage Temperature Range (TSTG)



C to



150

Power Su pply Ope rat i ng (V CC) 4.5V to 5.5V

Input Voltage (VIN) 0V to 5.5V

Output Voltage (VOUT) 0V to 5.5V

Input Rise and Fall Time (tr, tf)

Switch Control Input 0 ns/V to 5 ns/V

Switch I/O 0 ns/V to DC

Free Air Operating Temperature (TA)-40

C to



Symbol Parameter VCC TA



C to



CUnits Conditions

(V) Min Typ

(Note 6) Max

VIK Clamp Diode Voltage 4.5



1.2 V IIN



18 mA

VIH HIGH Level Input Voltage 4.5-5.5 2.0 V

VIL LOW Level Input Voltage 4.5-5.5 0.8 V

VOH HIGH Level 4.5-5.5 See Figure 3 V

IIInput Leakage Current 5.5

1.0

VIN

5.5V

010

5.5V

IOZ OFF-STATE Leakage Current 5.5

1.0

A, B

VCC

RON Switch On Resistance 4.5 4 7

VIN

0V, IIN

64 m A

(Note 7) 4.5 4 7

VIN

0V, IIN

30 m A

4.5 35 50

VIN

2.4V, IIN

15 mA

ICC Quiescent Supply Current

5.5 1.5 mA OE1

OE2

GND

VIN

VCC or GND, IOUT

AOE1

OE2

VCC

VIN

VCC or GND, IOUT

ICC Increase in ICC per Input 5.5 2.5 mA One Input at 3.4V

Other Inputs at VCC or GND

www.fairchildsemi.com 4

FSTD16861

AC Electrical Characteristics

Note 8: This parameter is guara nt eed by des ign but is not test ed. The bus switch con t ributes no pr opagation delay othe r tha n t he R C delay of the typ ical On

Resis tance of the s w it c h and the 50pF load c apac itance, wh en driven by an ideal volt age sour c e (z ero output im pedance).

Cap acitance (Note 9)

Note 9: TA



C, f

1 Mhz, Capac ita nc e is characterized but not te sted.

AC Loading and Waveforms

Note: Input driven by 50

source terminated in 50

Note: CL includes load and stray capacitance

Note: Input PRR

1.0 MHz , tW

500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

Symbol Parameter



C to



Units Conditions

50pF, RU

500

Figure

VCC

4.5 – 5.5V Number

Min Max

tPHL, tPLH Propagation Delay Bus-to-Bus (Note 8) 0.25 ns VI

OPEN Figures

1, 2

tPZH, tPZL Output Enable Time 1.0 6.0 ns VI

7V for tPZL Figures

1, 2

OPEN for tPZH

tPHZ, tPLZ Output Disable Time 1.0 7.0 ns VI

7V for tPLZ Figures

1, 2

OPEN for tPHZ

Symbol Parameter Typ Max Units Conditions

CIN Control Pin Input Capacitance 3 pF VCC

5.0V, VIN

CI/O Input/Output Capacitance “OFF State”6pFV

CC, OE

5.0V, VIN

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FSTD16861

Output Voltage HIGH vs. Supply Voltage

FIGURE 3.

www.fairchildsemi.com 6

FSTD16861 20-Bit Bus Switch with Level Shifting

Physical Dimensions inches (millimeters) unless otherwise noted

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD48

Technology Description

The Fairchild Switch fam ily derives from and embodies Fairchild’s pro ven switch tec hnology used fo r several years in its

74LVX3L384(FST3384) bus switch prod uct.

Fairchild does no t assume any responsibility for use of any circui try described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r systems a re devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent i n any compon ent of a lif e supp ort

device or system whose failure to perform can be rea-

sonabl y ex pect ed to cause the fa ilu re of the li fe su pp ort

device or system, or to affect its safety or effectiveness.