STEMENS AKTIENGESELLSCHAF SIEMENS UPE D nel IL101B HIGH SPEED THREE STATE OPTOCOUPLER Package Dimensions in Inches (mm) 380 ~~ le 016 00 098 Tapes 4 203) (508) 4305) 020 012 (9 694 (10 16) 400 Ay Ne a 240 ANODE 6 10r 16 60) CATHODE 260 i. NC ao fl Ig] a tal ~all - eI on 18 2 7} GATE 3 Pep tz. $} MY 4 GNDIS] GROUND 400 FEATURES * High Speed * Faraday Shielded Photodetector Improves Common Mode Rejection * DTL/TTL Compatible, 5 V Supply * Three State Output Logic for Multiplexing * Built-In Schmitt Trigger Avoids Oscillation *UL Approval #E52744 DESCRIPTION 1L101B 1s an optically coupled pair with a Gallium Arsenide Phosphide LED anda silicon monolithic integrated circuit including a photodetector. High speed Cigital information can be transmitted white maintaining a high degree of electrical isolation between input and output The 1L101B can be used to replace pulse transformers in many digital interface applications A built-in Schmitt Trigger provides hysteresis reducing oscillation possibility. Maximum Ratings Input Diode Forward DC Current .. Reverse Voltage Output IC Supply Voltage (V,..) Enable Input Voltage (V,} {not to exceed V. by more than 500 mV) Output Collector Current (/,). Output Collector Power Dissipation Output Collector Voltage (V,,,) . Isolation Voltage (nput-Outpuy, DC. Package Storage Temperature Operating Temperature Lead Solder Temperature Electrical Characteristics (T,_,=0C to 70C) Parameter Min. Typ. Max. Unit 1, (1) Logie (1) Input Current for Logic (0) Output (Figure 1} 12 mA i, (0) - Logue (0) Input Current for Logic (1) Output (Figure 1) 250 mA V, (14) - Logic (1) Gate Vollage 20 Vv , (0) - Logic (0) Gate Voltage & Vv Vour (0) Logic (0) Output Vollage 35 6 Vv I 18 22 mA co 5-51 . 2omA ov 7v . SSYV 100 mA 100 mW 7M 6000 V 55C to +125C 0S to +70C , 260C for 10 sec Tast Condition Vop=5 8, Vga2 4 V, | =12 mA 1, sinking) =16 mA Voge 85 V,V,=05 1,=0 10 mA Mi 8235605 OOe72e1S 5 MESIEG OA Optocouplers (Optoisolators) |3 SIEMENS AKTIENGESELLSCHAF VE D HM 8235605 O02721b 7 MMESIEG : T-41~89 __ Switching Characteristics (T,_,=25C, V..=5 V) OPERATING PROCEDURES AND DEFINITIONS Parameter Min. Typ. Max, Unit Test Condition Logic Gonvention: The IL101B 1s defined in terms of al - positive logic, ropagation Delay Time to Bypassing: A cerarnic capacitor (.01mF min.) should be Logic Level (1) connected from pin 8 to pin 5 to stabilize the switching (Fig 1, Note 1) 76 300 ns) =A =350 0, C=15 pF, amplifier operation. Switching properties may be impaired o |, =12 mA by not providing for bypassing. H repagation Polarities: All voltages are referenced ta network ground Delay Time to (pin 5). Current flowing toward a terminal is considered Logic Level (0) positive. (Fig. 1, Note 2) 70 4300) R= 350 Q, C=15 pF, Gate input: No external pull-up required for a lagic (1). be (0) ~ Output Rise- Fall Time (10-90%) 15 ns R.=350 @, C.=15 pF, TRUTH TABLE (Positive Logic) |, =12mA Input* }] Enable Cutput Electrical Characteristics (T,_,=25C) 1 1 0 Input to Output 0 1 1 Parameter Min. Typ. Max. Unit Test Condition 1 0 off Insulation Voltage 0 0 off Input-Output . ra (BV,) (Nota 3) 6000-7500 VDC t= 1sec. See definition of terms for Resistance, logic state. input-Oultput (R,,) (Note 3) 102 Q V,=500V Capacitance Input-Output (C, .} (Note 3) 05 08 pF f=1MHz Electrical Characteristics (T,_,=25C) Input Diode Parameter Min, Typ. Max. Unit Test Condition Forward Voltage , 15 6175 Wo |=10mA Reverse Breakdown Voltage (V,,) 5 v |, =10 mA Capacitance {|} 10 pF =0, f= 1MHz FIGURE 1. TEST CIRCUIT FOR t, (0) AND t,, (1) PULSE +8V GENERATOR Ze = S02 ' : Veo}s tm = 5ns | an 7 ax OF Ry . BYPASS OUTPUT Voy. tNPUT iW % t MONITORING bin Cis NODE MONITORING 472 7 GNOEE NODE *C, is approximately 15pF, which includes + probe and stray wiring capacitance mee 350mvV (1,, = 7 S5mA} --~--. + 175mV (1, = 3 75mA} OUTPUT Vor 15V f ~~ ~ ~~ = Vou (0) Notes: 1. The iC) propagation delay 1s measured from the 3 75 mA point on the trauling edge of the input pulse to the 1.6 V point on the trailing edge of the oulput pulse 2. The t,,(0) propagation delay is measured from the 3 75 mA point on the input pulse to the 1.5 V point on the leading edge of the output pulse 3. Pins 2 and 3 are shorted together, and pins 5, 6, 7, and 8 shorled together. 4. Al 10 mA V, decreases with increasing temperature at the rate of 1.6 mVFC. 111018 5-52