S-1133 Series
www.sii-ic.com
HIGH RIPPLE-REJECTION AND LOW DROPOUT
MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
© Seiko Instruments Inc., 2006-2010 Rev.3.0_00
Seiko Instruments Inc. 1
The S-1133 Series is a positive voltage regulator with a low dropout voltage, high output voltage accuracy, and low current
consumption (300 mA output current) developed based on CMOS technology.
A 1 μF small ceramic capacitor can be used*1. It operates with low current consumption of 60 μA typ. The S-1133 Series
includes an overcurrent protection circuit that prevents the output current from exceeding the current capacitance of the
output transistor and a thermal shutdown circuit that prevents damage due to overheating.
In addition to the types in which output voltage is set inside the IC, a type for which output voltage can be set via an extern al
resistor is added to a lineup (S-1133x00 Series). SOT-89-5 and super-small SNT-8A packages realize high-density
mounting. This, in addition to low current consumption, makes the S-1133 Series ideal for mobile devices.
*1. A ceramic capacitor of 2.2 μF or more can be used for products whose output voltage is 1.7 V or less.
Features
Output voltage : 1.2 to 6.0 V, selectable in 0.1 V steps.
Voltage setting via external resistor : Selectable from 1.8 to 8.2 V (S-1133B00/S-1133A00)
Input voltage range : 2.0 to 10 V
High-accuracy output voltage : ±1.0% accuracy (1.2 to 1.4 V output product : ±15 mV accuracy)
Low dropout voltage : 130 mV typ. (3.0 V output product, IOUT = 100 mA)
Low current consumption : During operation : 60 μA typ., 90 μA max.
During shutdown : 0.1 μA typ., 1.0 μA max.
Output current : 300 mA output is possible (at VIN VOUT(S) + 1.0 V)*1
Low ESR capacitor can be used : A ceramic capacitor of 1.0 μF or more can be used for the input and output
capacitors.
(A ceramic capacitor of 2.2 μF or more can be used for products whose
output voltage is 1.7 V or less.)
High ripple rejection : 70 dB typ. (at 1.0 kHz, VOUT = 1.2 V)
Built-in overcurrent protection circuit : Overcurrent of output transistor can be restricted.
Built-in thermal shutdown circuit : Prevents damage due to overheating.
Built-in ON/OFF circuit : Ensures long battery life.
Lead-free, Sn 100%, halogen-free*2
*1. Attention should be paid to the power dissipation of the package when the out put current is large.
*2. Refer to Product Name Structure” for details.
Applications
Power supply for battery-powered devices
Power supply for communication devices
Power supply for home electric appliances
Packages
SOT-89-5
SNT-8A
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
2 Seiko Instruments Inc.
Block Diagrams
1. Types in which output voltage is internally set (S-1133x12 to S-1133x60)
*1. Parasitic diode
*1
ON/OFF
VIN
VSS
VOUT
Reference
voltage circuit
ON/OFF
circuit
Overcurrent
protection circuit
Thermal
shutdown circuit
Figure 1
2. Types in which output voltage is externally set (S-1133B00 and S-1133A00 only)
*1. Parasitic diode
*1
ON/OFF
VIN
VSS
VOUT
Reference
voltage circuit
ON/OFF
circuit
Overcurrent
protection circuit
Thermal
shutdown circuit
VADJ
Figure 2
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 3
Product Name Structure
The product types, output voltage, and package types for the S-1133 Series can be selected at the user’s request.
Refer to the “1. Product name” for the meanings of the characters in the product name, “2. Package” regarding the
package drawings and “3. Product name list” for the full product names.
1. Product name
S-1133 x xx xxxx x
Output voltage
00 : Externally set
12 to 60 : Internally set
(e.g., when the output voltage is 1.2 V, it is expressed as 12.)
Environmental code
U : Lead-free (Sn 100%), halogen-free
G : Lead-free (for details, please contact our sales office)
Product type*2
A : ON/OFF pin negative logic
B : ON/OFF pin positive logic
Package abbreviation and packing specifications*1
U5T1: SOT-89-5, Tape
I8T1 : SNT-8A, Tape
*1. Refer to the tape specifications at the end of this book.
*2. Refer to 3. Shutdown pin (ON/OFF pin)” in “Operation”.
2. Package
Drawing Code
Package Name Package Tape Reel Land
SOT-89-5 UP005-A-P-SD UP005-A-C-SD UP005-A-R-SD UP005-A-L-S1
SNT-8A PH008-A-P-SD PH008-A-C-SD PH008-A-R-SD PH008-A-L-SD
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
4 Seiko Instruments Inc.
3. Product name list Table 1 (1/2)
Output Voltage SOT-89-5 SNT-8A
Externally set S-1133B00-U5T1x S-1133B00-I8T1x
1.2 V ±15 mV S-1133B12-U5T1x S-1133B12-I8T1x
1.3 V ±15 mV S-1133B13-U5T1x S-1133B13-I8T1x
1.4 V ±15 mV S-1133B14-U5T1x S-1133B14-I8T1x
1.5 V ±1.0% S-1133B15-U5T1x S-1133B15-I8T1x
1.6 V ±1.0% S-1133B16-U5T1x S-1133B16-I8T1x
1.7 V ±1.0% S-1133B17-U5T1x S-1133B17-I8T1x
1.8 V ±1.0% S-1133B18-U5T1x S-1133B18-I8T1x
1.9 V ±1.0% S-1133B19-U5T1x S-1133B19-I8T1x
2.0 V ±1.0% S-1133B20-U5T1x S-1133B20-I8T1x
2.1 V ±1.0% S-1133B21-U5T1x S-1133B21-I8T1x
2.2 V ±1.0% S-1133B22-U5T1x S-1133B22-I8T1x
2.3 V ±1.0% S-1133B23-U5T1x S-1133B23-I8T1x
2.4 V ±1.0% S-1133B24-U5T1x S-1133B24-I8T1x
2.5 V ±1.0% S-1133B25-U5T1x S-1133B25-I8T1x
2.6 V ±1.0% S-1133B26-U5T1x S-1133B26-I8T1x
2.7 V ±1.0% S-1133B27-U5T1x S-1133B27-I8T1x
2.8 V ±1.0% S-1133B28-U5T1x S-1133B28-I8T1x
2.9 V ±1.0% S-1133B29-U5T1x S-1133B29-I8T1x
3.0 V ±1.0% S-1133B30-U5T1x S-1133B30-I8T1x
3.1 V ±1.0% S-1133B31-U5T1x S-1133B31-I8T1x
3.2 V ±1.0% S-1133B32-U5T1x S-1133B32-I8T1x
3.3 V ±1.0% S-1133B33-U5T1x S-1133B33-I8T1x
3.4 V ±1.0% S-1133B34-U5T1x S-1133B34-I8T1x
3.5 V ±1.0% S-1133B35-U5T1x S-1133B35-I8T1x
3.6 V ±1.0% S-1133B36-U5T1x S-1133B36-I8T1x
3.7 V ±1.0% S-1133B37-U5T1x S-1133B37-I8T1x
3.8 V ±1.0% S-1133B38-U5T1x S-1133B38-I8T1x
3.9 V ±1.0% S-1133B39-U5T1x S-1133B39-I8T1x
4.0 V ±1.0% S-1133B40-U5T1x S-1133B40-I8T1x
4.1 V ±1.0% S-1133B41-U5T1x S-1133B41-I8T1x
4.2 V ±1.0% S-1133B42-U5T1x S-1133B42-I8T1x
4.3 V ±1.0% S-1133B43-U5T1x S-1133B43-I8T1x
4.4 V ±1.0% S-1133B44-U5T1x S-1133B44-I8T1x
4.5 V ±1.0% S-1133B45-U5T1x S-1133B45-I8T1x
4.6 V ±1.0% S-1133B46-U5T1x S-1133B46-I8T1x
4.7 V ±1.0% S-1133B47-U5T1x S-1133B47-I8T1x
4.8 V ±1.0% S-1133B48-U5T1x S-1133B48-I8T1x
4.9 V ±1.0% S-1133B49-U5T1x S-1133B49-I8T1x
5.0 V ±1.0% S-1133B50-U5T1x S-1133B50-I8T1x
5.1 V ±1.0% S-1133B51-U5T1x S-1133B51-I8T1x
5.2 V ±1.0% S-1133B52-U5T1x S-1133B52-I8T1x
5.3 V ±1.0% S-1133B53-U5T1x S-1133B53-I8T1x
5.4 V ±1.0% S-1133B54-U5T1x S-1133B54-I8T1x
5.5 V ±1.0% S-1133B55-U5T1x S-1133B55-I8T1x
5.6 V ±1.0% S-1133B56-U5T1x S-1133B56-I8T1x
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 5
Table 1 (2/2)
Output Voltage SOT-89-5 SNT-8A
5.7 V ±1.0% S-1133B57-U5T1x S-1133B57 I8T1x
5.8 V ±1.0% S-1133B58-U5T1x S-1133B58-I8T1x
5.9 V ±1.0% S-1133B59-U5T1x S-1133B59-I8T1x
6.0 V ±1.0% S-1133B60-U5T1x S-1133B60-I8T1x
Remark 1. Please contact our sales office for type A products.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
6 Seiko Instruments Inc.
Pin Configurations
Table 2
Pin No. Symbol Description
VADJ Output voltage adjustment pin
(S-1133B00/S-1133A00 only)
1
NC*1 No connection
(S-1133x12 to S-1133x60)
2 VSS GND pin
3 ON/OFF Shutdown pin
4 VIN Voltage input pin
5 VOUT Voltage output pin
5 4
1 3 2
SOT-89-5
Top vie
w
*1. The NC pin is electrically open.
The NC pin can be connected to VIN or VSS.
Figure 3
Table 3
Pin No. Pin Name Functions
1 VOUT*1 Voltage output pin
2 VOUT*1 Voltage output pin
NC*2 No connection
(S-1133x12 to S-1133x60)
1
2
3
4
SNT-8A
Top view
8
7
6
5 3 VADJ Output voltage adjustment pin
(S-1133B00/S-1133A00 only)
4 NC*2 No connection
5 VSS GND pin
Figure 4 6 ON/OFF Shutdown pin
7 VIN*3 Voltage input pin
8 VIN*3 Voltage input pin
*1. Although pins of number 1 and 2 are connected internally, be
sure to short-circuit them nearest in use.
*2. The NC pin is electrically open.
The NC pin can be connected to VIN or VSS.
*3. Although pins of number 7 and 8 are connected internally, be
sure to short-circuit them nearest in use.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 7
Absolute Maximum Ratings
Table 4
(Ta = 25 °C unless otherwise specified)
Item Symbol Absolute Maximum Rating Unit
VIN V
SS 0.3 to VSS + 12 V
VON/OFF V
SS 0.3 to VSS + 12 V
Input voltage VADJ V
SS 0.3 to VSS + 12 V
Output voltage VOUT V
SS 0.3 to VIN + 0.3 V
SOT-89-5 1000*1 mW
Power dissipation SNT-8A PD 450*1 mW
Operating ambient temperature Topr 40 to +85 °C
Storage temperature Tstg 40 to +125 °C
*1. When mounted on printed circuit board
[Mounted Board]
(1) Board size : 114.3 mm × 76.2 mm × t1.6 mm
(2) Board name : JEDEC STANDARD51-7
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
0 50 100 150
1200
800
0
Power Dissipation (PD) [mW]
Ambient Temperature (Ta) [°C]
400
SNT-8A
SOT-89-5
Figure 5 Power Dissipation of Packages (Mounted on Printed Circuit Board)
Caution The thermal shutdow n circuit may operate when the junction temperature is around 150 °C.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
8 Seiko Instruments Inc.
Electrical Characteristics
1. Types in which output voltage is internally set (S-1133x12 to S-1133x60)
Table 5 (Ta = 25 °C unless otherwise specified)
Item Symbol Conditions Min. Typ. Max. Unit
Test
Circuit
Output voltage
*1
VOUT(E)
1.2 V
V
OUT(S)
1.4 V
VOUT(S)
0.015 VOUT(S) VOUT(S)
+ 0.015 V 1
V
IN
=
V
OUT(S)
+
1.0 V,
I
OUT
=
100 mA
1.5 V
V
OUT(S)
6.0 V
VOUT(S)
× 0.99 VOUT(S) VOUT(S)
× 1.01 V 1
Output current
*2
IOUT
V
IN
V
OUT(S)
+
1.0 V
300*5 mA 3
Dropout voltage
*3
Vdrop
I
OUT
=
100 mA V
OUT(S)
=
1.2 V
0.8 0.84 0.88 V 1
V
OUT(S)
=
1.3 V
0.74 0.78 V 1
V
OUT(S)
=
1.4 V
0.64 0.68 V 1
1.5 V
V
OUT(S)
1.9 V
0.54 0.58 V 1
2.0 V
V
OUT(S)
2.4 V
0.15 0.23 V 1
2.5 V
V
OUT(S)
2.9 V
0.14 0.21 V 1
3.0 V
V
OUT(S)
3.2 V
0.13 0.19 V 1
3.3 V
V
OUT(S)
6.0 V
0.10 0.15 V 1
Line regulation
OUTIN
OUT1
VVV
Δ
Δ
V
OUT(S)
+
0.5 V
V
IN
10 V, I
OUT
=
100 mA
0.02 0.2 %/V 1
Load regulation
ΔVOUT2
V
IN
=
V
OUT(S)
+
1.0 V,
1.0 mA
I
OUT
100 mA
15 40 mV 1
Output voltage
temperature coefficient
*4
OUT
OUT
VTa
V
Δ
Δ
V
IN
=
V
OUT(S)
+
1.0 V, I
OUT
=
30 mA,
40
°
C
Ta
85
°
C
±130 ppm/
°C 1
Current consumption
during operation
ISS1
V
IN
=
V
OUT(S)
+
1.0 V, ON/OFF pin
=
ON,
no load
60 90 μA 2
Current consumption
during shutdown
ISS2
V
IN
=
V
OUT(S)
+
1.0 V, ON/OFF pin
=
OFF,
no load
0.1 1.0 μA 2
Input voltage
VIN
2.0 10 V
Shutdown pin
input voltage “H”
VSH
V
IN
=
V
OUT(S)
+
1.0 V, R
L
=
1.0 k
Ω
1.5 V 4
Shutdown pin
input voltage “L”
VSL
V
IN
=
V
OUT(S)
+
1.0 V, R
L
=
1.0 k
Ω
0.25 V 4
Shutdown pin
input current “H”
ISH
V
IN
=
V
OUT(S)
+
1.0 V, V
ON/OFF
=
7 V
0.1 0.1 μA 4
Shutdown pin
input current “L”
ISL
V
IN
=
V
OUT(S)
+
1.0 V, V
ON/OFF
=
0 V
0.1 0.1 μA 4
1.2 V
V
OUT(S)
1.5 V
70 dB 5
1.6 V
V
OUT(S)
3.0 V
65 dB 5
Ripple rejection
RR
V
IN
=
V
OUT(S)
+
1.0 V,
f
=
1.0 kHz,
Δ
V
rip
=
0.5 Vrms,
I
OUT
=
50 mA 3.1 V
V
OUT(S)
6.0 V
60 dB 5
Short-circuit current
Ishort
V
IN
=
V
OUT(S)
+
1.0 V, ON/OFF pin
=
ON,
V
OUT
=
0 V
200 mA 3
Thermal shutdown
detection temperature
TSD
Junction temperature
150 °C
Thermal shutdown
release temperature
TSR
Junction temperature
120 °C
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 9
*1. V
OUT(S) : Specified output voltage
VOUT(E) : Actual output voltage at the fixed load
The output voltage when fixing IOUT (= 100 mA) and inputting VOUT(S) + 1.0 V
*2. The output current at which the output voltage becomes 95% of VOUT(E) after gradually increasing the output current.
*3. V
drop = VIN1 (VOUT3 × 0.98)
V
OUT3 is the output voltage when VIN = VOUT(S) + 1.0 V and IOUT = 100 mA.
VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input
voltage.
*4. The change in temperature [mV/°C] is calculated using the following equation.
[] [] []
1000Cppm/
VΔTa
ΔV
VVCmV/
ΔTa
ΔV*3
OUT
OUT
2*
OUT(S)
1*
OUT ÷°×=°
*1. The change in temperature of the output voltage
*2. Specified output voltage
*3. Output voltage temperature coefficient
*5. T he output current can be at least this value. Due to restrictions on the package power dissipation, this value may not
be satisfied. Attention should be paid to the power dissipation of the package when the output current is large. This
specification is guaranteed by design.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
10 Seiko Instruments Inc.
2. Types in which output voltage is externally set (S-1133B00 and S-1133A00 only)
Table 6 (Ta = 25 °C unless otherwise specified)
Item Symbol Conditions Min. Typ. Max. Unit
Test
Circuit
Output voltage of adjust
pin
*1
VVADJ
V
VADJ
=
V
OUT
, V
IN
=
V
OUT(S)
+
1.0 V,
I
OUT
=
100 mA
1.782 1.800 1.818 V 6
Output voltage range
VROUT
1.8 8.2 V 11
Internal resistance value
of adjust pin
RVADJ
200 kΩ
Output current
*2
IOUT
V
IN
V
OUT(S)
+
1.0 V
300*5 mA 8
Dropout voltage
*3
Vdrop
I
OUT
=
100 mA, V
VADJ
=
V
OUT
, V
OUT(S)
=
1.8 V
0.24 0.28 V 6
Line regulation
OUTIN
OUT1
VVV
Δ
Δ
V
VADJ
=
V
OUT
, V
OUT(S)
+
0.5 V
V
IN
10 V,
I
OUT
=
100 mA
0.02 0.2 %/V 6
Load regulation
ΔVOUT2
V
VADJ
=
V
OUT
, V
IN
=
V
OUT(S)
+
1.0 V,
1.0 mA
I
OUT
100 mA
15 40 mV 6
Output voltage
temperature coefficient
*4
OUT
OUT
VTa
V
Δ
Δ
V
IN
=
V
OUT(S)
+
1.0 V, I
OUT
=
30 mA,
40
°
C
Ta
85
°
C
±130 ppm/
°C 6
Current consumption
during operation
ISS1
V
IN
=
V
OUT(S)
+
1.0 V, V
OUT
=
V
VADJ
,
ON/OFF pin
=
ON, no load
60 90 μA 7
Current consumption
during shutdown
ISS2
V
IN
=
V
OUT(S)
+
1.0 V, V
OUT
=
V
VADJ
,
ON/OFF pin
=
OFF, no load
0.1 1.0 μA 7
Input voltage
VIN
2.0 10 V
Shutdown pin
input voltage “H”
VSH
V
IN
=
V
OUT(S)
+
1.0 V, R
L
=
1.0 k
Ω
1.5 V
9
Shutdown pin
input voltage “L”
VSL
V
IN
=
V
OUT(S)
+
1.0 V, R
L
=
1.0 k
Ω
0.25 V 9
Shutdown pin
input current “H”
ISH
V
IN
=
V
OUT(S)
+
1.0 V, V
ON/OFF
=
7 V
0.1 0.1 μA 9
Shutdown pin
input current “L”
ISL
V
IN
=
V
OUT(S)
+
1.0 V, V
ON/OFF
=
0 V
0.1 0.1 μA 9
Ripple rejection
RR
V
VADJ
=
V
OUT
, V
IN
=
V
OUT(S)
+
1.0 V,
f
=
1.0 kHz,
Δ
V
rip
=
0.5 Vrms,
I
OUT
=
50 mA, V
OUT(S)
=
1.8 V
65 dB 10
Short-circuit current
Ishort
V
IN
=
V
OUT(S)
+
1.0 V, ON/OFF pin
=
ON,
V
OUT
=
0 V
200 mA 8
Thermal shutdown
detection temperature
TSD
Junction temperature
150 °C
Thermal shutdown
release temperature
TSR
Junction temperature
120 °C
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 11
*1. V
OUT(S) : Extarnal setting reference voltage ( = 1.8 V)
*2. The output current at which the output voltage becomes 95% of VVADJ after gradually increasing the output current.
*3. V
drop = VIN1 (VOUT3 × 0.98)
V
OUT3 is the output voltage when VIN = VOUT(S) + 1.0 V and IOUT = 100 mA.
VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input
voltage.
*4. The change in temperature [mV/°C] is calculated using the following equation.
[] [] []
1000Cppm/
VΔTa
ΔV
VVCmV/
ΔTa
ΔV*3
OUT
OUT
*2
OUT(S)
*1
OUT ÷°×=°
*1. The change in temperature of the output voltage
*2. Extarnal setting reference voltage
*3. Output voltage temperature coefficient
*5. T he output current can be at least this value. Due to restrictions on the package power dissipation, this value may not
be satisfied. Attention should be paid to the power dissipation of the package when the output current is large. This
specification is guaranteed by design.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
12 Seiko Instruments Inc.
Test Circuits
1.
VSS
VOUT
ON/OFF
VIN
V
A
Set to power ON
+
+
Figure 6
2.
VSS
VOUT
ON/OFF
VIN
Set to VIN or
GND
A
+
Figure 7
3.
VSS
VOUT
ON/OFF
VIN
V
A
Set to power ON
+
+
Figure 8
4.
VSS
VOUT
ON/OFF
VIN
A V
RL
+ +
Figure 9
5.
VSS
VOUT
ON/OFF
VIN
V +
Set to power ON
RL
Figure 10
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 13
6.
VSS
VOUT
ON/OFF
VIN
V
A
Set to power ON
+
+
VADJ
Figure 11
7.
VSS
VOUT
ON/OFF
VIN
Set to VIN or
GND
A VADJ
+
Figure 12
8.
VSS
VOUT
ON/OFF
VIN
V
A
Set to power ON
+
+
VADJ
Figure 13
9.
VSS
VOUT
ON/OFF
VIN
V
A RL
+
+ VADJ
Figure 14
10.
VSS
VOUT
ON/OFF
VIN
V +
Set to power ON
RL
VADJ
Figure 15
11.
VSS
VOUT
ON/OFF
VIN
V
A
Set to power ON
+
+
VADJ
Figure 16
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
14 Seiko Instruments Inc.
Standard Circuit
VSS
VOUT
ON/OFF
VIN
CIN
*1
CL
*
2
INPUT OUTPUT
GND
Single GND
*1. C
IN is a capacitor for stabilizing the input.
A ceramic capacitor of 2.2 μF or more can be used as the output capacitor for
products whose output voltage is 1.7 V or less.
*2. A ceramic capacitor of 1.0 μF or more can be used for CL.
A ceramic capacitor of 2.2 μF or more can be used as the output capacitor for
products whose output voltage is 1.7 V or less.
Figure 17
Caution The above connection diagram and constant will not guarantee successful operation. Perform
thorough evaluation using the actual application to set the constant.
Application Conditions
Input capacitor (CIN) : 1.0 μF or more*1
Output capacitor (CL) : 1.0 μF or more*1
ESR of output capacitor : 1.0 Ω or less
*1. 2.2 μF or more for products whose output voltage is 1.7 V or less
Caution A general series regulator may oscillate, depending on the external components selected. Check
that no oscillation occurs w i th the application using the above capacitor.
Selection of Input and Output Capacitors (CIN, CL)
The S-1133 Series requires an output capacitor between the VOUT and VSS pins for phase compensation. Operation is
stabilized by a ceramic capacitor with an output capacitance of 1.0 μF or more*1 in the entire temperature range. However,
when using an OS capacitor, tantalum capacitor, or aluminum electrolytic capacitor, a capacitor with a capacitance of 1.0 μF
or more and an Equivalent Series Resistance (ESR) of 1.0 Ω or less is required.
The value of the output overshoot or undershoot transient response varies depending on the value of the output capacitor.
Perform thorough evaluation using the actual application, including temperature characteristics.
*1. The capacitance is 2.2 μF or more for products whose output voltage is 1.7 V or less.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 15
Explanation of Terms
1. Low dropout voltage regulator
The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in low on-
resistance transistor.
2. Low ESR
A capacitor whose ESR (Equivalent Series Resistance) is low. The S-1133 Series enables use of a low ESR
capacitor, such as a ceramic capacitor, for the output-side capacitor CL. A capacitor whose ESR is 1.0 Ω or less can
be used.
3. Output voltage (VOUT)
The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input voltage*1, fixed
output current, and fixed temperature.
*1. Differs depending on the product.
Caution If the above conditions change, the output voltage value may vary and exceed the accuracy
range of the output voltage. Please see the electrical characteristics and attached
characteristics data for details.
Remark In the types of the S-1133 Series in which the output voltage is 1.2 to 1.4 V, the output voltage accuracy
is ±15 mV.
4. Line regulation
ΔV
IN
ΔV
OUT1
V
OUT
Indicates the dependency of the output voltage on the input voltage. That is, the values show how much the output
voltage changes due to a change in the input voltage with the output current remaining unchanged.
5. Load regulation (ΔVOUT2)
Indicates the dependency of the output voltage on the output current. That is, the values show how much the
output voltage changes due to a change in the output current with the input voltage remaining unchanged.
6. Dropout voltage (Vdrop)
Indicates the difference between the input voltage VIN1, which is the input voltage (VIN) at the point where the output
voltage has fallen to 98% of the output voltage value VOUT3 after VIN was gradually decreased from VIN = VOUT(S) +
1.0 V, and the output voltage at that point (VOUT3 × 0.98).
Vdrop = VIN1 (VOUT3 × 0.98)
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
16 Seiko Instruments Inc.
7. Temperature coefficient of output voltage
ΔTa
Δ
V
OUT
V
OUT
The shadowed area in Figure 18 is the range where VOUT varies in the operating temperature range when the
temperature coefficient of the output voltage is ±130 ppm/°C.
VOUT
(
E
)
*1
Ex. S-1133B30 Typ.
40 25
+0.39 m V /°C
VOUT
[V]
*1. VOUT(E) is the value of the output voltage measured at 25°C.
85 Ta [°C]
0.39 m V /°C
Figure 18
A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
[] [] []
Cppm/
VTa
V
VVCmV/
Ta
V OUT
OUT
OUT(S)
OUT °
Δ
Δ
×=°
Δ
Δ*3*2*1 ÷ 1000
*1. Change in temperature of output voltage
*2. Specified output voltage
*3. Output voltage temperature coefficient
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 17
Operation
1. Basic operation
Figure 19 shows the block diagram of the S-1133 Series.
The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistance-divided by
feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage necessary to ensure a certain
output voltage free of any fluctuations of input voltage and temperature.
Current
supply
Reference
voltage circuit
VOUT
*1
*1. Parasitic diode
VSS
VIN
Rs
Rf
Error
amplifier
Vref
+
Vfb
Figure 19
2. Output transistor
The S-1133 Series uses a low on-resistance P-channel MOS FET as the output transistor.
Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator fr om being damaged due to inverse
current flowing from the VOUT pin through a parasitic diode to the VIN pin.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
18 Seiko Instruments Inc.
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-in P-channel
MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially reduce the current
consumption. The VOUT pin becomes the VSS level due to the internally divided resistance of several hundreds kΩ
between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 20. Since the ON/OFF pin is neither pulled down nor pulled
up internally, do not use it in the floating state. In addition, note that the current consumption increases if a voltage of
0.3 V to VIN 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not used, connect it to the VSS pin if the
logic type is “A” and to the VIN pin if it is “B”.
Table 7
Logic Type ON/OFF Pin Internal Circuits VOUT Pin Voltage Current Consumption
A “L”: Power on Operating Set value ISS1
A “H”: Power off Stopped VSS level ISS2
B “L”: Power off Stopped VSS level ISS2
B “H”: Power on Operating Set value ISS1
VSS
ON/OFF
VIN
Figure 20
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 19
4. Thermal shutdown circuit
The S-1133 Series implements a thermal shutdown circuit to protect the device from damage due to overheating.
When the junction temperature rises to 150 °C (typ.), the thermal shutdown circuit operates and the regulator operation
stops. When the junction temperature drops to 120 °C (typ.), the thermal shutdown circuit is released and the
regulator operation resumes.
If the thermal shutdown circuit starts operating due to self-heating, the regulator operation stops and the output voltage
falls. When the regulator operation has stopped, no self-heat is generated and the temperature of the IC is lowered.
When the temperature has dropped, the thermal shutdown circuit is released, the regulator operation resumes, and
self-heat is generated again. By repeating this procedure, the output voltage waveform forms pulses. This
phenomenon, stopping and resuming the regulator operation, continues until the internal power consumption is
reduced by reducing either the input voltage or output current or both, or the ambient temperature is lowered.
Table 8
Thermal Shutdown Circuit VOUT Pin Voltage
Operating : 150 °C (typ.)*1 VSS level
Released : 120 °C (typ.)*1 Set value
*1. Junction temperature
5. Externally setting output voltage
The S-1133 Series provides the types in which output voltage can be set via the external resistor (S-1133B00/S-
1133A00). With such types, the external voltage can be optionally set between 1.8 V and 8.2 V by connecting a
resistor (Ra) between the VOUT and VADJ pins and a resistor (Rb) between the VADJ and VSS pins.
The output voltage to be set is determined by the following formulas.
VOUT = 1.8 + Ra × la ·························· (1)
By substituting Ia = IVADJ + 1.8/Rb to above formula (1),
VOUT = 1.8 + Ra × (IVADJ + 1.8/Rb) = 1.8 × (1.0 + Ra/Rb) + Ra × IVADJ ··············· (2)
In above formula (2), Ra × IVADJ is a factor for the output voltage error.
Whether the output voltage error is minute is judged depending on the following (3) formula.
By substituting IVADJ = 1.8/RVADJ to Ra × IVADJ
VOUT = 1.8 × (1.0 + Ra/Rb) + 1.8 × Ra/RVADJ ··························(3)
If RVADJ is sufficiently larger than Ra, the error is judged as minute.
VSS
VOUT
VIN VADJ VOUT
Ra
Rb
Ia
Ib
RVADJ
IVADJ
1.8 V
Figure 21
The following expression is in order to determine output voltage VOUT = 3.0 V.
If resistance Rb = 2 KΩ, substitute internal resistance in adjust pin RVADJ = 200 kΩ (typ.) into (3),
Resistance Ra = (3.0/1.8-1) × ((2 k × 200 k)/(2 k + 200 k)) 1.3 kΩ
Caution The above connection diagrams and constants will not guarantee successful operation. Perform
thorough evaluation using the actual application to set the constants.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
20 Seiko Instruments Inc.
Precautions
Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low. When
mounting an output capacitor between the VOUT and VSS pins (CL) and a capacitor for stabilizing the input between
VIN and VSS pins (CIN), the distance from the capacitors to these pins should be as short as possible.
When setting the output voltage using the external resistor, connect the resistors, Ra between the VOUT and VADJ
pins and Rb between the VADJ and VSS pins close to the respective pins.
In the product that users set the output voltage externally, it is possible to set a voltage arbitrarily; by feeding back
the voltage which is from VOUT to the VADJ pin, after dividing it with the dividers connected between the VOUT and
VADJ pin and the VADJ and VSS pin.
Note that if any device other than the divider specified above is connected between the VOUT and VADJ pin or the
VADJ and VSS pin, S-1133 Series may not work stably as a voltage regulator IC.
Note that the output voltage may increase when a series regulator is used at low load current (1.0 mA or less).
Note that the output voltage may increase due to driver leakage when a series regulator is used at high
temperatures.
A general series regulator may oscillate, depending on the external components selected. The following conditions
are recommended for this IC. However, be sure to perform sufficient evaluation under the actual usage conditions
for selection, including evaluation of temperature characteristics.
Input capacitor (CIN) : 1.0 μF or more*1
Output capacitor (CL) : 1.0 μF or more*1
Equivalent series resistance (ESR) : 1.0 Ω or less
*1. The capacitance is 2.2 μF or more for products whose output voltage is 1.7 V or less.
The voltage regulator may oscillate when the impedance of the power supply is high and the input capacitor is small
or an input capacitor is not connected.
The power supply fluctuation and load fluctuation characteristics become worse. It is therefore important to
sufficiently evaluate the output voltage fluctuation in the actual equipment.
If the power supply suddenly increases sharply, a momentary overshoot may be output. It is therefore important to
sufficiently evaluate the output voltage at power application in the actual equipment.
When the thermal shutdown circuit starts operating and the regulator stops, input voltage may exceed the absolute
maximum ratings.
It will be affected largely when input voltage, output current and inductance of power supply are high.
Perform thorough evaluation using the actual application.
The application conditions for the input voltage, output voltage, and load current should not exceed the package
power dissipation.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
In determining the output current, attention should be paid to the output current value specified in Tabl es 5 and 6 in
“Electrical Characteristics” and footnote *5 of the table.
SII claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 21
Characteristics (Typical Data)
(1) Output voltage vs. Output current (when load curren t increases) (Ta = 25 °C)
S-1133B12 S-1133B30
   











 





=












     

=




S-1133B60




     

=




Remark In determining the output current, attention
should be paid to the following.
1. The minimum output current value and
footnote *5 in Table 5 to 6 in the
Electrical Characteristics
2. The package power dissipation
(2) Output voltage vs. Input voltage (Ta = 25 °C)
S-1133B12 S-1133B30
1.0 1.5 2.0 2.5
VOUT [V]
1.25
1.20
1.15
1.10
1.05
1.00
VIN [V]
1.30
3.53.0
100 mA
I
OUT
= 1 mA
30 mA
2.5 3.0 3.5 4.0 4.5
VOUT [V]
3.0
2.9
2.8
2.7
2.6
2.5
VIN [V]
3.1
5.0
100 mA
I
OUT
= 1 mA
30 mA
S-1133B60
4.5 5.0 6.05.5 7.06.5
VOUT [V]
6.0
5.5
5.0
4.5
VIN [V]
6.5
100 mA
I
OUT
= 1 mA
30 mA
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
22 Seiko Instruments Inc.
(3) Dropout voltage vs. Output current
S-1133B12 S-1133B30
  













   

°

°
-

°
0100 150 350
V
drop
[V]
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.05
0.10
0
I
OUT
[mA]
50 200 250 300
85°C25°C
40°C
S-1133B60
0100 150 350
V
drop
[V]
0
I
OUT
[mA]
50 200 250 300
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.05
0.10
85°C
25°C
40°C
(4) Dropout voltage vs. Set output voltage














 
 
 
 
 
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 23
(5) Output voltage vs. Ambient temperature
S-1133B12 S-1133B30
-
   
 








°



-
 









°




 
-

-

S-1133B60









°




 
-

-

(6) Current consumption vs. Input voltage
S-1133B12 S-1133B30
02 5678910
ISS1 [μA]
30
20
0
VIN [V]
134
60
10
40
50 85°C
25°C40°C
02 5678910
ISS1 [μA]
30
20
0
VIN [V]
134
60
10
40
50 85°C25°C
40°C
S-1133B60
02 5678910
ISS1 [μA]
30
20
0
VIN [V]
134
60
10
40
50 85°C
25°C
40°C
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
24 Seiko Instruments Inc.
(7) Ripple rejection (Ta = 25 °C)
S-1133B12 VIN = 2.2 V, COUT = 2.2 μF S-1133B30 VIN = 4.0 V, COUT = 1.0 μF
10 100 1K 10K 100K
Ripple Rejection [dB]
0
20
40
60
80
Frequency [Hz] 1M
100
50 mA
I
OUT
= 1 mA
100 mA
    
  




 



!
"
#$%
=

S-1133B60 VIN = 7.0 V, COUT = 1.0 μF
    
  




 



!
"
#$%
=

HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 25
Reference Data
(1) Input transient response characteristics (Ta = 25 °C)
S-1133B12
IOUT = 100 mA, tr = tf = 5.0 μs, COUT = 2.2 μF, CIN = 2.2 μF S-1133B30
IOUT = 100 mA, tr = tf = 5.0 μs, COUT = 1.0 μF, CIN = 1.0 μF
1.36
1.32
1.28
1.24
1.20
1.16
1.12
20 80 120 180
V
OUT
[V]
t [μs]
V
IN
[V]
3.5
3.0
2.5
0.5
1.0
1.5
2.0
0 20 40 60 100 140160
V
OUT
V
IN
3.16
3.12
3.08
3.04
3.00
2.96
2.92
20 80 120 180
VOUT [V]
t [μs]
VIN [V]
6
5
4
0
1
2
3
0 20 40 60 100 140160
V
OUT
V
IN
S-1133B60
IOUT = 100 mA, tr = tf = 5.0 μs, COUT = 1.0 μF, CIN = 1.0 μF
6.16
6.12
6.08
6.04
6.00
5.96
5.92
20 80 120 180
V
OUT
[V]
t [μs]
V
IN
[V]
9
8
7
3
4
5
6
0 20 40 60 100 140160
VOUT
VIN
(2) Load transient response characteristics (Ta = 25 °C)
S-1133B12
VIN = 2.2 V, COUT = 2.2 μF, CIN = 2.2 μF, IOUT = 50 100 mA S-1133B30
VIN = 4.0 V, COUT = 1.0 μF, CIN = 1.0 μF, IOUT = 50 100 mA
40 60 100 160
V
OUT
[V]
1.6
1.5
1.4
1.3
1.2
1.1
1.0
t [μs]
I
OUT
[mA]
150
100
50
150
100
50
0
20 0 20 40 80 120140
V
OUT
I
OUT
40 60 100 160
V
OUT
[V]
3.16
3.12
3.08
3.04
3.00
2.96
2.92
t [μs]
I
OUT
[mA]
150
100
50
150
100
50
0
20 0 20 40 80 120140
V
OUT
I
OUT
S-1133B60
VIN = 7.0 V, COUT = 1.0 μF, CIN = 1.0 μF, IOUT = 50 100 mA
40 60 100 160
V
OUT
[V]
6.16
6.12
6.08
6.04
6.00
5.96
5.92
t [μs]
I
OUT
[mA]
150
100
50
150
100
50
0
20 0 20 40 80 120140
V
OUT
I
OUT
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
26 Seiko Instruments Inc.
(3) ON/OFF pin transien t resp onse characteristics (Ta = 25 °C)
S-1133B12
VIN = 2.2 V, COUT = 2.2 μF, CIN = 2.2 μF, IOUT = 100 mA S-1133B30
VIN = 4.0 V, COUT = 1.0 μF, CIN = 1.0 μF, IOUT = 100 mA
V
OUT
[V]
5
4
3
2
1
0
1
V
ON/OFF
[V]
6
4
2
0
6
4
2
40 60 100 160
t [μs]
20 0 20 40 80 120140
V
ON/OFF
V
OUT
V
OUT
[V]
10
8
6
4
2
0
2
V
ON/OFF
[V]
6
4
2
0
6
4
2
40 60 100 160
t [μs]
20 0 20 40 80 120140
V
ON/OFF
V
OUT
S-1133B60
VIN = 7.0 V, COUT = 1.0 μF, CIN = 1.0 μF, IOUT = 100 mA
V
OUT
[V]
10
8
6
4
2
0
2
12
14
V
ON/OFF
[V]
8
4
2
0
8
6
4
2
6
40 60 100 160
t [μs]
20 0 20 40 80 120140
V
ON/OFF
V
OUT
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.3.0_00 S-1133 Series
Seiko Instruments Inc. 27
Marking Specifications
(1) SOT-89-5
(1) to (3) : Product code (Refer to Product name vs. Product code.)
(4) to (6) : Lot number
5 4
1 3
2
(2)
SOT-89-5
To
p
vie
w
(1) (3)
(5) (4) (6)
Product name vs. Product code
Product code Product code
Product name (1) (2) (3) Product name (1) (2) (3)
S-1133B00-U5T1x Q 8 A S-1133B36-U5T1x Q 8 Z
S-1133B12-U5T1x Q 8 B S-1133B37-U5T1x Q 9 A
S-1133B13-U5T1x Q 8 C S-1133B38-U5T1x Q 9 B
S-1133B14-U5T1x Q 8 D S-1133B39-U5T1x Q 9 C
S-1133B15-U5T1x Q 8 E S-1133B40-U5T1x Q 9 D
S-1133B16-U5T1x Q 8 F S-1133B41-U5T1x Q 9 E
S-1133B17-U5T1x Q 8 G S-1133B42-U5T1x Q 9 F
S-1133B18-U5T1x Q 8 H S-1133B43-U5T1x Q 9 G
S-1133B19-U5T1x Q 8 I S-1133B44-U5T1x Q 9 H
S-1133B20-U5T1x Q 8 J S-1133B45-U5T1x Q 9 I
S-1133B21-U5T1x Q 8 K S-1133B46-U5T1x Q 9 J
S-1133B22-U5T1x Q 8 L S-1133B47-U5T1x Q 9 K
S-1133B23-U5T1x Q 8 M S-1133B48-U5T1x Q 9 L
S-1133B24-U5T1x Q 8 N S-1133B49-U5T1x Q 9 M
S-1133B25-U5T1x Q 8 O S-1133B50-U5T1x Q 9 N
S-1133B26-U5T1x Q 8 P S-1133B51-U5T1x Q 9 O
S-1133B27-U5T1x Q 8 Q S-1133B52-U5T1x Q 9 P
S-1133B28-U5T1x Q 8 R S-1133B53-U5T1x Q 9 Q
S-1133B29-U5T1x Q 8 S S-1133B54-U5T1x Q 9 R
S-1133B30-U5T1x Q 8 T S-1133B55-U5T1x Q 9 S
S-1133B31-U5T1x Q 8 U S-1133B56-U5T1x Q 9 T
S-1133B32-U5T1x Q 8 V S-1133B57-U5T1x Q 9 U
S-1133B33-U5T1x Q 8 W S-1133B58-U5T1x Q 9 V
S-1133B34-U5T1x Q 8 X S-1133B59-U5T1x Q 9 W
S-1133B35-U5T1x Q 8 Y S-1133B60-U5T1x Q 9 X
Remark 1. Please contact the SII marketing department for type A products.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1133 Series Rev.3.0_00
28 Seiko Instruments Inc.
(2) SNT-8A
(1) Blank
(2) to (4) Product code (Refer to Product name vs. Product code)
(5), (6) Blank
(7) to (11) Lot number
SNT-8A
Top view
1
4
8
5
(9)
(6)
(2)
(10)
(7)
(3)
(11)
(8)
(4)
(5)
(1)
Product name vs. Product code
Product code Product code
Product name (2) (3) (4) Product name (2) (3) (4)
S-1133B00-I8T1x Q 8 A S-1133B36-I8T1x Q 8 Z
S-1133B12-I8T1x Q 8 B S-1133B37-I8T1x Q 9 A
S-1133B13-I8T1x Q 8 C S-1133B38-I8T1x Q 9 B
S-1133B14-I8T1x Q 8 D S-1133B39-I8T1x Q 9 C
S-1133B15-I8T1x Q 8 E S-1133B40-I8T1x Q 9 D
S-1133B16-I8T1x Q 8 F S-1133B41-I8T1x Q 9 E
S-1133B17-I8T1x Q 8 G S-1133B42-I8T1x Q 9 F
S-1133B18-I8T1x Q 8 H S-1133B43-I8T1x Q 9 G
S-1133B19-I8T1x Q 8 I S-1133B44-I8T1x Q 9 H
S-1133B20-I8T1x Q 8 J S-1133B45-I8T1x Q 9 I
S-1133B21-I8T1x Q 8 K S-1133B46-I8T1x Q 9 J
S-1133B22-I8T1x Q 8 L S-1133B47-I8T1x Q 9 K
S-1133B23-I8T1x Q 8 M S-1133B48-I8T1x Q 9 L
S-1133B24-I8T1x Q 8 N S-1133B49-I8T1x Q 9 M
S-1133B25-I8T1x Q 8 O S-1133B50-I8T1x Q 9 N
S-1133B26-I8T1x Q 8 P S-1133B51-I8T1x Q 9 O
S-1133B27-I8T1x Q 8 Q S-1133B52-I8T1x Q 9 P
S-1133B28-I8T1x Q 8 R S-1133B53-I8T1x Q 9 Q
S-1133B29-I8T1x Q 8 S S-1133B54-I8T1x Q 9 R
S-1133B30-I8T1x Q 8 T S-1133B55-I8T1x Q 9 S
S-1133B31-I8T1x Q 8 U S-1133B56-I8T1x Q 9 T
S-1133B32-I8T1x Q 8 V S-1133B57-I8T1x Q 9 U
S-1133B33-I8T1x Q 8 W S-1133B58-I8T1x Q 9 V
S-1133B34-I8T1x Q 8 X S-1133B59-I8T1x Q 9 W
S-1133B35-I8T1x Q 8 Y S-1133B60-I8T1x Q 9 X
Remark 1. Please contact the SII marketing department for type A products.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.