REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate. Add QD certification. Change code ident. no. to 67268. Editorial changes throughout. --les 00-06-22 Raymond Monnin B Update to current requirements. Editorial changes throughout. - gap 06-01-05 Raymond Monnin CURRENT CAGE CODE 67268 The original first page of this drawing has been replaced. REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Joe A. Kerby DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY D. A. DiCenzo APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE N. A. Hauch DRAWING APPROVAL DATE MICROCIRCUIT, DIGITAL, ADVANCED SCHOTTKY TTL, QUAD NONINVERTING BUS TRANSCEIVERS WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON 87-05-08 AMSC N/A REVISION LEVEL B SIZE CAGE CODE A 14933 SHEET DSCC FORM 2233 APR 97 . 1 OF 5962-86834 10 5962-E083-06 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86834 01 C X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 Circuit function 54F243 Quad noninverting bus transceivers, with three-state outputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter C D 2 Descriptive designator GDIP1-T14 or CDIP2-T14 GDFP1-F14 or CDFP2-F14 CQCC1-N20 Terminals Package style 14 14 20 Dual-in-line Flat pack Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range (VCC) ............................................................................ -0.5 V dc to +7.0 V dc DC input voltage range (VIN) .......................................................................... -0.5 V dc to VCC +0.5 V dc Storage temperature range (TSTG) ................................................................. -65C to +150C Maximum power dissipation (PD) ................................................................... 495 mW 1/ Lead temperature (soldering, 10 seconds) ..................................................... +300C Thermal resistance, junction-to-case (JC) ..................................................... See MIL-STD-1835 Junction temperature (TJ) .............................................................................. +175C 2/ 1.4 Recommended operating conditions. Supply voltage range (VCC) .............................................................................. 4.5 V dc minimum to 5.5 V dc maximum Minimum high level input voltage (VIH) ............................................................. 2.0 V dc Maximum low level input voltage (VIL) ............................................................. 0.8 V dc Normalized fanout (each output): Low-level logic .............................................................................................. 33 maximum High-level logic ............................................................................................. 50 maximum Case operating temperature range (TC) ........................................................... -55C to +125C ___________ 1/ Maximum power dissipation is defined as VCC x ICC, and must withstand the added PD due to short circuit test; e.g., IOS. 2/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86834 A REVISION LEVEL B SHEET 2 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil;quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MILPRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MILPRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to allow the manufacturer to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535 or other alternative approved by the qualifying activity. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86834 A REVISION LEVEL B SHEET 3 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. A compliance indicator "C" shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator "C" shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. For product built in accordance with A.3.2.2 of MIL-PRF-38535, or as modified in the manufacturer's QM plan, the "QD" certification mark shall be used in place of the "Q" or "QML" certification mark. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86834 A REVISION LEVEL B SHEET 4 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C Group A subgroups unless otherwise specified High level output voltage Limits Min Unit Max VOH VCC = 4.5 V, IOH = -3 mA, VIL = 0.8 V, VIH = 2.0 mA 1, 2, 3 2.4 V VOH1 VCC = 4.5 V, IOH = -12 mA, VIL = 0.8 V, VIH = 2.0 mA 1, 2, 3 2.0 V Low level output voltage VOL VCC = 4.5 V, IOL = 48 mA, VIL = 0.8 V, VIH = 2.0 mA 1, 2, 3 0.55 V Input clamp voltage VIC II = -18 mA, TC = +25C, VCC = 0.0 V 1 -1.2 V High-level input current IIH1 VCC = 5.5 V, VIH = 2.7 V 1, 2, 3 20 A IIH2 VCC = 5.5 V, VIH = 7.0 V enable inputs only 1, 2, 3 100 A IIH3 VCC = 5.5 V, VIH = 5.5 V data inputs only 1, 2, 3 1.0 mA IIL1 VCC = 5.5 V, VIL = 0.5 V E BA input 1, 2, 3 -0.3 -1.0 mA IIL2 VCC = 5.5 V, VIL = 0.5 V EBA input 1, 2, 3 -.06 -1.6 mA Short-circuit output current IOS VCC = 5.5 V, VOUT = 0.0 V 1/ 1, 2, 3 -100 -325 mA Low-level input, off-state low-output current IIOZL VCC = 5.5 V, VIOZL = 0.5 V 1, 2, 3 -0.3 -1.6 mA High-level input, off-state low-output current IIOZH VCC = 5.5 V, VIOZH = 2.7 V 1, 2, 3 70 A Supply current, high ICCH VCC = 5.5 V, VIN = 5.5 V 1, 2, 3 80 mA Supply current, low ICCL VCC = 5.5 V, VIN = 0.0 V 1, 2, 3 92 mA Supply current, disable ICCZ VCC = 5.5 V, VIN = Open 1, 2, 3 90 mA Bn to An tPLH1 9, 10, 11 6.5 ns An to Bn tPLH2 VCC = 5.5 V, CL = 50 pF 10% 2/ RL = 500 5% 9, 10, 11 6.5 ns Bn to An tPHL1 9, 10, 11 8.5 ns An to Bn tPHL2 9, 10, 11 8.5 ns Low-level input current Propagation delay time, low-to-high level Propagation delay time, low-to-high level See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86834 A REVISION LEVEL B SHEET 5 TABLE I. Electrical performance characteristics. Test Symbol Group A subgroups Test conditions -55C TC +125C unless otherwise specified Propagation delay time, low level to off-state Propagation delay time, high level to off-state Propagation delay time, offstate to low level Propagation delay time, offstate to high level Limits Min Unit Max E, E , OE , to An tPLZ1 E, E , OE , to Bn tPLZ2 E, E , OE , to An tPHZ1 9, 10, 11 7.5 ns E, E , OE , to Bn tPHZ2 9, 10, 11 7.5 ns E, E , OE , to An tPZL1 9, 10, 11 10.5 ns E, E , OE , to Bn tPZL2 9, 10, 11 10.5 ns E, E , OE , to An tPZH1 9, 10, 11 8.0 ns E, E , OE , to Bn tPZH2 9, 10, 11 8.0 ns VCC = 5.5 V, CL = 50 pF 10% 2/ RL = 500 5% 9, 10, 11 8.5 ns 9, 10, 11 8.5 ns 1/ Not more than one output should be shorted at a time, and the duration of the short-circuit condition should not exceed one second. 2/ Propagation delay time testing and maximum clock frequency testing may be performed using either CL = 15 pF or CL = 50 pF. However, the manufacturer must certify and guarantee that the microcircuits meet the switching test limits specified for a 50 pF load. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86834 A REVISION LEVEL B SHEET 6 Device type 01 Case Outline C and D 2 Terminal Number 1 Terminal Symbol E AB Terminal Symbol NC 2 NC E AB 3 A0 NC 4 A1 A0 5 A2 NC 6 A3 A1 7 GND NC 8 B3 A2 9 B2 A3 10 B1 GND 11 B0 NC 12 NC B3 13 EBA B2 14 VCC B1 15 --- NC 16 --- B0 17 --- NC 18 --- NC 19 --- EBA 20 --- VCC FIGURE 1. Terminal connections. Outputs Inputs E AB EBA An Bn Bn An L L H - H - L L L - L - H H - H - H H H - L - L H L X - Z - H L - X - Z H= L= Z= X= High voltage level. Low voltage level. High impedance state. Irrelevant. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86834 A REVISION LEVEL B SHEET 7 FIGURE 2. Truth table. FIGURE 3. Logic diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86834 A REVISION LEVEL B SHEET 8 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) --- Final electrical test parameters (method 5004) 1*, 2, 3, 9 Group A test requirements (method 5005) 1, 2, 3, 7, 9, 10, 11** Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. ** Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, 6, and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 7 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86834 A REVISION LEVEL B SHEET 9 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MILHDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-86834 A REVISION LEVEL B SHEET 10 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 06-01-05 Approved sources of supply for SMD 5962-86834 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ Reference military specification PIN 5962-8683401CA 0C7V7 54F243/CA M38510/34802BCA 5962-8683401DA 0C7V7 54F243/DA M38510/34802BDA 5962-86834012A 0C7V7 54F243/2A M38510/34802B2A 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number 0C7V7 Vendor name and address QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.