ISL28291 - Intersil Corporation

FN6156.2

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

ISL28191, ISL28291

Single and Dual Ultra-Low Noise,

Rail-to-Rail, Op Amp

The ISL28191 and ISL28291 are tiny single and dual

ultra-low noise, ultra-low distortion operational amplifiers.

Fully specified to operated down to +3V single supply . These

amplifiers have outputs that swing rail-to-rail, and an input

common mode voltage that extends to ground (ground

sensing).

The ISL28191 and ISL28291 are un ity gain stable with an

input referred voltage noise of 1.7nV/√Hz. Both parts featur e

2nd and 3rd harmonic distortion of -76dBc and -70dBc,

respectively.

The ISL28191 is availa ble in the space-saving 6 Ld µTDFN

(1.6mm x 1.6mm) and SOT-23 packages. The ISL28291 is

available in the 10 Ld µTQF N (1.8mm x 1.4mm) and MSOP

packages. All devices are guaranteed over -40°C to +125°C.

Features

• 1.7nV/√Hz input voltage noise at 1kHz

• Harmonic Distortion -76dBc, -70dBc, fo = 1MHz

• 61MHz -3dB bandwidth

• 630µV maximum offset voltage

• 3µA input bias current

• 100dB typical CMRR

• 3V to 5.5V single supply voltage range

• Rail-to-rail output

• Ground Sensing

• Enable pin

• Pb-free plus anneal available (RoHS compliant)

Applications

• Low noise signal processing

• Low noise microphones/preamplifiers

• ADC buffers

• DAC output amplifiers

• Digital scales

• Strain gauges/sensor amplifiers

• Radio systems

• Portable equipment

• Infrared detectors

Ordering Information

PART NUMBER

(Note) PART

MARKING TAPE &

REEL PACKAGE

(Pb-free) PKG.

DWG. #

ISL28191FHZ-T7 GABJ 3k pcs 6 Ld SOT-23 MDP0038

Coming Soon

ISL28191FRUZ-TK 1k pcs 6 Ld μTDFN L6.1.6x1.6A

ISL28291FUZ 8291Z 50/tube 10 Ld MSOP MDP0043

ISL28291FUZ-T7 8291Z 1.5k pcs 10 Ld MSOP MDP0043

Coming Soon

ISL28291FRUZ-T7 1k pcs 10 Ld μTQFN L10.1.8x1.4A

NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100% matte

tin plate termination finish, which are RoHS compliant and compatible

with both SnPb and Pb-free soldering operations. Intersil Pb-free

products are MSL classified at Pb-free peak reflow temperatures that

meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

Data Sheet April 13, 2007

2FN6156.2

Pinouts ISL28191

(6 LD SOT-23)

TOP VIEW

ISL28191

(6 LD 1.6X1.6X0.5 µTDFN)

TOP VIEW

ISL28291

(10 LD MSOP)

TOP VIEW

ISL28291

(10 LD μTQFN)

TOP VIEW

OUT

V-

IN+

V +

IN-

ENABLE

OUT

IN-

IN+

V+

ENABLE

V-

5 6

OUT_A

IN-_A

IN+_A

V-

V+

OUT_B

IN-_B

IN+_B

ENABLE_A ENABLE_B

IN+_B

IN-_B

OUT_B

V+

OUT_A

V+

ENABLE_A

ENABLE_B

IN+_A

IN-_A

543

ISL28191, ISL28291

3FN6156.2

Absolute Maximum Ratings (TA = +25°C) Thermal Information

Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V

Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs

Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V

ESD tolerance, Human Body Model . . . . . . . . . . . . . . . . . . . . . .3kV

ESD tolerance, Machine Model . . . . . . . . . . . . . . . . . . . . . . . . .300V

Thermal Resistance θJA (°C/W)

6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230

6 Ld µTDFN Package . . . . . . . . . . . . . . . . . . . . . . . 120

10 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . 115

6 Ld µTQFN Package . . . . . . . . . . . . . . . . . . . . . . . 143

Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C

Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . .+125°C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests

are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA

Electrical Specifications V+= 5.0V, V-= GND, RL = 1kΩ, RF = 1kΩ, AV = -1. unless otherwise specified. Parameters are per amplifier.

Typical values are at V+= 5V, TA = +25°C. Boldface limits apply over the operating temperature range,

-40°C to +125°C, temperatur e data guaranteed by characterization

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT

VOS Input Offset Voltage 270 630

840 µV

Input Offset Drift vs Temperature Figure 17 3.1 µV/°C

IOS Input Offset Current 35 500

900 nA

IBInput Bias Current 36

7µA

(1MHz) 2nd Harmonic Distortion 2VP-P output voltage, AV = 1 -76 dBc

3rd Harmonic Distortion -70 dBc

VNInput Referred Voltage Noise fO = 1kHz 1.7 nV/√Hz

IN Input Referred Current Noise fO = 1kHz 1.8 pA/√Hz

CMIR Common-Mode Input Range 0 3.8 V

CMRR Common-Mode Rejection Ratio VCM = 0V to 3.8V 78 100 dB

PSRR Power Supply Rejection Ratio VS = 3V to 5V 74 80 dB

AVOL Large Signal Voltage Gain VO = 0.5V to 4V, RL = 1kΩ90

86 98 dB

VOUT Maximum Output Voltage Swing Output low, RL = 1kΩ20 50

80 mV

Output high, RL = 1kΩ, V+ = 5V 4.95

4.92 4.97 V

SR Slew Rate 12

12 17 V/µs

3dB BW 3dB Bandwidth CL = 20pF, AV = 1, RL = 10kΩ61 MHz

IS,ON Supply Current, Enabled 2.6 3.5

3.9 mA

IS,OFF Supply Current, Disabled 26 35

48 µA

IO+ Short-Circuit Output Current RL = 10Ω95

90 130 mA

IO- Short-Circuit Output Current RL = 10Ω95

90 130 mA

ΔVOS

ΔT

----------------

ISL28191, ISL28291

4FN6156.2

VSUPPLY Supply Operating Range VS+ to VS-35.5V

VINH ENABLE Pin High Level 2 V

VINL ENABLE Pin Low Level 0.8 V

IENH ENABLE Pin Input High Current VEN = V+ 0.8 1.1

1.3 µA

IENL ENABLE Pin Input Low Current VEN = V- 20 80

100 nA

Electrical Specifications V+= 5.0V, V-= GND, RL = 1kΩ, RF = 1kΩ, AV = -1. unless otherwise specified. Parameters are per amplifier.

Typical values are at V+= 5V, TA = +25°C. Boldface limits apply over the operating temperature range,

-40°C to +125°C, temperatur e data guaranteed by characterization

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT

Typical Performance Curves

FIGURE 1. GAIN vs FREQUENCY FOR V ARIOUS RLOAD FIGURE 2. GAIN vs FREQUENCY FOR VARIOUS CLOAD

FIGURE 3. -3dB BANDWIDTH vs VOUT FIGURE 4. INPUT IMPEDANCE vs FREQUENCY

-7

-6

-5

-4

-3

-2

-1

10k 100k 1M 10M 100M

FREQUENCY (Hz)

CLOSED LOOP GAIN (dB)

RL = 100k

V+ = 5V

AV = +1

CL = 10pF

VOUT = 10mVP-P

RL = 10k

RL = 1k

RL = 100

-10

-8

-6

-4

-2

10k 100k 1M 10M 100M

CL = 20pF

CL = 10pF

CL = 32pF

CL = 57pF

CL = 110pF

CLOSED LOOP GAIN ( dB)

V+ = 5V

AV = +1

RL = 10kΩ

VOUT = 10mVp-p

FREQUENCY (Hz)

-7

-6

-5

-4

-3

-2

-1

10k 100K 1M 10M 100M

FREQUENCY (Hz)

CLOSED LOOP GAIN (dB)

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

-8

VOUT = 10mVP-P

VOUT = 100mVP-P

OUT

= 1V

P-P

VOUT = 1mVP-P

100

10k

100k

10k 100k 1M 10M 100M

V+ = 5V, 3V

INPUT IMPEDANCE (Ω)

FREQUENCY (Hz)

ENABLED AND

DISABLED

VSOURCE = 1VP-P

ISL28191, ISL28291

5FN6156.2

FIGURE 5. DISABLED OUTPUT IMPEDANCE vs FREQUENCY FIGURE 6. ENABLED OUTPUT IMPEDANCE vs FREQUENCY

FIGURE 7. CMRR vs FREQUENCY FIGURE 8. PSRR vs FREQUENCY

FIGURE 9. OFF ISOLATION vs FREQUENCY FIGURE 10. CHANNEL TO CHANNEL CROSSTALK vs

FREQUENCY

Typical Performance Curves (Continued)

100

10k

100k

10k 100k 1M 10M 100M

FREQUENCY (Hz)

OUTPUT IMPEDANCE (Ω)

V+=5V, 3V

VSOURCE = 1VP-P

0.10

100

10k 100k 1M 10M 100M

FREQUENCY (Hz)

OUTPUT IMPEDANCE (Ω)

V+ = 5V, 3V

VSOURCE = 1V

VSOURCE = 0.1V

CMRR (dB)

-20

-40

-60

-80

-100

-10

-30

-50

-70

-90

1k 10k 1M

FREQUENCY (Hz)

100k 100M10M

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

VOUT = 100mVP-P

PSRR (dB)

FREQUENCY (Hz)

-20

-40

-60

-80

-100

-10

-30

-50

-70

-90

1k 10k 1M100k 100M10M

PSRR+

PSRR-

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

VOUT = 100mVP-P

-80

-70

-60

-50

-40

-30

-20

-10

10k 100k 1M 10M 100M 1G

VP-P = 10mV

VP-P = 1V

VP-P = 100mV

OFF ISOLATION (dB)

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

FREQUENCY (Hz)

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

10k 100k 1M 10M 100M 1G

VP-P = 1V

CROSSTALK (dB)

FREQUENCY (Hz)

ISL28191, ISL28291

6FN6156.2

FIGURE 1 1. INPUT REFERRED NOISE VOL TAGE vs

FREQUENCY FIGURE 12. INPUT REFERRED NOISE CURRENT vs

FREQUENCY

FIGURE 13. ENABLE/DISABLE TIMING FIGURE 14. SMALL SIGNAL STEP RESPONSE_RISE AND

FALL TIME

FIGURE 15. LARGE SIGNAL STEP RESPONSE_RISE AND

FALL TIME FIGURE 16. SUPPL Y CURRENT vs TEMPERA TURE VS = ±2.5V

ENABLED. RL = INF

Typical Performance Curves (Continued)

1 10 100 1k 10k

FREQUENCY (Hz)

INPUT VOLTAGE NOISE (nV/√Hz)

100k

0.1

CURRENT NOISE (pA/√Hz)

1 10 100 1k 10k

FREQUENCY (Hz)

100k0.1

100

-1.00 0.00 1.00 2.00 3.00 4.00

ENABLE INPU T

OUTPUT

VOLTS (V)

TIME (µs)

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

VIN= 1VP-P

ENABLEDISABLEENABLE

-0.08

-0.06

-0.04

-0.02

0.02

0.04

0.06

0.08

0.1

0 200 400 600 800

VIN

OUT

SMALL SIGNAL (V)

TIME (ns)

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

VOUT = 100mVP-P

-0.6

-0.4

-0.2

0.2

0.4

0.6

0.8

0 100 200 300 400 500 600 700 800

VIN

OUT

LARGE SIGNAL (V)

TIME (ns)

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

VOUT = 1Vp-p

1.5

1.7

1.9

2.1

2.3

2.5

2.7

2.9

3.1

3.3

3.5

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

CURRENT (mA)

n = 100

MEDIAN

MIN

MAX

ISL28191, ISL28291

7FN6156.2

FIGURE 17. VIO vs TEMPERATURE VS = ±2.5V FIGURE 18. IBIAS+ vs TEMPERATURE VS = ±2.5V

FIGURE 19. IBIAS- vs TEMPERATURE VS = ±2.5V FIGURE 20. IOS vs TEMPERATURE VS = ±2.5V

FIGURE 21. CMRR vs TEMPERATURE VCM = 3.8V,

VS = ±2.5V FIGURE 22. PSRR vs TEMPERATURE ±1.5V to ±2.5V

Typical Performance Curves (Continued)

-200

-100

100

200

300

400

500

600

700

800

-40-200 20406080100120

TEMPERATURE (°C)

VIO (µV)

n =100

MEDIAN

MIN

MAX

-4.6

-4.4

-4.2

-4.0

-3.8

-3.6

-3.4

-3.2

-3.0

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IBIAS+ (µA)

n = 100

MEDIAN

MIN

MAX

-5.0

-4.8

-4.6

-4.4

-4.2

-4.0

-3.8

-3.6

-3.4

-3.2

-3.0

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IBIAS- (µA)

n = 100

MEDIAN

MIN

MAX

-400

-200

200

400

600

800

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IOS (nA)

n = 100

MEDIAN

MIN

MAX

100

110

120

130

140

150

160

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

CMRR (dB)

n = 100

MEDIAN

MIN

MAX

-40-200 20406080100120

TEMPERATURE (°C)

PSRR (dB)

n = 100

MEDIAN

MIN

MAX

ISL28191, ISL28291

8FN6156.2

FIGURE 23. POSITIVE VOUT vs TEMPERATURE RL = 1k

VS= ±2.5V FIGURE 24. NEGATIVE VOUT vs TEMPERA TURE RL = 1k

VS= ±2.5V

Typical Performance Curves (Continued)

4.96

4.965

4.970

4.975

4.980

4.985

4.99

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

VOUT (V)

n = 100

MEDIAN

MIN

MAX

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

VOUT (mV)

n = 100

MEDIAN

MIN

MAX

Pin Descriptions

ISL28191

(6 Ld SOT-23) ISL28191

(6 Ld μTDFN) ISL28291

(10 Ld MSOP) ISL28191

(10 Ld μTDFN) P IN NAME FUNCTION EQUIVALENT CIRCUIT

412 (A)

8 (B) 1 (A)

7 (B) IN- Inverting input

Circuit 1

333 (A)

7 (B) 2 (A)

6 (B) IN+ Non-inverting input (See circuit 1)

2 2 4 3 V- Negative supply

141 (A)

9 (B) 10 (A)

8 (B) OUT Output

Circuit 2

6 6 10 9 V+ Positive supply

555 (A)

6 (B) 4 (A)

5 (B) ENABLE Enable BAR pin

internal pull-down;

Logic “1” selects

the disabled state;

Logic “0” selects

the enabled state.

Circuit 3

IN-

V+

V-

IN+

V+

V-

OUT

ENABLE

V+

V-

ISL28191, ISL28291

9FN6156.2

Applications Information

Product Descr iption

The ISL28191 and ISL28291 are voltage feedback operational

amplifier designed for communication and imaging applications

requiring very low voltage and current noise. Both parts feature

low distortion while drawing moderately low supply current. The

ISL28191 and ISL28291 use a classical voltage-feedback

topology which allows them to be used in a variety of

applications where current-feedback amplifiers are not

appropriate because of restrictions placed upon the feedback

element used with the amplifier.

Enable/Power-Down

The ISL28191 and ISL28291 amplifiers are disabled by

applying a voltage greater than 2V to the ENABLE pin, with

respect to the V- pin. In this condition, the output(s) will be in

a high impedance state and the amplifier(s) current will be

reduced to 13µA/Amp. By disabling the part, multiple parts

can be connected together as a MUX. The outputs are tied

together in parallel and a channel can be se lected by the

ENABLE pin. The ENABLE pin also has an internal pull

down. If left open, the ENABLE pin will pull to the negative

rail and the device will be enabled by default.

Input Protection

All input terminals have internal ESD protection diod es to both

positive and negati ve supply rails, limitin g the input vol t age to

within one diode beyond the supply rail s. Both p arts have

additional back-to-back diodes across th e input terminal s (as

shown in Figure 25). In pulse a pplications w here the input

Slew Rate exceeds th e Slew Rate of the amplifier, the

possibility exist s for the input protectio n diodes to be come

forward biased. This can cause excessive input curre nt and

distortion at the outputs. If over driving the inputs is n ecessary,

the external input current must never exceed 5mA. An

external series resistor may be used to limit the current as

shown in Figure 25.

Using Only One Channel

The ISL28291 is a Dual channel op-amp. If the application

only requires one channel when using the ISL 28291, the

user must configure the unused channel to prevent it from

oscillating. Oscillation can occur if the input an d output pins

are floating. This will result in higher than expected supply

currents and possible noise injection into the channel being

used. The proper way to prevent this oscillation is to short

the output to the negative input and ground the positive input

(as shown in Figure 26).

Current Limiting

The ISL28191 and ISL28291 have no internal current-

limiting circuitry. If the output is shorted, it is possible to

exceed the Absolute Maximum Rating for output current or

power dissipation, potentially resulting in the destruction of

the device. This is why output short circuit current is

specified and tested with RL = 10Ω.

Power Dissipation

It is possible to exceed the +125°C maximum junction

temperatures under certain load and power-supply

conditions. It is therefore important to calculate the

maximum junction temperature (TJMAX) for all applications

to determine if power supply voltages, load conditions, or

package type need to be modified to remain in the safe

operating area. These paramete rs are related as follows:

where:

•P

DMAXTOTAL is the sum of the maximum power

dissipation of each amplifier in the package (PDMAX)

•PD

MAX for each amplifier can be calculated as follows:

where:

•T

MAX = Maximum ambient temperature

•θJA = Thermal resistance of the package

•PD

MAX = Maximum power dissipation of 1 amplifier

•V

S = Supply voltage

•I

MAX = Maximum supply current of 1 amplifier

•V

OUTMAX = Maximum output voltage swing of the

application

•R

L = Load resistance

FIGURE 25. LIMITING THE INPUT CURRENT T O LESS THAN

5mA

FIGURE 26. PREVENTING OSCILLA TIONS IN UNUSED

CHANNELS

TJMAX TMAX θJAxPDMAXTOTAL

()+=

PDMAX 2*VSISMAX VS

( - VOUTMAX)VOUTMAX

----------------------------

×+×=

ISL28191, ISL28291

10 FN6156.2

Power Supply Bypassing and Printed Circuit

Board Layout

As with any high frequency device, good printed circuit

board layout is necessary for optimum performance. Low

impedance ground plane construction is essential. Surface

mount components are recommended, but if leaded

components are used, lead lengths should be as short as

possible. The power supply pins must be well bypassed to

reduce the risk of oscillation. The combination of a 4.7µF

tantalum cap acitor in parallel with a 0.01µF capacitor has

been shown to work well when placed at each supply pin.

For good AC performance, parasitic capacitance should be

kept to a minimum, especially at the inverting input. When

ground plane construction is used, it should be removed

from the area near the inverting input to minimize any stray

capacitance at that node. Carbon or Metal-Film resistors are

acceptable with the Metal-Film resistors giving slightly less

peaking and bandwidth because of additional series

inductance. Use of sockets, particularly for the SO p ackage,

should be avoided if possible. Sockets add parasitic

inductance and capacitance which will result in additional

peaking and overshoot.

ISL28191, ISL28291

11 FN6156.2

ISL28191, ISL28291

SOT-23 Package Family

321

0.15 DC

2X 0.20 C

B0.20 MDC A-B

2 3

SEATING

PLANE

0.10 C

1 3

0.15 A-BC

(L1)

0.25

0° +3°

-0°

GAUGE

PLANE

MDP0038

SOT-23 PACKAGE FAMILY

SYMBOL

MILLIMETERS

TOLERANCESOT23-5 SOT23-6

A 1.45 1.45 MAX

A1 0.10 0.10 ±0.05

A2 1.14 1.14 ±0.15

b 0.40 0.40 ±0.05

c 0.14 0.14 ±0.06

D 2.90 2.90 Basic

E 2.80 2.80 Basic

E1 1.60 1.60 Basic

e 0.95 0.95 Basic

e1 1.90 1.90 Basic

L 0.45 0.45 ±0.10

L1 0.60 0.60 Reference

N 5 6 Reference

Rev. F 2/07

NOTES:

1. Plastic or metal protrusions of 0.25mm maximum per side are not

included.

2. Plastic interlead protrusions of 0.25mm maximum per side are not

included.

3. This dimension is measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.

5. Index area - Pin #1 I.D. will be located within the indicated zone

(SOT23-6 only).

6. SOT23-5 version has no center lead (shown as a dashed line).

12 FN6156.2

ISL28191, ISL28291

Ultra Thin Dual Flat No-Lead Plastic Package (UTDFN)

0.15 C

PIN 1

TOP VIEW

0.15 C

REFERENCE

DETAIL A

0.10 C

0.08 C

A3 C

SEATING

PLANE

BOTT OM VIEW

SIDE VIEW

0.10 CAB

b6X

DETAIL A

0.127 +0.058

0.127±0.008

CO.2

1.00 REF

DAP SIZE 1.30 x 0.76

-0.008

TERMINAL THICKNESS

0.30

1.00 0.45

0.50

0.25

1.25

2.00

1.00

LAND PATTERN

L6.1.6x1.6A

6 LEAD ULTRA THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE

SYMBOL

MILLIMETERS

NOTESMIN NOMINAL MAX

0.45 0.50 0.55

- - 0.05

0.127 REF

0.15 0.20 0.25

1.55 1.60 1.65

D2 0.40 0.45 0.50 -

1.55 1.60 1.65

0.95 1.00 1.05

0.50 BSC

0.25 0.30 0.35

Rev. 1 6/06

NOTES:

1. Dimensions are in mm. Angles in degrees.

2. Coplanarity applies to the exposed pad as well as the terminals.

Coplanarity shall not exceed 0.08mm.

3. Warpage shall not exceed 0.10mm.

4. Package length/package width are considered as special

characteristics.

5. JEDEC Reference MO-229.

6. For additional information, to assist with the PCB Land Pattern

Design effort, see Intersil Technical Brief TB389.

13 FN6156.2

ISL28191, ISL28291

Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)

0.10 C

0.05 CA

0.10 C

SEATING PLANE

INDEX AREA

TOP VIEW

SIDE VIEW

NX (b)

SECTION "C-C" e

TERMINAL TIP

(A1)

0.10 C

NX L

BOTTOM VIEW

PIN #1 ID

(DATUM A)

(DATUM B)

0.10 M CAB

0.05 M C

NX b

10X

0.50

0.20

0.40

1.80

0.40

0.20

2.20

1.00

0.60

1.00

LAND PATTERN

L10.1.8x1.4A

10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC

PACKAGE

SYMBOL

MILLIMETERS

NOTESMIN NOMINAL MAX

A 0.45 0.50 0.55 -

A1 - - 0.05 -

A3 0.127 REF -

b 0.15 0.20 0.25 5

D 1.75 1.80 1.85 -

E 1.35 1.40 1.45 -

e 0.40 BSC -

L 0.35 0.40 0.45 -

L1 0.45 0.50 0.55 -

N102

Nd 2 3

Ne 3 3

0-12

Rev. 3 6/06

NOTES:

1. Dimensioning and tolerancing conform to ASME Y14.5-1994.

2. N is the number of terminals.

3. Nd and Ne refer to the number of terminals on D and E side,

respectively.

4. All dimensions are in millimeters. Angles are in degrees.

5. Dimension b applies to the metallized terminal and is measured

between 0.15mm and 0.30mm from the terminal tip.

6. The configuration of the pin #1 identifier is optional, but must be

located wi thin the zone indicated. The pin #1 identif ier may be

either a mold or mark feature.

7. Maximum package warpage is 0.05mm.

8. Maximum allowable burrs is 0.076mm in all directions.

9. JEDEC Reference MO-255.

10. For additional information, to assist with the PCB Land Pattern

Design effort, see Intersil Technical Brief TB389.

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No lice nse is gran t ed by i mpli catio n or other wise u nder an y p a tent or patent right s of Int ersi l or it s sub sidi aries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6156.2

ISL28191, ISL28291

Mini SO Package Family (MSOP)

1(N/2)

(N/2)+1

PLANE

SEATING

N LEADS

0.10 C

PIN #1

I.D.

E1E

DETAIL X

3° ±3°

GAUGE

PLANE

SEE DETAIL "X"

0.25

A1 L

0.25 C A B

0.08 C A B

MDP0043

MINI SO PACKAGE FAMILY

SYMBOL

MILLIMETERS

TOLERANCE NOTESMSOP8 MSOP10

A 1.10 1.10 Max. -

A1 0.10 0.10 ±0.05 -

A2 0.86 0.86 ±0.09 -

b 0.33 0.23 +0.07/-0.08 -

c 0.18 0.18 ±0.05 -

D 3.00 3.00 ±0.10 1, 3

E 4.90 4.90 ±0.15 -

E1 3.00 3.00 ±0.10 2, 3

e 0.65 0.50 Basic -

L 0.55 0.55 ±0.15 -

L1 0.95 0.95 Basic -

N 8 10 Reference -

Rev. D 2/07

NOTES:

1. Plastic or metal protrusions of 0.15mm maximum per side are not

included.

2. Plastic interlead protrusions of 0.25mm maximum per side are

not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.