CDCE906/CDCE706 ProgrammingEvaluation Module
User's Guide
August 2007 High Performance Analog/CDC
SCAU017B
Contents
1 Introduction ................................................................................................................ 52 Quick Start ................................................................................................................. 63 EVM Hardware ............................................................................................................ 73.1 Board View and Connector Location .......................................................................... 73.2 Hardware Configuration ......................................................................................... 74 TI Pro-Clock™ ............................................................................................................ 94.1 CDCE906-706 SMBus Interface ............................................................................... 94.2 CDCE906-706 Programming Assistant ...................................................................... 104.3 Tutorial ........................................................................................................... 124.4 Software Installation ............................................................................................ 135 FAQ ......................................................................................................................... 136 Parts List .................................................................................................................. 137 Board Layout and Schematic ...................................................................................... 14
Important Notices ............................................................................................................... 18
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List of Figures
1 CDCE906/CDCE706 Functional Block Diagram ......................................................................... 62 Board View ................................................................................................................... 73 CDCE906-706 SMBus Interface ........................................................................................... 94 Programming Assistant .................................................................................................... 115 Top Silkscreen .............................................................................................................. 146 Top Signal ................................................................................................................... 157 GND Layer 2 ................................................................................................................ 158 VCC Layer 3 ................................................................................................................ 159 Bottom Layer ................................................................................................................ 1610 Bottom Silkscreen .......................................................................................................... 1611 Schematic ................................................................................................................... 17
List of Tables
1 Parts List .................................................................................................................... 13
4List of Figures SCAU017B – August 2006 – Revised August 2007Submit Documentation Feedback
1 Introduction
User's GuideSCAU017B – August 2006 – Revised August 2007
CDCE906/CDCE706 Programming Evaluation Module
This user's guide explains how to use the CDCE906/CDCE706 programming evaluation module. An easyto use socket is provided on the EVM to make a fast programming of samples or small productionquantities possible. There is an another EVM available for the purpose of performance measurements andevaluation, called CDCE906/CDCE706 Performance Evaluation Module.
If you need assistance with this device, email: clocks_apps@list.ti.com
The CDCE906/CDCE706 is one of the smallest and powerful PLL synthesizer / multiplier / divideravailable today. Despite its small physical outlines, the CDCE906/CDCE706 is the most flexible. It has thecapability to produce an almost independent output frequency from a given input frequency.
The input frequency can be derived from a LVCMOS, a differential input clock, or a single crystal. Theappropriate input waveform can be selected via the SMBus data interface controller.
To achieve an independent output frequency the reference divider M and the feedback divider N for eachPLL can be set to values from 1 up to 511 for the M-Divider and from 1 up to 4095 for the N-Divider. ThePLL-VCO (voltage controlled oscillator) frequency than is routed to the free programmable outputswitching matrix to any of the six outputs. The switching matrix includes an additional 7-bit post-divider(1-to-127) and an inverting logic for each output.
The deep M/N divider ratio allows the generation of zero ppm clocks from e.g., a 27-MHz reference inputfrequency.
The CDCE906/CDCE706 includes three PLLs of those one supports SSC (spread-spectrum clocking).PLL1, PLL2, and PLL3 are designed for frequencies up to 300 MHz and optimized for zero-ppmapplications with wide divider factors.
PLL2 also supports center-spread and down-spread spectrum clocking (SSC). This is a proven method toeffectively reduce the energy for the selected frequency range. The electro-magnetic interference (EMI)will be significantly reduced. Also, the slew-rate controllable (SRC) output edges minimize EMI noise.
Based on the PLL frequency and the divider settings, the internal loop filter components will beautomatically adjusted to achieve high stability and optimized jitter transfer characteristic of the PLL.
The device supports non-volatile EEPROM programming for easy customized applications. It ispre-programmed with a factory default configuration (see Figure 1 ) and can be re-programmed to adifferent application configuration before it goes onto the PCB or re-programmed by in-systemprogramming. A different register setting is programmed via the serial SMBus interface.
Two free programmable inputs, S0 and S1, can be used to control for each application the mostdemanding logic control settings (outputs disable to low, outputs 3-state, power down, PLL bypass, etc).
The CDCE906/CDCE706 has three power supply pins, VCC, VCCOUT1, and VCCOUT2. VCC is thepower supply for the device. It operates from a single 3.3-V supply voltage. VCCOUT1 and VCCOUT2 arethe power supply pins for the outputs. VCCOUT1 supplies the outputs Y0 and Y1 and VCCOUT2 suppliesthe outputs Y2, Y3, Y4, and Y5. Both output supplies can be 2.3 V to 3.6 V. The output works even at1.7V VCCOUT. However, some limitations apply at VCCOUT below 2.3V.
The CDCE906/CDCE706 is characterized for operation from 0 °C to 70 °C/–40 °C to 85 °C.
Pro-Clock is a trademark of Texas Instruments.Microsoft is a trademark of Microsoft Corporation.
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CLK_IN0
CLK_IN1
Factory Prg.
PLL1
XO
or
2 LVCMOS
or
Differential
Input
MUX
MUX
prg. 9 Bit
Divider M
prg. 9 Bit
Divider M
MUX
prg. 9 Bit
Divider M
PLL3
Crystal or
Clock Input
PFD
Filter
VCO
PLL2
w/ SSC
PFD
Filter
VCO
SSC
prg. 12 Bit
Divider N
prg. 12 Bit
Divider N
prg. 12 Bit
Divider N
SO/AO/CLK_SEL
S1/A1
VCC VCCOUT1
GND
VCCOUT2
GND
SCLOCK
Output Switch Matrix
PLL Bypass
Y4
LV
CMOS
LV
CMOS
Y3
Y2
LV
CMOS
LV
CMOS
Y1
Y0
LV
CMOS
LV
CMOS
EEPROM
LOGIC
Y5
6 x Programmable 7−Bit Divider P0, P1, P2, P3, P4, P5 and Inversion Logic
PFD
Filter
VCO
5x6 Programmable Switch A
6x6 Programmable Switch B
SDATA
14 pF 14 pF
2 Quick Start
Quick Start
Figure 1. CDCE906/CDCE706 Functional Block Diagram
Related Documentation From Texas Instruments•CDCE906, Programmable 3-PLL Clock Synthesizer/Multiplier/Divider data sheet (SCAS814 )•CDCE706, Programmable 3-PLL Clock Synthesizer/Multiplier/Divider data sheet (SCAS815 )
Press the socket in the middle of the EVM down and insert the CDCE906/CDCE706 into the socket.Release the socket to fix the device.•Connect 3.3 V to P1 and P2•Make a user defined setup with the TI Pro Clock Software (additional information can be found insection 4)•Connect the EVM with the PC via a parallel cable•Program the CDCE906/CDCE706 with the Write button or the auto write function of theCDCE906-E706 SMBus interface•Connect a reference source with the correct input frequency and a minimum swing of 1.32 V to J2•Check the setup with a high impedance probe at the test points (TP0–TP5 for Y0–Y5)
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3 EVM Hardware
3.1 Board View and Connector Location
Socket
Pin 1
REF
Input
(J2)
S0 S1
J5
Parallel Port
(J1)
VCC(P1) GND (P2)
Test-
points
Test-
points
74LV125
3.2 Hardware Configuration
3.2.1 Power Supply (P1, P2)
3.2.2 Onboard Jumper (J3 and J4)
EVM Hardware
Figure 2. Board View
This section describes the board configuration using on-board jumpers and solder-bridges as well as theSMBUS interface.
Use a stabilized external power supply for the EVM board.•Supply 3.3 V ±0.3 V on P1•Connect GND to P2
WARNINGNever supply more than 3.6 V on P1 and P2.
Use Jumper J3 to set the user programmable control input S0 to low or high.
Use Jumper J4 to set the user programmable control input S1 to low or high.
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3.2.3 Programming Interfaces (J1, J5)
3.2.4 Crystal, Differential or LVCMOS Input (J2)
3.2.5 LVCMOS Outputs (TP0 –TP5)
EVM Hardware
Default setting: J3 and J4 are not used.
Note: S0 and S1 are logic high due to their internal pull-up resistors if J3 and J4 are not used.
To enhance the flexibility and function of the clock synthesizer, a two-signal serial interface is provided. Itfollows the SMBus specification Version 2.0, which is based upon the principals of operation of I
2
C. Moredetails of the SMBus specification can be found at http://www.smbus.org .
Through the SMBus, various device functions, such as individual clock output buffers, can be individuallyenabled or disabled. The registers associated with the SMBus data interface initialize to their defaultsetting, written in the EEPROM, upon power-up and therefore using this interface is optional. Clock deviceregister changes are normally made upon system initialization, if any are required. There are two ways toprogram the device externally.•Connect the parallel port cable to PC and EVM parallel port. This needs the TI Pro Clock Software(see section 4)•By external pattern generator connected to J5 (it is not possible to detect an acknowledge at J5)
Note: The shield of the parallel cable should be connected to both cable plugs.
The CDCE906/CDCE706 can use a crystal, a differential, or a LVCMOS input signal. The CDCE906/E706programming EVM makes possible the functional testing of the device for all three input configurations.This is done by providing a single-ended clock to CLK_IN0. CLK_IN1 is biased to Vcc/2, which offers theoption to test the differential input with a single-ended clock provided to J2.
Default settings: LVCMOS Input at CLK_IN0.
The CDCE906/CDCE706 drives up to six LVCMOS outputs. Test points are available on the board for afunctional test after programming the device. Every test point consists of a signal and a GND pad for fastand easy testing with a high impedance probe.
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4 TI Pro-Clock™
4.1 CDCE906-706 SMBus Interface
4.1.1 Quick Start Instructions
TI Pro-Clock™
TI Pro-Clock™ is the evaluation software for the CDCE906 and the CDCE706. The software contains theCDCE906-706 SMBus Interface and the CDCE906-706 Programming Assistant. In the future, the softwarewill be expanded for new devices. The software runs under Windows 2000, XP, and XP*64. A quickinstallation is required prior to use. See Section 4.4 Software Installation.
The CDCE906-706 SMBus Interface allows the user direct access to all programmable features of theCDCE906/CDCE706 via the parallel port of the PC.
The CDCE906-706 Programming Assistant helps the user to find a proper device setup by choosing theinput and output settings.
The SMBus Interface is an easy-to-use programming environment and supports many features. It providesdirect access to the register and the EEPROM of the CDCE906/CDCE706 and therefore makes evaluationeasy.
Figure 3. CDCE906-706 SMBus Interface
The following steps are necessary for device programming after TI Pro-Clock™ has been installed on yourPC:
1. Power up the CDCE706/CDCE906EVM.
2. Connect the EVM and the PC with a parallel cable.3. Start the TI Pro-Clock™ software.4. Click the button CDCE906/CDCE706.
5. Make a user-defined setup.6. Click the write register button.
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4.1.2 Main Screen
4.1.3 Save/Load Setup
4.2 CDCE906-706 Programming Assistant
TI Pro-Clock™
The main screen of the CDCE906/CDCE706 SMBUS interface as shown in Figure 3 allows directcontrol to all programmable features of the CDCE906/CDCE706. All programmable PLL parameters,like divider settings, SSC settings as well as all input and output settings, can be controlled. Clickingthe write register button transfers the setup to the CDCE906/CDCE706EVM. The parameter byteselects if the whole setup (all bytes) or only the selected byte will be updated in theCDCE906/CDCE706 control register.By selecting auto write in the upper right corner, the CDCE906/CDCE706 SMBus control register getsan update after each change in the setup of the CDCE906-706 SMBus Interface. If graph ser data isselected, the bit pattern of SCLK and SDATA is shown on a screen.Click read register to load the current control register setup of the CDCE906/CDCE706 into the SMBusInterface. The write EEPROM button updates the CDCE906/706 control register and writes theupdated control register contents into the EEPROM.After the SSC settings were changed, PLL 2 must get a reset by setting the PLL into bypass mode fora short time. This is done automatically by the SMBus interface. Due to this, there will be multiple writecycles on the SMBUS after pressing the write register or write EEPROM button.
A yellow write LED indicates an active writing cycle. If the LEDs write error or read error are switchingfrom green to red, a write/read error occurred. Check the EVM and the parallel cable and try again.
ABit Viewer is available in the menu bar. This feature shows the current setup of the SMBus Interfacebit per bit. This allows an easy evaluation of the register setting that is currently set in the SMBusinterface.
It is possible to lock the EEPROM permanently. This avoids undesirable reprogramming of theEEPROM. Clicking EEPROM →EEPROM lock in the menu bar permanently locks the EEPROM. Afterlocking the EEPROM, it cannot be unlocked.After pressing the Verify Register button (also located in the menu bar), the current SMBus Interfacesetting is compared bit-wise with the CDCE906/CDCE706 control register that is connected to the PC.All bits of the control register that are different to the SMBus Interface setting are shown in a table. Thebits, which show either 0 or 1, represent the control register setting of the CDCE906/CDCE706.After the SSC settings were changed, PLL 2 must be reset by setting the PLL into bypass mode for ashort time. This is done automatically by the SMBus interface.Click Programming Assistant in the menu bar to switch to the CDCE906-706 Programming Assistant,which helps to create a setup for the CDCE906/CDCE706 by choosing the input and output settings.
Saving and loading the setup of the CDCE906-706 SMBus Interface can be done in four different ways.Click File, and select one of the following options to save or load the current setup.1. Save Setup/Load Setup - Saves/loads the setup as/from an encrypted file.2. Export *.txt/Import *.txt - Exports/imports the setup as/from a text file. Use this format if you want toview the setup with a text editor later.3. Export *.csv/I mport *.csv - Exports/imports the setup as/from a comma-delimited file. Use this format ifyou want to view the setup with Microsoft™ Excel later4. Export Intel Hex *.hex/Import Intel Hex *.hex - Exports/imports the setup as/from Hexadecimal ObjectFile Format. Usually programmers can directly read-in this file format.5. Configuration Code Release Sheet - Use this option if you want to order factory-programmedEEPROM specials of the CDCE906/CDCE706. Contact your regional marketing or salesrepresentative for further information.
The CDCE906-706 Programming Assistant is a useful feature, which creates a setup for the CDCE906 orthe CDCE706. The setup can be transferred to the serial interface software, by selecting Accept Setup.Final setup adjustment and CDCE906/CDCE706 programming is done with the CDCE906-706 SMBusInterface.
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TI Pro-Clock™
Figure 4. Programming Assistant
The Programming Assistant starts with its own default setup. The default setup of the ProgrammingAssistant is different to the default setup of the CDCE906/CDCE706. This is why, the ProgrammingAssistant has a simple startup setup, which makes it easy to create a new user-defined setup. From thisdefault setup, different parameters can be edited to create a user setup. All dividers, the VCO frequency,the SSC modulation frequency, the switch A/B settings, as well as the actual output frequency, and theactual error of all outputs, are calculated by defining the following parameters:
signal source Choose among crystal oscillator, LVMOS, and differential clock sourcefin Choose from 1 MHz to 167/200 MHz for CDCE906/CDCE706 LVCMOS/differentialinput and from 8 MHz to 54 MHz for crystal oscillatorCDCE906/ Choose if a CDCE706 or a CDCE906 setup is providedCDCE706 SwitchSSC Modulation Choose between no modulation and different center and down-spread modulationsprovided by PLL 2fmod Choose a modulation frequency for SSC; actual fmod shows the closest possiblemodulation frequencyfout Choose the output frequency for Y0–Y5; actual fout displays the closest possibleoutput frequency with an error in frequency smaller than |error|error Choose the maximum allowed error between fout and actual fout; actual errordisplays the error of current frequency actual foutdisable PLL If the input frequency is a multiple of fout, fout is derived directly from fin. Clickbypass disable PLL bypass if Yx should be derived from a PLL.activate SSC Choose which outputs will have SSC. All outputs with SSC activated must bederived from the same PLL.
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4.3 Tutorial
TI Pro-Clock™
disable output Choose which outputs will be disabled. The Switch A will be set to input clock and PDivider will be set to 1 for each disabled output.
An Error is displayed, if the setup cannot be provided by the CDCE906/CDCE706
A Warning is displayed if something in the setup needs special attention from the user.
The Accept Setup button transfers the setup to the CDCE906-706 SMBus interface, where an individualadjustment of the setup is possible. This function is blocked if an error in the setup occurs. Discard Setupreturns to the SMBus Interface without transferring the setup.
This section contains a step-by-step tutorial for creating a user-defined setup and programming theCDCE906/E706. The 27-MHz crystal of the EVM is used for reference. A 64-MHz CPU clock, differentaudio sample clocks for 24-kHz audio rate, a 27-MHz clock for an MPEG/AC-3 Audio Dec, and anadditional 60-MHz clock is provided. The tutorial contains instructions and comments explaining thefunctionality of the software.
Step-by-step instruction:1. Start TI Pro-Clock™.
2. Select CDCE906/E706.
•The CDCE906-706 SMBus Interface is started.3. Select Programming Assistant in the menu bar.•The CDCE906-706 Programming Assistant is started.4. Select CDCE906 Default Setting from Default Setup in the menu bar.•All Outputs are in use. All PLLs are in bypass mode.5. Click disable output for Y1-Y5.•Only Y0 is in use. All PLLs are in bypass mode.6. Set fout of Y0 to 64 MHz.•Y0 has an output frequency of 64 MHz; PLL 1 is set up automatically.7. Click disable output for Y1.8. Set fout of Y1 to 9.216 MHz.•Y1 is set to 9.216 MHz; PLL 2 in use by Y1.9. Click disable output for Y2.10. Set fout of Y2 to 18.432 MHz.•18.432 MHz is set to Y2; PLL 1 is in use by Y1 and Y2 because Y1 and Y2 are derived from thesame PLL (groups of outputs are preferred to a single output).11. Click disable output for Y3.12. Set fout of Y3 to 6.144 MHz.•Y1, Y2, and Y3 are derived by PLL 1.13. Click disable output for Y4.14. Set fout of Y4 to 27 MHz.•27 MHz is provided to Y4 by the input clock; PLL 3 is still not in use.
The 27 MHz of Y4 can be provided by a PLL if additional jitter cleaning is necessary:1. Click disable PLL bypass at Y4.•PLL3 now provides 27 MHz; additional jitter cleaning is possible.2. Click disable output at Y5.3. Set fout of Y5 to 60 MHz.•Error message The error for fout of Y5 is not procurable! appears; this is why no PLL is left to
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4.4 Software Installation
5 FAQ
6 Parts List
FAQderive 60 MHz for Y5.4. Set error of Y5 to 50000 ppm.•Y5 now provides 59.4 MHz ; the error compared to 60 MHz is 10000 ppm.5. Click Accept Setup.•The CDCE906-706 Programming Assistant is closing; the CDCE906-706 SMBus Interface opens,the setup of the Programming Assistant is transferred to the SMBus Interface.6. Click write.•The SMBus interface transfers the setup to the CDCE906/E706.
To install the TI Pro-Clock™, perform the following steps:1. Download TI Pro-Clock™ from www.ti.com.2. Run program setup.exe.3. Reboot your computer.4. Run the Software from Start →Programs →Texas Instruments →TI Pro Clock.
The CDCE906/CDCE706 register cannot be programmed. What is wrong?
Check if the parallel port is connected to your PC and your EVM. Check if correct voltage is applied.Check if the multiuse pins 1 and 2 are used as address bits. Set the correct address via J10 and J12 ifthis applies.
There is coupling between neighboring outputs, if the output frequency is checked with a probe. Isthis device related?
No - the coupling comes from the socket, which is optimized for ease of use and not for signal integrity.Use the CDCE906/CDCE706 Performance Evaluation Module for signal integrity evaluation.
Table 1. Parts List
Quantit Reference Part Manufacturer Part Numbery
4 B1–B4 STAND OFF4 SCREW1 C1 22 μF Murata GRM32ER71A226KE20L1 C2 10 μF Murata GRM31CR70J106KA01L1 C3 1000 pF Panasonic ECJ-0EB1E102K4 C4, C8, C11, C12 100 n Panasonic ECJ-0EB1A104K1 C5 1 μF Panasonic ECJ-0EB0J105M1 C6 10 n Panasonic ECJ-0EB1E103K2 C7, C10 10 p Panasonic ECD-G0E100C1 C9 1000 P Panasonic ECJ-0EB1E101K1 D1 GREEN Fairchild Semi QTLP651C-IG1 J1 PARALLEL PORT SPC Technology DB-25P-PCB1 J2 SMA Johnson Comp 142-0701-8411 J3, J4 HDR3 Header 3 pos, 0.100 ctr2 J5 HDR4 Header 4 pos, 0.100 ctr1 L1 75 Ωat 100 MHz Murata BLM31PG500SN1L
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7 Board Layout and Schematic
Board Layout and Schematic
Table 1. Parts List (continued)
Quantit Reference Part Manufacturer Part Numbery
1 P1 PWR_IN SPC Technologies 845R1 P2 GND SPC Technologies 845B1 R1 10K Panasonic ERJ-2RKF1002X1 R2 Not used4 R3, R4, R7, R8 100 Panasonic ERJ-2GEJ101X4 R5, R6, R9, R18 10K Panasonic ERJ-2RKF1002X4 R10, R11, R14, R15 1K Panasonic ERJ-2RKF1001X2 R12, R16 100 Panasonic ERJ-2RKF1000X2 R13, R17 100K Panasonic ERJ-2RKF1003X6 TP0–TP5 Not used1 U1 SN74LV125 TI SN74LV125AD1 U2 CDCE906/CDCE706 ENPLAS OTS-20(28)-0.65-01
Figure 5. Top Silkscreen
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EVALUATION BOARD/KIT IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSESONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must haveelectronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be completein terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmentalmeasures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit doesnot fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling(WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives.Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days fromthe date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYERAND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OFMERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claimsarising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and allappropriate precautions with regard to electrostatic discharge.EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANYINDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents orservices described herein.
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This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSESONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and can radiate radiofrequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which aredesigned to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments maycause interference with radio communications, in which case the user at his own expense will be required to take whatever measures maybe required to correct this interference.
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It is important to operate this EVM within the input voltage range of 3 V to 3.6 V and the output voltage range of 3 V to 3.6 V.Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questionsconcerning the input range, please contact a TI field representative prior to connecting the input power.Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification,please contact a TI field representative.During normal operation, some circuit components may have case temperatures greater than 85 °C. The EVM is designed to operateproperly with certain components above 85 °C as long as the input and output ranges are maintained. These components include but arenot limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identifiedusing the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation,please be aware that these devices may be very warm to the touch.
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Amplifiers amplifier.ti.com Audio www.ti.com/audioData Converters dataconverter.ti.com Automotive www.ti.com/automotiveDSP dsp.ti.com Broadband www.ti.com/broadbandInterface interface.ti.com Digital Control www.ti.com/digitalcontrolLogic logic.ti.com Military www.ti.com/militaryPower Mgmt power.ti.com Optical Networking www.ti.com/opticalnetworkMicrocontrollers microcontroller.ti.com Security www.ti.com/securityRFID www.ti-rfid.com Telephony www.ti.com/telephonyLow Power www.ti.com/lpw Video & Imaging www.ti.com/videoWireless
Wireless www.ti.com/wireless
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