DATA SHEET PET2000-12-074NA FEATURES Best-in-class, 80 PLUS certified "Platinum" efficiency INTEL CRPS (Common Redundant Power Supply) compatible Wide input voltage range: 90-264 VAC AC input with power factor correction 2000W continuous and 2100W peak output power capability Always-On 12V/5A standby output Hot-plug capable Parallel operation with active current sharing Full digital controls for improved performance High density design: 42.1 W/in3 Small form factor: 73.5 x 40.0 x 265mm PMBus communication interface for control, programming and monitoring Status LED with fault signalling DESCRIPTION The PET2000-12-074NA is a 2000 Watt AC to DC, power-factor-corrected (PFC) power supply that converts standard AC power into a main output of +12 VDC for powering intermediate bus architectures (IBA) in high performance and reliability servers, routers, and network switches. The PET2000-12074NA utilizes full digital control architecture for greater efficiency, control, and functionality. This power supply meets international safety standards and displays the CE-Mark for the European Low Voltage Directive (LVD). BCD.00478_AA_May-26-2014 1 www.power-one.com DATA SHEET 1 2 ORDERING INFORMATION PET 2000 - 12 - 074 N A Product Family PET Front-Ends Power Level 2000 W Dash V1 Output 12 V Dash Width 74 mm Airflow N: Normal Input A: AC OVERVIEW The PET2000-12-074NA AC/DC power supply is a fully DSP controlled, highly efficient front-end power supply. It incorporates resonance-soft-switching technology to reduce component stresses, providing increased system reliability and very high efficiency. With a wide input operational voltage range the PET2000-12-074NA maximizes power availability in demanding server, network, and other high availability applications. The supply is fan cooled and ideally suited for integration with a matching airflow path. The PFC stage is digitally controlled using a state-of-the-art digital signal processing algorithm to guarantee best efficiency and unity power factor over a wide operating range. The DC/DC stage uses soft switching resonant techniques in conjunction with synchronous rectification. An active OR-ing device on the output ensures no reverse load current and renders the supply ideally suited for operation in redundant power systems. The always-on standby output provides power to external power distribution and management controllers. It is protected with an active OR-ing device for maximum reliability. PWM PWM Status information is provided with a front-panel LED. In addition, the power supply can be controlled and the fan speed set via the I2C bus. The I2C bus allows full monitoring of the supply, including input and output voltage, current, power, and inside temperatures. Cooling is managed by a fan controlled by the DSP controller. The fan speed is adjusted automatically depending on the actual power demand and supply temperature and can be overridden through the I2C bus. PET2000-12-074NA 2 www.power-one.com DATA SHEET 3 ABSOLUTE MAXIMUM RATINGS Stresses in excess of the absolute maximum ratings may cause performance degradation, adversely affect long-term reliability, and cause permanent damage to the supply. PARAMETER 4 DESCRIPTION / CONDITION Maximum Input Voltage Vi maxc MIN NOM Continuous MAX UNIT 264 VAC INPUT General Condition: TA = 0...55 C unless otherwise noted. PARAMETER Nominal Input Voltage Vi nom Input Voltage Ranges Vi DESCRIPTION / CONDITION MIN NOM MAX UNIT Rated Voltage High Line (Vi nom HL) 200 230 240 VAC Rated Voltage Low Line (Vi nom LL) 100 115 127 VAC Normal operating (Vi min HL to Vi max HL), High Line 180 264 VAC Normal operating (Vi min LL to Vi max LL), Low Line 90 140 VAC Ii max Maximum Input Current VIN=100VAC, 100% load 13 ARMS Ii inrush Inrush Current Limitation Vi min to Vi max, TNTC=25C, 5ms 10 Ap 63 Hz Input Frequency fi Power Factor PF Total Harmonic Distortion THD Vi on Vi off 0.8 W/VA 20% Load 0.9 W/VA 50% Load 0.9 W/VA 100% Load 0.95 W/VA TBD TBD % 87 90 VAC Ramping down 82 87 VAC VIN=230VAC, 10% load 82 90.8 % VIN=230VAC, 20% load 90 93.5 % VIN=230VAC, 50% load 94 94.4 % VIN=230VAC, 100% load 91 93.0 % Turn-on Input Ramping up Turn-off Input Voltage1 TV1 holdup Hold-up Time V1 12V output, 70% Load TVSB holdup Hold-up Time VSB 12VSB, full load 4.1 50/60 10% Load Voltage1 Efficiency2 47 10.6 ms 70 ms INPUT FUSE Time-lag 16A input fuse (5 x 20 mm) in series with the L-line inside the power supply protects against severe defects. The fuse is not accessible from the outside and is therefore not a serviceable part. 4.2 INRUSH CURRENT The AC-DC power supply exhibits an X-capacitance of only 5.2F, resulting in a low and short peak current, when the supply is connected to the mains. The internal bulk capacitor will be charged through an NTC which will limit the inrush current. NOTE: Do not repeat plug-in / out operations within a short time, or else the internal in-rush current limiting device (NTC) may not sufficiently cool down and excessive inrush current or component failure(s) may result. 4.3 INPUT UNDER-VOLTAGE If the sinusoidal input voltage stays below the input undervoltage lockout threshold Vi on, the supply will be inhibited. Once the input voltage returns within the normal operating range, the supply will return to normal operation again. 1 2 The Front-End is provided with a minimum hysteresis of 3V during turn-on and turn-off within the ranges Efficiency measured without fan power per EPA server guidelines BCD.00478_AA_May-26-2014 3 www.power-one.com DATA SHEET 4.4 POWER FACTOR CORRECTION Power factor correction (PFC) is achieved by controlling the input current waveform synchronously with the input voltage. A fully digital controller is implemented giving outstanding PFC results over a wide input voltage and load ranges. The input current will follow the shape of the input voltage. If for instance the input voltage has a trapezoidal waveform, then the current will also show a trapezoidal waveform. 4.5 EFFICIENCY High efficiency (see Figure 1) is achieved by using state-of-the-art silicon power devices in conjunction with soft-transition topologies minimizing switching losses and a full digital control scheme. Synchronous rectifiers on the output reduce the losses in the high current output path. The speed of the fan is digitally controlled to keep all components at an optimal operating temperature regardless of the ambient temperature and load conditions. Figure 1 - Efficiency vs. Load current (ratio metric loading) Figure 2 - Power factor vs. Load current 95 94 Power factor [1] Efficiency [%] 93 92 91 90 Vi = 230VAC, fan external Platinum requirement 89 88 0 1 0.98 0.96 0.94 0.92 0.9 0.88 0.86 0.84 0.82 0.8 Vi = 230VAC 0 200 400 600 800 1000 1200 1400 1600 1800 2000 Po [W] 200 400 600 800 1000 1200 1400 1600 1800 2000 Po [W] Figure 3 - Inrush current, Vin = 230Vac, 90 CH1: Vin (500V/div), CH2: Iin (10A/div) PET2000-12-074NA 4 www.power-one.com DATA SHEET 5 OUTPUT General Condition: TA = 0...55 C unless otherwise noted. PARAMETER DESCRIPTION / CONDITION Main Output V1 V1 nom V1 set dV1 tot Nominal Output Voltage Output Setpoint Accuracy Total Regulation P1 nom Nominal output power P1 peak Peak Output Power3 I1 nom I1 nom red I1 peak I1 peak red V1 pp dV1 load dV1 line dV1 temp dI1 share VISHARE dV1 dyn trec tV1 rise tV1 ovr sh dV1 sense CV1 load Output Current Peak Output Current3 Output Ripple Voltage4 Load Regulation Line Regulation Thermal Drift Current Sharing Current Share Bus Voltage Dynamic Load Regulation Recovery Time Output Voltage Rise Time Output Turn-on Overshoot Remote Sense Capacitive Loading MIN NOM MAX 12.0 0.5 * I1 nom, TA = 25C Vi min to Vi max, 0 to 100% I1 nom Vi min HL to Vi max HL Vi min LL to Vi max LL Vi min HL to Vi max HL Vi min LL to Vi max LL -0.5 -1 +0.5 +1 2000 1000 2100 1320 UNIT VDC %V1 nom %V1 nom W W W W Vi min HL to Vi max HL 0.0 167 ADC Vi min LL to Vi max LL 0.0 83 ADC Vi min HL to Vi max HL 0.0 175 ADC Vi min LL to Vi max LL 0.0 110 ADC 120 -138 24 TBD +4 10.07 12.60 2 10 12.60 0.25 25 mVpp mV mV %/C Vi min to Vi max, 0 to 100% I1 nom, TA min to TA max Vi nom HL, 0 to 100% I1 nom Vi min to Vi max, 0.5 * I1 nom Vi nom HL, 0.5 * I1 nom Deviation from I1 tot / N, I1 > 10% I1 peak I1 = 50% I1 nom, I1 = 5 ... 100% I1 nom, dI1/dt = 1A/s, recovery within 1% of V1 nom V1 = 10...90% V1 nom, external capacitance < 10mF Vi nom HL, 0 to 100% I1 nom Compensation for cable drop, 0 to 100% I1 nom -83 -24 -110 0 -4 9.93 11.40 10.0 6 8 0 ADC VDC VDC ms ms V V mF Standby Output VSB VSB nom VSB set dVSB tot PSB nom PSB peak Nominal Output Voltage Output Setpoint Accuracy Total Regulation Nominal output power Peak Output Power5 ISB nom Output Current Vi min to Vi max 0.0 5 ADC ISB peak Peak Output Current5 Vi min to Vi max 0.0 5 ADC 120 -570 24 TBD +1 12.60 2 5 12.60 3100 mVpp mV mV %/C VSB pp dVSB load dVSB line dVSB temp dISB share dVSB dyn trec tVSB rise tVSB ovr sh CVSB load Voltage4 Output Ripple Load Regulation Line Regulation Thermal Drift Current Sharing Dynamic Load Regulation Recovery Time Output Voltage Rise Time Output Turn-on Overshoot Capacitive Loading 12.15 ISB = 0A, TA = 25C Vi min to Vi max, 0 to 100% ISB nom Vi min to Vi max Vi min to Vi max Vi min to Vi max, 0 to 100% ISB nom, TA min to TA max Vi nom HL, 0 to 100% ISB nom Vi min to Vi max, ISB nom = 0A Vi nom HL, ISB nom = 0A Deviation from ISB tot / N, ISB = 0.5 * ISB nom ISB = 50% ISB nom, ISB = 5 ... 100% ISB nom, dISB/dt = 0.25A/s, recovery within 1% of VSB nom VSB = 10...90% VSB nom, external capacitance < 1mF Vi nom HL, 0 to 100% ISB nom -0.5 -3 +0.5 +1 60 60 -290 -24 -430 0 -1 11.40 1 0 2 VDC %VSBnom %VSBnom W W ADC VDC ms ms V F Peak combined power for all outputs does not exceed 2100 W; maximum of peak power duration is 20 seconds without asserting the SMBAlert signal. Measured with a 10uF low ESR capacitor in parallel with a 0.1uF ceramic capacitor at the point of measurement. 5 In single power supply configuration. 3 4 BCD.00478_AA_May-26-2014 5 www.power-one.com DATA SHEET Figure 4 - Turn-On AC Line 230VAC, full load (200ms/div) CH1: Vin (500V/div) CH3: V1 (2V/div) CH4: VSB (2V/div) Figure 5 - Turn-On AC Line 230VAC, full load (5ms/div) CH3: V1 (2V/div) CH4: VSB (2V/div) Figure 6 - Turn-Off AC Line 230VAC, full load (10ms/div) CH1: Vin (500V/div) CH3: V1 (2V/div) CH4: VSB (2V/div) Figure 7 - Short circuit on V1 (10ms/Div) CH3: V1 (2V/div) Figure 8 - AC drop out 10ms (10ms/div), 75% load CH1: Vin (500V/div) CH3: V1 (2V/div) CH4: VSB (2V/div) Figure 10 - Load transient V1, 133 to 53A (1ms/div) CH3: V1 (2V/div) CH4: VSB (2V/div) Figure 9 - Load transient V1, 53 to 133A (1ms/div) CH3: V1 (2V/div) CH4: VSB (2V/div) PET2000-12-074NA 6 www.power-one.com DATA SHEET 5.1 OUTPUT GROUND / CHASSIS CONNECTION The output return path serves as power and signal ground. All output voltages and signals are referenced to these pins. To prevent a shift in signal and voltage levels due to ground wiring voltage drop a low impedance ground plane should be used as shown in Figure 11. Alternatively separated ground signals can be used as shown in Figure 12. In this case the two ground planes should be connected together at the power supplies ground pins. NOTE: Within the power supply the output GND pins are connected to the Chassis, which in turn is connected to the Protective Earth terminal on the AC inlet. Therefore it is not possible to set the potential of the output return (GND) to any other than Protective Earth potential. Figure 11 - Common low impedance ground plane Figure 12 - Separated power and signal ground BCD.00478_AA_May-26-2014 7 www.power-one.com DATA SHEET 6 PROTECTION PARAMETER F Input fuse (L) V1 OV OV Threshold V1 tV1 OV OV Trip Time V1 VVSB OV OV Threshold VSB tVSB OV OV Trip Time VSB DESCRIPTION / CONDITION MIN Over Voltage V1 Protection, Automatic retry each 1s MAX UNIT 16 Not use accessible, time-lag (T) Over Voltage V1 Protection, Latch-off Type NOM A 13.3 13.9 14.5 VDC 1 ms 13.3 13.9 14.5 VDC 1 ms Over Current Limitation, Latch-off, Vi min HL to Vi max HL 169 173 ADC Over Current Limitation, Latch-off, Vi min LL to Vi max LL 85 88 ADC Over Current Limitation, Latch-off time 20 Fast Over Current Limit., Latch-off, Vi min HL to Vi max HL 175 180 ADC Fast Over Current Limit., Latch-off, Vi min LL to Vi max LL 110 115 ADC Fast OC Trip time V1 Fast Over Current Limitation, Latch-off time 50 60 ms IV1 SC Max Short Circuit Current V1 V1 < 3V 180 A tV1 SC Short Circuit Regulation Time V1 < 3V, time until IV1 is limited to < IV1 sc 2 ms IVSB OC OC Limit VSB Over Current Limitation, Constant-Current Type 6 A tVSB OC OC Trip time VSB Over Current Limit., time until IVSB is limited to IVSB OC 10 ms Over Temperature On Heat Sinks Automatic shut-down IV1 OC Slow OC Limit V1 tV1 OC Slow OC Trip time V1 IV1 OC Fast Fast OC Limit V1 tV1 OC Fast TSD 6.1 s 5.2 115 C OVERVOLTAGE PROTECTION The PET2000-12-074NA front-end provides a fixed threshold overvoltage (OV) protection implemented with a HW comparator for both the main and the standby output. Once an OV condition has been triggered on the main output, the supply will shut down and latch the fault condition. The latch can be unlocked by disconnecting the supply from the AC mains or by toggling the PSON_L input. The standby output will continuously try to restart with a 1 s interval after OV condition has occurred. 6.2 UNDERVOLTAGE DETECTION Both main and standby outputs are monitored. LED and PWOK_H pin signal if the output voltage exceeds 5% of its nominal voltage. The main output will latch off if the main output voltage V1 falls below 10V (typically in an overload condition) for more than 55 ms. The latch can be unlocked by disconnecting the supply from the AC mains or by toggling the PSON_L input. 6.3 CURRENT LIMITATION MAIN OUTPUT The main output exhibits a substantially rectangular output characteristic controlled by a software feedback loop. If output current exceeds IV1 OC Fast it will reduce output voltage in order to keep output current at IV1 OC Fast. If the output voltage drops below ~10.0 VDC for more than 55 ms, the output will latch off (standby remains on), see also chapter 6.2. PET2000-12-074NA 8 www.power-one.com DATA SHEET Figure 13 - Current Limitation on V1 (Vi = 230VAC) 12 Static operation 10 Peak current capability, latches off after 20s Constant current limitation, latches off after 20s Io [A] V1 [V] 8 6 4 2 0 0 20 40 60 80 100 I1 [A] 120 140 160 180 A second SW controlled current limit will latch off the main output if the power supply is operated for long duration in its peak current capability region. This protection trips as soon as the output current exceeds IV1 OC Slow for duration of more than 20 s. The third current limitation implemented as a fast hardware circuit will immediately switch off the main output if the output current increases beyond the peak current trip point, occurring mainly if a short circuit is applied to the output voltage. The supply will re-start 4 ms later with a soft start, if the short circuit persists (V1 < 10.0V for >55 ms) the output will latch off; otherwise it continuous to operate. The latch can be unlocked by disconnecting the supply from the AC mains or by toggling the PSON_L input. The main output current limitation thresholds depend on the actual input applied to the power supply. STANDBY OUTPUT The standby output exhibits a substantially rectangular output characteristic down to 0V (no hiccup mode / latch off). The current limitation of the standby output is independent of the AC input voltage. Figure 14 - Current Limitation on VSB 12 10 VSB [V] 8 6 Static operation 4 2 0 0 1 2 3 4 5 6 ISB [A] BCD.00478_AA_May-26-2014 9 www.power-one.com DATA SHEET 7 MONITORING The power supply operating parameters can be accessed through I2C interface. For more details refer to chapter I2C / PMBus COMMUNICATION and document URP.00234 (PET2000-12-074NA PMBus Communication Manual). PARAMETER Vi mon Input RMS Voltage Ii mon Input RMS Current Pi mon True Input Power V1 mon V1 Voltage I1 mon V1 Current P1 nom V1 Output Power DESCRIPTION / CONDITION MIN NOM MAX UNIT Vi min LL Vi Vi max HL -2 +2 VAC Ii > 6.7Arms -3 +3 % Ii 6.7Arms -0.2 +0.2 Arms Pi > 250W -4 +4 % Pi < 250W -10 +10 W -0.1 +0.1 VDC I1 > 25A -1 +1 % I1 25A -0.25 +0.25 ADC Pi > 250W -2 +2 % Pi < 250W -5 +5 W VSB mon VSB Voltage -0.1 +0.1 VDC ISB mon VSB Current -0.1 +0.1 ADC TA mon Inlet Temperature -2 +2 C PET2000-12-074NA TA min TA TA max 10 www.power-one.com DATA SHEET 8 SIGNALLING AND CONTROL 8.1 ELECTRICAL CHARACTERISTICS PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT -0.2 0.8 V 2 3.5 V -1 1 mA PSON_H / HOTSTANDBYEN_H VIL Input Low Level Voltage VIH Input High Level Voltage IIL,H Maximum Input Sink or Source Current Rpull up Internal Pull up Resistor to internal 3.3V RLOW Maximum external Pull down Resistance to GND to obtain Low Level RHIGH Minimum external Pull down Resistance to GND to obtain High Level PSON_L: Main output enabled HOTSTANDBYEN_H: Hot Standby mode not allowed PSON_L: Main output disabled HOTSTANDBYEN_H: Hot Standby mode allowed VI = -0.2V to +3.5V 10 kR 1 50 kR kR PWOK_H VOL Output Low Level Voltage Vi < Vi min LL, VIsink < 4mA VOH Output High Level Voltage Vi > Vi min LL, Isource < 0.5mA Rpull up Internal Pull up Resistor to internal 3.3V IOL 8.2 Maximum Sink Current 0 0.4 V 2.4 3.5 V 1 VO < 0.4V kR 4 mA SENSE INPUTS The main output has sense lines implemented to compensate for voltage drop on load wires in both positive and negative path. The maximum allowed voltage drop is 200 mV on the positive rail and 100 mV on the GND rail. With open sense inputs the main output voltage will rise by 270 mV. Therefore if not used, these inputs should be connected to the power output and GND at the power supply connector. The sense inputs are protected against short circuit. In this case the power supply will shut down. 8.3 CURRENT SHARE The PET front-ends have an active current share scheme implemented for V1. All the ISHARE current share pins need to be interconnected in order to activate the sharing function. If a supply has an internal fault or is not turned on, it will disconnect its ISHARE pin from the share bus. This will prevent dragging the output down (or up) in such cases. The current share function uses an analog bus to transmit and receive current share information. The controller implements a Master/Slave current share function. The power supply providing the largest current among the group is automatically the Master. The other supplies will operate as Slaves and increase their output current to a value close to the Master by slightly increasing their output voltage. The voltage increase is limited to +250 mV. The standby output uses a passive current share method (droop output voltage characteristic). 8.4 PSON_L INPUT The PSON_L is an internally pulled-up (3.3 V) input signal to enable/disable the main output V1 of the front-end. With low level input the main output is enabled. This active-low pin is also used to clear any latched fault condition. The PSON_L can be either controlled by an open collector device or by a voltage source. BCD.00478_AA_May-26-2014 11 www.power-one.com DATA SHEET Figure 15 - PSON_H connection 8.5 PWOK_H OUTPUT The PWOK_H is an open drain output with an internal pull-up to 3.3 V indicating whether both VSB and V1 outputs are within regulation. This pin is active-low. Figure 16 - PWOK_H connection PSU PDU PSU PDU 3.3V 3.3V PWOK_H 3.3V 1k PWOK_H >10k PSU 1 PDU PSU 1 PDU 3.3V 3.3V PWOK_H PWOK_H PSU 2 PSU 2 3.3V 3.3V PWOK_H 8.6 3.3V 1k PWOK_H HOT-STANDBY IN-/OUTPUT The hot-standby operation is an operating mode allowing to further increase efficiency at light load conditions in a redundant power supply system. Under specific conditions one of the power supplies is allowed to disable its DC/DC stage. This will save the power losses associated with this power supply and at the same time the other power supply will operate in a load range having a better efficiency. In order to enable the hot standby operation, the HOTSTANDBYEN_H and the ISHARE pins need to be interconnected. A power supply will only be allowed to enter the hot-standby mode, when the HOTSTANDBYEN_H pin is high, the load current is low (see Figure 17) and the supply was allowed to enter the hot-standby mode by the system controller via the appropriate I2C command (by default disabled). The system controller needs to ensure that only one of the power supplies is allowed to enter the hot-standby mode. If a power supply is in a fault condition, it will pull low its active-high HOTSTANDBYEN_H pin which indicates to the other power supply that it is not allowed to enter the hot-standby mode or that it needs to return to normal operation should it already have been in the hot-standby mode. NOTE: The system controller needs to ensure that only one of the power supplies is allowed to enter the hot-standby mode. PET2000-12-074NA 12 www.power-one.com DATA SHEET Figure 18 shows the achievable power loss savings when using the hot-standby mode operation. A total power loss reduction of 45% is achievable. Figure 18 - PSU power losses with/without hot-standby mode Figure 17 - Hot-standby enable/disable current thresholds 60 Total Power Loss [W] 50 40 30 20 Hot-Standby Disabled 10 Hot-Standby Enabled 0 0 100 200 300 400 Po [W] 500 600 700 800 Figure 19 - Recommended hot-standby configuration BCD.00478_AA_May-26-2014 13 www.power-one.com DATA SHEET 8.7 SIGNAL TIMING Figure 20 - AC turn-on timing Figure 22 - AC long dips Figure 21 - AC short dips Figure 23 - PSON_L turn-on/off timing PARAMETER DESCRIPTION / CONDITION tAC VSB AC Line to 90% VSB tAC V1 AC Line to 90% V1 PSON_L = Low VSB to V1 delay PSON_L = Low tVSB V1 del MIN NOM 50 MAX UNIT 1.5 s 3 s 1000 ms tV1 rise V1 rise time See chapter OUTPUT tVSB rise VSB rise time See chapter OUTPUT tAC drop1 AC drop without V1 leaving regulation 0.7 * I1 nom, ISB nom 10 ms tAC drop2 AC drop without VSB leaving regulation I1 nom, ISB nom 70 ms 500 ms tV1 holdup Loss of AC to V1 leaving regulation See chapter INPUT tVSB holdup Loss of AC to V1 leaving regulation See chapter INPUT tPWOK_H del Outputs in regulation to PWOK_H asserted tPWOK_H warn Warning time from de-assertion of PWOK_H to V1 leaving regulation tPWOK_H holdup 100 1 ms Loss of AC to PWOK_H de-asserted 10.6 ms tPWOK_H low Time PWOK_H is kept low after being deasserted 100 ms tPSON_L V1 on Delay PSON_L active to V1 in regulation 5 tPSON_L V1 off Delay PSON_L de-asserted to V1 disabled tPSON_L PWOK_H 400 TBD Delay PSON_L de-asserted to PWOK_H deasserted ms ms 5 ms tV1 off Time V1 is kept off after leaving regulation 1 s tVSB off Time VSB is kept off after leaving regulation 1 s PET2000-12-074NA 14 www.power-one.com DATA SHEET 8.8 LED INDICATOR The front-end has one front LED showing the status of the supply. The LED is bi-colored: green and amber, and indicates AC and DC power presence and warning or fault conditions. Table 1 lists the different LED status. Table 1 - LED Status 1) OPERATING CONDITION No AC or AC Line in UV condition, VSB not present from paralleled power supplies PSON_L High Hot-Standby Mode No AC or AC Line in UV condition, VSB present from paralleled power supplies V1 or VSB out of regulation Over temperature shutdown Output over voltage shutdown (V1 or VSB) Output over current shutdown (V1 or VSB) Fan error (>15%) Over temperature warning Minor fan regulation error (>5%, <15%) Firmware bootloading in process Outputs V1 and VSB in regulation 1) LED SIGNALING Off Blinking Green 1Hz Solid Amber Blinking Amber 1Hz Blinking Green 2Hz Solid Green The order of the criteria in the table corresponds to the testing precedence in the controller. BCD.00478_AA_May-26-2014 15 www.power-one.com DATA SHEET 9 I2C / PMBus COMMUNICATION The PET front-end is a communication Slave device only; it never initiates messages on the I2C/SMBus by itself. The communication bus voltage and timing is defined in Table 2 further characterized through: * * * * * * Figure 24 - Physical layer of communication interface The SDA/SCL IOs use 3.3V logic levels External pull-up resistors on SDA/SCL required for correct signal edges Full SMBus clock speed of 100 kbps Clock stretching limited to 1 ms SCL low time-out of >25 ms with recovery within 10 ms Recognizes any time Start/Stop bus conditions Communication to the DSP or the EEPROM will be possible as long as the input AC voltage is provided. If no AC is present, communication to the unit is possible as long as it is connected to a life VSB output (provided e.g. by the redundant unit). If only V1 is provided, communication is not possible. Table 2 - I2C / SMBus Specification PARAMETER SCL / SDA DESCRIPTION CONDITION MIN MAX UNIT ViL Input low voltage -0.5 1.0 V ViH Input high voltage 2.3 3.5 V Vhys Input hysteresis VoL Output low voltage 0.15 3 mA sink current V 0 0.4 V 20+0.1Cb1 300 ns 20+0.1Cb1 250 ns -10 10 A 50 pF 100 kHz 1000 ns / Cb1 R tr Rise time for SDA and SCL tof Output fall time ViHmin Ii Input current SCL/SDA Ci Internal Capacitance for each SCL/SDA fSCL SCL clock frequency Rpull-up External pull-up resistor fSCL 100 kHz tHDSTA Hold time (repeated) START fSCL 100 kHz 4.0 s tLOW Low period of the SCL clock fSCL 100 kHz 4.7 s tHIGH High period of the SCL clock fSCL 100 kHz 4.0 s tSUSTA Setup time for a repeated START fSCL 100 kHz 4.7 tHDDAT Data hold time fSCL 100 kHz 0 tSUDAT Data setup time fSCL 100 kHz 250 ns tSUSTO Setup time for STOP condition fSCL 100 kHz 4.0 s tBUF Bus free time between STOP and START fSCL 100 kHz 5 ms 1 ViLmax 10 pF < Cb1 < 400 pF 0.1 VDD < Vi < 0.9 VDD 0 s 3.45 s Cb = Capacitance of bus line in pF, typically in the range of 10...400pF Figure 25 - I2C / SMBus Timing PET2000-12-074NA 16 www.power-one.com DATA SHEET 9.1 ADDRESS SELECTION The address for I2C communication can be configured by pulling address input pins A1 and A0 either to GND (Logic Low) or leave them open (Logic High). An internal pull up resistor will cause the A1 / A0 pin to be in High Level if left open. A fixed addressing offset exists between the Controller and the EEPROM. Table 3 - Address and protocol encoding 1) 9.2 A1 A0 0 0 1 1 0 1 0 1 I2C Address 1) Controller EEPROM 0xB0 0xA0 0xB2 0xA2 0xB4 0xA4 0xB6 0xA6 The LSB of the address byte is the R/W bit. SMBALERT_L OUTPUT The SMBALERT_L signal indicates that the power supply is experiencing a problem that the system agent should investigate. This is a logical OR of the Shutdown and Warning events. It is asserted (pulled Low) at Shutdown or Warning events such as reaching temperature warning/shutdown threshold of critical component, general failure, over-current, overvoltage, under-voltage or low-speed of failed fan. This signal may also indicate the power supply is operating in an environment exceeding the specified limits. The SMBAlert signal is asserted simultaneously with the LED turning to solid amber or blinking amber. PARAMETER DESCRIPTION / CONDITION MIN NOM MAX UNIT 12 V 10 A 0.4 V 4 mA SMB_ALERT_L Vext Maximum External Pull up Voltage IOH Maximum High Level Leakage Current No Failure or Warning condition, VO = 12V VOL Output Low Level Voltage Failure or Warning condition, Isink < 4mA Rpull up Internal Pull up Resistor to internal 3.3V IOL Maximum Sink Current 0 None VO < 0.4V Figure 26 - SMBALERT_L connection BCD.00478_AA_May-26-2014 17 www.power-one.com DATA SHEET 9.3 CONTROLLER AND EEPROM ACCESS The controller and the EEPROM in the power supply share the same I2C bus physical layer (see Figure 27) and can be accessed under different addresses, see ADDRESS SELECTION. The SDA/SCL lines are connected directly to the controller and EEPROM which are supplied by internal 3.3V. The EEPROM provides 256 bytes of user memory. None of the bytes are used for the operation of the power supply. Figure 27 - I2C Bus to DSP and EEPROM A1..0 Address Selection SDA DSP SCL EEPROM Protection 9.4 EEPROM PROTOCOL The EEPROM follows the industry communication protocols used for this type of device. Even though page write / read commands are defined, it is recommended to use the single byte write / read commands. WRITE The write command follows the SMBus 1.1 Write Byte protocol. After the device address with the write bit cleared a first byte with the data address to write to is sent followed by the data byte and the STOP condition. A new START condition on the bus should only occur after 5ms of the last STOP condition to allow the EEPROM to write the data into its memory. READ The read command follows the SMBus 1.1 Read Byte protocol. After the device address with the write bit cleared the data address byte is sent followed by a repeated start, the device address and the read bit set. The EEPROM will respond with the data byte at the specified location. 9.5 PMBusTM PROTOCOL The Power Management Bus (PMBusTM) is an open standard protocol that defines means of communicating with power conversion and other devices. For more information, please see the System Management Interface Forum web site at : www.powerSIG.org. PMBusTM command codes are not register addresses. They describe a specific command to be executed. The PET2000-12074NA supply supports the following basic command structures: * Clock stretching limited to 1 ms * SCL low time-out of >25 ms with recovery within 10 ms * Recognized any time Start/Stop bus conditions WRITE The write protocol is the SMBus 1.1 Write Byte/Word protocol. Note that the write protocol may end after the command byte or after the first data byte (Byte command) or then after sending 2 data bytes (Word command). PET2000-12-074NA 18 www.power-one.com DATA SHEET In addition, Block write commands are supported with a total maximum length of 255 bytes. See PET2000-12-074NA PMBus Communication Manual URP.00234 for further information. READ The read protocol is the SMBus 1.1 Read Byte/Word protocol. Note that the read protocol may request a single byte or word. S Address W A S Address R 1) A Command A Data (Low) Byte A Data High Byte1) nA P Optional In addition, Block read commands are supported with a total maximum length of 255 bytes. See PET2000-12-074NA PMBus Communication Manual URP.00234 for further information. 9.6 GRAPHICAL USER INTERFACE Power-One provides with its "Power-One I2C Utility" a Windows(R) XP/Vista/Win7 compatible graphical user interface allowing the programming and monitoring of the PET2000-12-074NA Front-End. The utility can be downloaded on: www.power-one.com and supports both the PSMI and PMBusTM protocols. The GUI allows automatic discovery of the units connected to the communication bus and will show them in the navigation tree. In the monitoring view the power supply can be controlled and monitored. If the GUI is used in conjunction with the YTM.00046 Evaluation Board it is also possible to control the PSON_L pin(s) of the power supply. Further there is a button to disable the internal fan for approximately 10 seconds. This allows the user to take input power measurements without fan consumptions to check efficiency compliance to the Climate Saver Computing Platinum specification. The monitoring screen also allows to enable the hot-standby mode on the power supply. The mode status is monitored and by changing the load current it can be monitored when the power supply is being disabled for further energy savings. This obviously requires 2 power supplies being operated as a redundant system (as in the evaluation kit). NOTE: The user of the GUI needs to ensure that only one of the power supplies have the hot-standby mode enabled. BCD.00478_AA_May-26-2014 19 www.power-one.com DATA SHEET Figure 28 - Monitoring dialog of the I2C Utility PET2000-12-074NA 20 www.power-one.com DATA SHEET 10 TEMPERATURE AND FAN CONTROL To achieve best cooling results sufficient airflow through the supply must be ensured. Do not block or obstruct the airflow at the rear of the supply by placing large objects directly at the output connector. The PET2000-12-074NA is provided with a rear to front airflow, which means the air enters through the DC-output of the supply and leaves at the AC-inlet. The PET2000-12-074NA supply has been designed for horizontal operation. The fan inside of the supply is controlled by a microprocessor. The rpm of the fan is adjusted to ensure optimal supply cooling and is a function of output power and the inlet temperature. The PET2000-12-074NA provides access via I2C to the measured temperatures of in total 6 sensors within the power supply, see Table 4. The microprocessor is monitoring these temperatures and if warning threshold of one of these sensors is reached it will set fan to maximum speed. If temperatures continue to rise above shut down threshold the main output V1 (or VSB if auxiliary converter is affected) will be disabled. At the same time the warning or fault condition is signalized accordingly through LED, PWOK_H and SMBALERT_L. Table 4 - Temperature sensor location and thresholds TEMPERATURE SENSOR DESCRIPTION / CONDITION PMBUS REGISTER WARNING THRESHOLD SHUT DOWN THRESHOLD Inlet air temperature Sensor located on control board close to DC end of power supply 8Dh TBD TBD Synchronous rectifier Sensor located on secondary side of DC/DC stage 8Eh TBD TBD Primary heat sink Sensor located on primary heat sink 8Fh TBD TBD Output oring element Sensor located close to output D1h TBD TBD Auxiliary converter Sensor located on secondary side on auxiliary rectifier D2h TBD TBD Bridge rectifier Sensor located on heat sink for AC rectifier D3h TBD TBD Figure 29 - Airflow direction Airflow 20 18 16 14 12 10 8 6 4 2 0 Figure 31 - Thermal derating Nominal Output Power [W] Fan speed [1000xRPM] Figure 30 - Fan speed vs. main output load Vi = 90 .. 180VAC Vi = 180 .. 264VAC 0 20 40 60 80 100 120 140 Main Output Current [A] BCD.00478_AA_May-26-2014 160 180 2000 1800 1600 1400 1200 1000 800 600 400 200 0 Vi = 90 .. 180VAC Vi = 180 .. 264VAC 0 21 10 20 30 40 Ambient Temperature [C] 50 60 www.power-one.com DATA SHEET 11 ELECTROMAGNETIC COMPATIBILITY 11.1 IMMUNITY PARAMETER DESCRIPTION / CONDITION CRITERION ESD Contact Discharge IEC / EN 61000-4-2, 8 kV, 25+25 discharges per test point (metallic case, LED, connector body) A ESD Air Discharge IEC / EN 61000-4-2, 15 kV, 25+25 discharges per test point (nonmetallic user accessible surfaces) A Radiated Electromagnetics Filed IEC / EN 61000-4-3, 10 V/m, 1 kHz/80% Amplitude Modulation, 1s Pulse Modulation, 10 kHz ... 2 GHz A Burst IEC / EN 61000-4-4, Level 3 AC port 2 kV, 1 minute A Surge IEC / EN 61000-4-5, Level 3 Line to Earth: 2 kV Line to Line: 1 kV A RF Conducted Immunity IEC / EN 61000-4-6, Level 3, 10 Vrms, CW, 0.1 ... 80 MHz A Voltage Dips and Interruptions IEC / EN 61000-4-11 1. Vi 230VAC, 70% load, Phase 0, Dip 100% , duration 10.6 ms 2. Vi 230VAC, 70% load, Phase 0, Dip 100% , duration 70 ms 3. Vi 230VAC, 70% load, Phase 0, Dip 100% , duration100 ms V1: A, VSB: A V1: B, VSB: A V1: B, VSB: B DESCRIPTION / CONDITION CRITERION EN 55022 / CISPR 22: 0.15 ... 30 MHz, QP and AVG, single power supply Class B 6 dB margin EN 55022 / CISPR 22: 0.15 ... 30 MHz, QP and AVG, 2 power supplies in a system Class B 6 dB margin EN 55022 / CISPR 22: 30 MHz ... 1 GHz, QP, single power supply Class B 6 dB margin EN 55022 / CISPR 22: 30 MHz ... 1 GHz, QP, 2 power supplies in a system Class B 6 dB margin 11.2 EMISSION PARAMETER Conducted Emission Radiated Emission Harmonic Emissions IEC 61000-3-2, Vi = 115 VAC / 60 Hz & 230 VAC / 50 Hz, 100% Load AC Flicker IEC 61000-3-3, Vi = 230 VAC / 50Hz, 100% Load Acoustical Noise Distance 1 meter, 25C, 50% Load Class A Pass 46 dBA 12 SAFETY / APPROVALS Maximum electric strength testing is performed in the factory according to IEC/EN 60950, and UL 60950. Input-to-output electric strength tests should not be repeated in the field. Power-One will not honor any warranty claims resulting from electric strength field tests. PARAMETER DESCRIPTION / CONDITION Agency Approvals UL 60950-1 2nd Edition CAN/CSA-C22.2 No. 60950-1-07 2nd Edition IEC 60950-1: 2005 EN 60950-1: 2006 Input (L/N) to chassis (PE) Isolation Strength Electrical Strength Test PET2000-12-074NA Approved by independent body (see CE declaration) Basic Input (L/N) to output Reinforced None (Direct connection) Output to chassis Creepage / Clearance NOTE Primary (L/N) to chassis (PE) According to safety standards Primary to secondary Input to chassis / Input to output 22 www.power-one.com DATA SHEET 13 ENVIRONMENTAL PARAMETER TA TAext TS Ambient Temperature Up to 1'000m ASL MIN NOM 0 Linear derating from 1'000 to 3'048m ASL Extended Temp. Range Storage Temperature Altitude Shock, operational Shock, non-operational Vibration, sinusoidal, operational Vibration, sinusoidal, nonoperational Vibration, random, nonoperational Na DESCRIPTION / CONDITION Non-operational MAX UNIT +55 C +45 C/ TBD C -20 +70 C Operational, above Sea Level - 3'048 m Non-operational, above Sea Level - 10'600 m 1 g peak 30 g peak 1 g peak 4 g peak 0.025 g2/Hz Half sine, 11ms, 10 shocks per direction, 6 directions IEC/EN 60068-2-6, sweep 5 to 500 to 5 Hz, 1 octave/min, 5 sweep per axis IEC/EN 60068-2-64, 5 to 500 Hz, 1 hour per axis Audible noise TBD dBA 14 RELIABILITY PARAMETER MTBF Mean time to failure Expected life time DESCRIPTION / CONDITION MIN TA = 25C, Vi = 230VAC, 0.7 * I1 nom, ISB nom 500 TA = 25C, Vi = 230VAC, 0.7 * I1 nom, ISB nom NOM MAX kh TBD TA = 55C, Vi = 230VAC, I1 nom, ISB nom TBD DESCRIPTION / CONDITION MIN UNIT years 15 MECHANICAL PARAMETER Width Dimensions m NOM MAX UNIT 73.5 mm Heigth 40.0 mm Depth 265.0 mm 1.1 kg Weight Figure 32 - Top and side view BCD.00478_AA_May-26-2014 23 www.power-one.com DATA SHEET Figure 33 - Front view Figure 34 - Rear view V1 Power supply rear view GND I2C VSB Card edge PCB within power supply GND Digital I/O Analog I/O S 13 S 24 P19 S 12 S1 P18 P 28 P 29 P36 P11 P10 P1 Reserved Mating connector, soldered onto application backplane S12 S1 P18 Application backplane, top view P1 S13 S 24 P19 P36 Figure 35 - Polarizing screw A screw added on the PET2000-12-074NA side prevents the PET2000-12-074NA from being inserted into system with standard INTEL connector. Systems using PET2000-12-074NA must have a slot of o6mm x 14mm implemented to allow the PET2000-12-074NA to be inserted. The maximum size of the screw head is o6mm and height 2.12mm. 16 CONNECTORS PARAMETER DESCRIPTION / CONDITION AC inlet IEC 60320 C14 AC cord requirement Wire size Output connector 25-Pin PCB card edge MIN NOM 16 MAX UNIT AWG Manufacturer: FCI Electronics Mating output connector Manufacturer P/N: 10130248-00xLF (see Figure 38 for option x) Power-One P/N : ZES.00678 PET2000-12-074NA 24 www.power-one.com DATA SHEET Figure 36 - Mating connector drawing page 1 Figure 37 - Mating connector drawing page 2 BCD.00478_AA_May-26-2014 25 www.power-one.com DATA SHEET Figure 38 - Mating connector drawing page 3 Figure 39 - Output connector pin assignment PIN P1 ~ P10 P29 ~ P36 P11 ~ P18 P19 ~ P28 S1 S2 S3, S4, S21, S22 S5 S6 S7 ~ S9 S10 ~ S15 S16 S17 S18 S19 S20 S23 S24 SIGNAL NAME GND GND V1 V1 A0 A1 VSB HOTSTANDBYEN_H ISHARE Reserved GND PWOK_H V1_SENSE V1_SENSE_R SMB_ALERT_L PSON_L SCL SDA PET2000-12-074NA DESCRIPTION Power and signal ground (return) +12VDC main output I2C address selection input +12V Standby positive output Hot standby enable signal, active-high Analog current share bus For future use, keep open circuit Power and signal ground (return) Power OK signal output, active-high Main output positive sense Main output negative sense SMB Alert signal output, active-low Power supply on input, active-low I2C clock signal line I2C data signal line 26 www.power-one.com DATA SHEET 17 ACCESSORIES ITEM DESCRIPTION ORDERING PART NUMBER Power-One I2C Utility Windows XP/Vista/7 compatible GUI to program, control and monitor PET2000-12-074NA Front-Ends (and other I2C units) N/A Evaluation Board Connector board to operate PET2000-12-074NA. Includes an onboard USB to I2C converter (use Power-One I2C Utility as desktop software). YTM.00045 SOURCE www.power-one.com Power-One NUCLEAR AND MEDICAL APPLICATIONS - Power-One products are not designed, intended for use in, or authorized for use as critical components in life support systems, equipment used in hazardous environments, or nuclear control systems without the express written consent of the respective divisional president of Power-One, Inc. TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on the date manufactured. Specifications are subject to change without notice. BCD.00478_AA_May-26-2014 27 www.power-one.com Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Bel Power Solutions: PET2000-12-074NA