ANALOG DEVICES DI CMOS Protected Analog Switches AD7510D1/AD7511D1/AD7512D1 FEATURES Latch-Proof Overvoltage-Proof: +25V Low Ron: 752 Low Dissipation: 3mW TTL/CMOS Direct Interface Silicon-Nitride Passivated Monolithic Dielectrically-lsolated CMOS Standard 14-/16-Pin DIPs and 20-Terminal Surface Mount Packages GENERAL DESCRIPTION The AD7510DI, AD7511DI and AD7512DI are a family of latch proof dielectrically isolated CMOS switches featuring over- voltage protection up to +25V above the power supplies. These benefits are obtained without sacrificing the low ON resistance (75Q) or low leakage current (SO0pA), the main features of an analog switch. The AD7510DI and AD7511DI consist of four independent SPST analog switches packaged in either a 16-pin DIP or a 20- terminal surface mount package. They differ only in that the digital control logic is inverted. The AD7512DI has two inde- pendent SPDT switches packaged either in a 14-pin DIP or a 20-terminal surface mount package. Very low power dissipation, overvoltage protection and TTL/ CMOS direct interfacing are achieved by combining a unique circuit design and a dielectrically isolated CMOS process. Silicon nitride passivation ensures long term stability while monolithic construction provides reliability. CONTROL LOGIC AD7510DI: Switch ON for Address HIGH AD7511DI: Switch ON for Address LOW AD7512DI: Address HIGH makes $1 to Out 1 and $3 to Out 2 REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. DIP FUNCTIONAL DIAGRAMS Vss[1] S15] 1 vss [a] 14] st r cno[2] | A ta] b1 Gno[2 = out 1 ai[3b4 a ee El) -f- \ ha] AD7512D1 az2|4a- 13} D2 az] 4} al se AD7510D1 r a3fs-- 40751101 stil wx: ace o = ours LETT top view Nyos NCIS 9] s3 | (Not to Scale) TOP VIEW 10] S4 (Not to Scale) 831 NC Do Vie NC = NO CONNECT NC = NO CONNECT ORDERING GUIDE Temperature Package Model! Range Option? AD7510DIKN | Oto +70C N-16 AD7510DIKP | 0to +70C P-20A AD7510DIKQ | 25Cto + 85C Q-16 AD7510DISQ 55Cto +125C | Q-16 AD7510DISE 55Cto + 125C | E-20A AD7S511IDIKN | 0to +70C N-16 AD751IDIKP | Oto +70C P-20A AD7511DIKQ | 25Cto + 85C Q-16 AD7511DISQ 55Cto +125C | Q-16 AD7511DITE 55Cto +125C | E-20A AD7512DIKN | 0to +70C N-14 AD7512DIKP Oto +70C P-20A AD7512DIKQ_ | 25Cto + 85C Q-14 AD7512DITQ: | 55Cto +125C | Q-14 AD7512DITE 55Cto +125C | E-20A NOTES 'To order MIL-STD-883, Class B, processed parts, add/883B to part number. See Analog Devices Military Products Databook (1990) for military data sheet. 7E = Leadless Ceramic Chip Carrier (LCCC); N = Plastic DIP; P = Plastic Leaded Chip Carrier (PLCC); Q = Cerdip. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 Twx: 710/394-6577 Telex: 924491 Cable: ANALOG NORWOODMASSAD7510D1/AD7511D1/AD7512D1 SPECIFICATIONS (Vpp = +15V, Veg = 15V, unless otherwise noted.) INDUSTRIAL VERSION (K) PARAMETER MODEL VERSION #25C 0 to +70C (N, P) TEST CONDITIONS (N, P, Q) -25C to +85C (Q) ANALOG SWITCH Ron All K 75Q typ, 1002 max 1752 max -10V < Vp) < +10V Ron YS Vp (Vs) All K 20% typ Ing = 1.0mA Ron Drift All K +0.5%/C typ Ae rl All K 1% typ Vp = 0, Ipg = 1.0mA Month All K 0.01%/C typ Ip (ls )oFF! All K 0.5nA typ, 5nA max 500nA max Vp = -10V, Vg = +10V and Vp = +10V, Vg = -10V Ip (Is)on? All K 10nA max Vs = Vp =+10V Vs = Vp =-10V lout AD7512DI K 15nA max 1500nA max Vst = Vour = t10V, Vg2 = F10V and Vez = Voyr = t10V, Vg; = F10V DIGITAL CONTROL Vint All K 0.8V max On All K 7pF typ 1 lH All K 10nA max Vin = Ypp lai All K 10nA max Vin = 0 DYNAMIC CHARACTERISTICS ton AD7510DI1 K 180ns typ AD7511DI1 K 350ns typ = 0 to +3.0V torr AD7510D1.s K 350ns typ ma AD7511DI1 K 180ns typ "TRANSITION AD7512DI K 300ns typ Cy (Cp )OFF All K 8pF typ Cy (Cp)ON All K 17pF typ Cys (Ce-our) All K 1pF typ p 0Vg) = OW Cour AD7512DI K 17pF typ All K 30pC t Measured at S or D terminal. ny) OPC tyP CG, = 1000pF, Vay = 0 to 3V, Vp (Vs) = +10V to -10V POWER SUPPLY Ipp All K 800A max 800uA max All digital inputs = Vagy Ics! All K 800LA max 800A max Ipp' All K 500A max 500A max All digital inputs = Voy. Igg | All K 500LA max 500uA max NOTES * 100% tested. Specifications subject to change without notice. PIN CONFIGURATIONS LCCC LCCC. a 8 fe E2#8a5 #2538 3 1 20 19 3.2 120 19 ns mA mo ebl| aor |[dn ce we alff [in ee sorst20 as ee ed AD7512DI TOF VIEW TOP VIEW NC 6 TOP VIEW 16 NC a2 6 TOP VIEW 16 (NOT TO SCALE} [Not to Scale} ag? (Not to Scale) 15 83 nc 7 [Not to Scale) 5 Ad 8 4 D3 NC 8 4 9 0 11 12 13 g253 NC = NOCONNECT 910 11 12 213 ggeg22 NC = NO CONNECT REV. AAD7510D1/AD7511DI/AD7512D1 EXTENDED VERSIONS (S, T) PARAMETER MODEL VERSION +25C -55C to +125C | TEST CONDITIONS ANALOG SWITCH Ron All Ss, T 1002 max 175Q max -10V < Vp < +10V Ips = 1mA Ip (1 All $,T 3nA max 200nA max Vp = -10V, Vg = +10V and > sorF Vp = +10V, Vs = -10V Ip (Is)ON! All S,T 10 Vg = Vp = +10V and pas Vg = Vp = -10V lout AD7512DI_ $,T 9nA max 600nA max Vg, = Vout = t10V 52 = +10V and Vg2 = Vour = T10V Voy = F10V DIGITAL CONTROL Vint All 8, T 0.8V max Vinu!? AD7510DI_ 2.4V min AD7511DI1_ T 2.4V min AD7512DI_ T 2.4V min AD7511DI S 3.0V min AD7512DI_ 5 3.0V_ min Inn: All S,T 10nA max Vin = Yop In All S,T 10nA max IN = DYNAMIC CHARACTERISTICS ton? AD7510DI_S, 1.0us max Vin = 0 to +3V AD7511DI 5&,T 1,0us max torr: AD7510DI $,T 1.0us max AD7511DI $,T 1,0us max tTRANSITION AD7512DI_ $,T 1.0ys max POWER SUPPLY 7 Ibn All S,T 800uA max All digital inputs = Vayy kg All S,T 800uA max Ipp, All S,T 500uA max All digital inputs = Vpyy Ig All - el 500uA max NOTES 100% tested. * A pullup resistor, typically 1-2k2 is required to make AD7511DISQ and AD7512DISQ TTL compatible. * Guaranteed, not production tested, Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS* VoptoGND 6 kb ue PRR SES Gee +17V Vee to GND ; s s & kb eo eer ew we we -17V Overvoltage at Vp (Vs) (l second surge) . 0... 0 - een e teens Vpp +25V or Vss -25V (Continuous) ee ee ed ek Vpp +20V or Vss 20V or 20mA, Whichever Occurs First Switch Current (Ips, Continuous)........ cee ee 6 50mA Switch Current (Ips, Surge) lms Duration, 10% Duty Cycle ........... 150mA Lead Temperature (Soldering, 10sec) ......... + 300C Storage Temperature ...........- 65C to + 150C Operating Temperature Commercial (KN, KP Versions) ........ 0 to +70C Industrial (KQ Versions) ......... 25C to +85C Extended (SQ, TQ, SE, TE Versions) . . 55C to + 125C *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended Digital Input Voltage Range ........ OV to Vpp +0.3V periods may affect device reliability. Power Dissipation (Any Package) UptotiS gb i o OS Ses ER ER ee 450mW Derates above +75C by .-..- +++ +++ ++ + 6MW/C CAUTION ESD (electrostatic discharge) sensitive device. The digital control inputs are diode protect- ed; however, permanent damage may occur on unconnected devices subject to high energy electrostatic fields. Unused devices must be stored in conductive foam or shunts. The protective foam should be discharged to the destination socket before devices are removed. REV. A WARNING! lil ESD SENSITIVE DEVICE as ~3-AD7510D1/AD7511D1/AD7512D1Circuit Description OVpp +15V (in-) TTL A LEVEL CONTROL O{ SHIFTER/ INPUT DRIVER (int) pO 5S OD O Vg515V NOTE: CIRCLED DEVICES IN SEPARATE ISOLATED POCKETS. Figure 1. Typical Output Switch Circuitry of AD7510D!I Series CIRCUIT DESCRIPTION CMOS devices make excellent analog switches; however, problems with overvoltage and latch-up phenomenon necessitated protection circuitry. These protection circuits, however, either caused degradation of important switch parameters such as Ron or leakage, or provided only limited protection in the event of overvoltage. The AD7510DI series switches utilize a dielectrically isolated CMOS fabrication process to eliminate the four-layer substrate found in junction-isolated CMOS, thus providing latch-free operation. A typical switch channel is shown in Figure 2. The output switching element is comprised of device numbers 4 and 5. Operation is as follows: for an ON switch, (in+) is Vpp and (in) is Vss from the driver circuits. Device numbers | and 2 are OFF and number 3 in ON. Hence, the backgates of the P- and N-channel output devices (numbers 4 and 5) are tied together and floating. The circled devices are located in separate dielectrically isolated pockets. Floating the output switch backgates with the signal input increases the effective threshold voltage for an applied analog signal, thus providing a flatter Ron versus Vs response. For an OFF switch, device number 3 is OFF, and the backgates of devices 4 and 5 are tied through 1k resistors (R1 and R2) to the respective supply voltages through the ON devices 1 and 2. If a voltage is applied to the S or D (OUT) terminal which exceeds Vpp or Vss; the $- or D-to-backgate diode is forward biased; however, R] and R2 provide current limiting action to the supplies. An equivalent circuit of the output switch element in Figure 3 shows that, indeed, the 1k limiting resistors are in series with the backgates of the P- and N-channel output devices nor in series with the signal path between the S and D terminals. It is possible to turn on an OFF switch by applying a voltage in excess of Vpp or Vsg to the S or D terminal. If a positive stress voltage is applied to the S$ or D terminal which exceeds Vpp by a threshold, then the P-channel (device 5) will turn on creating a low impedance path between the $ and D terminals. A similar situation exists for negative stress voltages which exceed Vsgs. In this case the N-channel provides the low impedance path between the and D terminals. The limiting factor on the overvoltage protection is the power dissipation of the package and is +20V continuous (or 20mA whichever occurs first) above the supply voltages. Vpo +15V 1k Se oe eel pt pt so te o__+ -OD | N- 1 le eee 4 P CHANNEL N- CHANNEL ae | P | 4 hal. i. Del. t Lal mT 1 wt n* | i aa eit 1k -15V Vss Figure 2, AD7510DI Series Output Switch Diode Equivalent Circuit REV.ATypical Performance Characteristics AD7510DI/AD751 1D1/AD7512DI Ron (2) AD7510D1 AD7511D/ AD7612DI = 426C -12 ~-10 +4 -6 4 -2 0 2 4 6 8 10 12 AT DIFFERENT SUPPLIES Vp (Vg) () Roy 2s a Function of Vp (Vs) Row (2) ADT510D1 AD7511DI AD7512D1 Vop = t15V Veg = -15V Ta = 120-1000 8 6A lH Ba AT DIFFERENT TEMPERATURES Vo (V5) (V) Ron as a Function of Vp (Vs) ls (pA) AD7510D1, AD7511 Vsg -15V Ta = +25C heh s 088888 -2 0 2 4 6 8 10 2 Vg (Vv) Is, (plogr vs Vs REV. A transition (na) 600 AD?7512D1 Vpp = +15V boo Veg = -16V Ta = +25C 400 300 200 100 0 : 0 2 3 4 5 Vin (V) TRANSITION 45 @ Function of Digital Input Voltage ton. torr {ns} Vin = 0 to 3.0V. Vop = +15V Veg = -15V 888 8 8 ye Ta (Cc) ton, torr 28 a Function of Temperature transition (ns) AD7512D1 Vop = +16V. Veg = -15V Vin = 0 to 8 $ 8 8 g OUT 1 to S2 o 8 8 ~40 -20 0 20 40 60 80 100 120 Ta CC) tTRANSITION 25 a Function of TemperatureAD7510DI/AD7511DI/AD7512DI TYPICAL SWITCHING CHARACTERISTICS AD7510DI, AD7511DI Vin (5V/DIV) Vs (5V/DIV) Vin (5V/DIV) Vs (v/o1v) 0.5us/DIV 0.5yus/DIV Vin evo aeueaeeel ta || UU | i] (5V/DIV) ee ee Switching Waveforms for Vp = -10V Switching Waveforms for Vp = +10V 0.5us/DIV 0.5us/DIV Vs Inds eso Vin {5V/DIV) tt TP eT tT ieGE Sea Switching Waveforms for Vp = Open Switching Waveforms for Vp = OV Vin ot AD7510DI, AD7511D1 TEST CIRCUIT il} r-t--t-4-" D Vpp (-15V) (+15V) _6- REV. AAD7510D1/AD7511D1/AD7512DI AD7512DI 0.5us/DIV Vv Vi Sica Hi v SRE ee i vovow Ml [BE (10V/DIV) (10V/DIV) [Rim EE SEE wee ee Switching Waveforms far Switching Waveforms for Voz = -10V, Vgp = +10V, Ry = 1k Voz = +10V, Vop = -10V, Ry = 0.5us/DIV 0.5us/DIV Vin Vw (v/DIV) (5V/DIV) Vs Vs (O.5V/DIV) (0.5/DIV) Switching Waveforms for Switching Waveforms for Voz and Vep = OV, R, = Voy and Veo = Open, Ry = 1k AD7512DI TEST CIRCUIT t_tova po Vsg GND (-15V) Di (+15V) REV. A VoutAD7510D1/AD7511D1/AD7512D1 TERMINOLOGY Ron Ohmic resistance between terminals D and S. Cpp (Css) Ron Drift Difference between the Ron drift of any Match two switches. Ron Match Difference between the Ron of any two ton switches. Ip (Us)orr Current at terminals D or S. This is. a leakage Orr current when the switch is OFF, Ip (Us)on Leakage current that flows from the closed UTRANSITION switch into the body. (This leakage will show up as the difference between the Vint. current Ip going into the switch and the Vinu outgoing current Is.) Tint Cine) Vp(Vs) Analog voltage on terminal D (S). C IN Cs (Cp) Capacitance between terminal $ (D) and ground. (This capacitance is specified for the switch open and closed.) Vpp Cps Capacitance between terminals D and S. Vss (This will determine the switch isolation Ipp over frequency.) Iss OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 14-Pin Cerdip Package (Suffix Q) | 0.271 (6.89) 0,240 (6.09) : at _ 0.780 (19.81) ! 4 0.200 (7.62) _ =| 0,163 (4,14) 0.133 (3.378) . 0.21 (5.33) avai] al 0.15 (3.811 iz dk fb 10.012 (0.305) ale 9.02 (0.5) _0,11 (2,79) 0,008 (0.203) 0.05 (1.27) 0.016 (0.406) 0.099 (2.28) 14-Pin Plastic DIP (Suffix N) 0.26 (6.61) = i) VVUVYVVY om 0.306 7.78) to) ~| seem hy S35et sais ww O33 (3.08) | \.# UU UY Te 0.006 1.65) (8.02 (0.508) 0.006 (2.87) i Dee o.aan Gone (243) LEAD WO. 1 IDENTIFIED BY DOT OR NOTCH LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42 See} 0.008 10.20: 20-Terminal Leadless Ceramic Chip Carrier (Suffix E) 0082 + 0018 (2.085 + 0.455) 0.080 x 45 - (1.02 = 45") REF 3 PLCS bes = 0.003 TF (0835 = 0.075) Capacitance between terminals D (S) of any two switches. (This will determine the cross coupling between switches vs. frequency.) Delay time between the 50% points of the digital input and switch ON condition. Delay time between the 50% points of the digital input and switch OFF condition. Delay time when switching from one address state to another. Maximum input voltage for a logic low. Minimum input voltage for a logic high. Input current of the digital input. Input capacitance to ground of the digital input, Most positive voltage supply. Most negative voltage supply. Positive supply current. Negative supply current. 16-Pin Cerdip Package (Suffix Q) F 2.271 16.69) 0.240 (6.03) a 0.780 (19.81) , ae eel 0,163 (4,14) 133 (3.378) 0.125 (3. uy yy dagen 81) a an S008 0203" Dostien Dore wade D099 Car 16-Pin Plastic DIP (Suffix N) 0.26 16.81) | O76 19.18) 0.306 (7.78) q O46 (8.93) | o.264 7.47) O17 (4.32 MAX od 1 0.24 (6.1) 1 OM (3.58) 012 (3.08) O.175 (4.46) O12 (3.08) = = o ~{L. -| b, 8.012 (0.305) 0.065 (L66) 0.02 (0.508) 0.106 (2.67) 0.008 (0.203) DOE 15] OO 3en F096 (2.42) LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH LEADS ARE SOLDER OR TIV-PLATED KOVAR OR ALLOY 42 20-Terminal Plastic Leaded Chip Carrier (Suffix P) soo cose om ae $0. (9.905 +0.125) | 9.105 20.016 (2.665 + 0.375) 0.020 _ ios MIN 0.383 0.003 co pl (8.968 = 0.078) 5 nonmnnm HK 0.095 +007 A io.g9 =0.25) _t 0.029 + 0.003 OoOUDUOTU _# 0.017 = 0.004 F (0.4a2 20.101) ! |, 002s ty be RRS na 0.060 (1.53) 418 REV. A C393c-3-5/92 PRINTED IN U.S.A.