SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Bus Transceivers/Registers
D
Independent Registers and Enables for A
and B Buses
D
Multiplexed Real-Time and Stored Data
D
Choice of True or Inverting Data Paths
D
Choice of 3-State or Open-Collector
Outputs to A Bus
D
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
DEVICE A OUTPUT B OUTPUT LOGIC
SN74ALS651A,
’AS651 3 State 3 State Inverting
SN54ALS652,
SN74ALS652A,
’AS652 3 State 3 State T rue
’ALS653 Open Collector 3 State Inverting
SN74ALS654 Open Collector 3 State T rue
description
These devices consist of bus-transceiver circuits,
D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
data bus or from the internal storage registers.
Output-enable (OEAB and OEBA) inputs are
provided to control the transceiver functions.
Select-control (SAB and SBA) inputs are provided
to select real-time or stored data transfer. The
circuitry used for select control eliminates the
typical decoding glitch that occurs in a multiplexer
during the transition between stored and real-time
data. A low input level selects real-time data, and
a high input level selects stored data. Figure 1
illustrates the four fundamental bus-management functions that can be performed with the octal bus
transceivers and registers.
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at
the appropriate clock (CLKAB or CLKBA) terminals, regardless of the select- or output-control terminals. When
SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type
flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input.
When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains
at its last state.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NC – No internal connection
SN54ALS’, SN54AS’. . . FK PACKAGE
(TOP VIEW)
SN54ALS’, SN54AS’. . . JT PACKAGE
SN74ALS’, SN74AS’. . . DW OR NT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLKAB
SAB
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCC
CLKBA
SBA
OEBA
B1
B2
B3
B4
B5
B6
B7
B8
321
13 14
5
6
7
8
9
10
11
OEBA
B1
B2
NC
B3
B4
B5
A1
A2
A3
NC
A4
A5
A6
4
15 16 17 18
A8
GND
NC
B8
B7
B6
OEAB
SAB
CLKAB
NC
28 27 2625
24
23
22
21
20
19
12
A7
CLKBA
SAB
CC
V
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
The -1 versions of the SN74ALS651A and SN74ALS652A are identical to the standard versions except that the
recommended maximum IOL for the -1 versions is increased to 48 mA. There are no -1 versions of the
SN54ALS652, SN54ALS653, SN74ALS653, and SN74ALS654.
The SN54ALS’ and SN54AS’ families are characterized for operation over the full military temperature range
of –55°C to 125°C. The SN74ALS’ and SN74AS’ families are characterized for operation from 0°C to 70°C.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
OEAB
X
L
L
OEAB
LL
CLKAB
XCLKBA
XSAB
XSBA
LCLKAB
XCLKBA
XSAB
LSBA
X
HCLKAB CLKBA
XSAB
XSBA
XCLKAB CLKBA SAB SBA
X
HXX
X
X
X
H L H or L H H
↑↑
↑↑
OEBA
OEBA
HH
OEAB OEBA
OEAB OEBA H or L
REAL-TIME TRANSFER
BUS B TO BUS A REAL-TIME TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B TRANSFER STORED DATA
TO A AND/OR B
3 21 1 23 2 22 1 23 2 22321
3 21 23 2 22 3 21 1 2 22
123
Pin numbers are for the DW, JT, and NT packages.
Figure 1. Bus-Management Functions
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLES
SN54ALS653, SN54AS651,
SN74ALS651A, SN74ALS653, SN74AS651
INPUTS DATA I/O†
OPERATION OR FUNCTION
OEAB OEBA CLKAB CLKBA SAB SBA A1–A8 B1–B8
OPERATION
OR
FUNCTION
L H H or L H or L X X Input Input Isolation
L H ↑↑X X Input Input Store A and B data
X H ↑H or L X X Input Unspecified‡Store A, hold B
H H ↑↑X
‡
X Input Output Store A in both registers
L X H or L ↑X X Unspecified‡Input Hold A, store B
L L ↑↑XX
‡Output Input Store B in both registers
L L X X X L Output Input Real-time B data to A bus
LL X H or L X H Output Input Stored B data to A bus
H H X X L X Input Output Real-time A data to B bus
HH H or L X H X Input Output Stored A data to B bus
H L H or L H or L H H Output Output Stored A data to B bus and
stored B data to A bus
†The data output functions may be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data input functions are always
enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs.
‡Select control = L; clocks can occur simultaneously.
Select control = H; clocks must be staggered to load both registers.
SN54ALS652, SN54AS652,
SN74ALS652A, SN74ALS654, SN74AS652
INPUTS DATA I/O†
OPERATION OR FUNCTION
OEAB OEBA CLKAB CLKBA SAB SBA A1–A8 B1–B8
OPERATION
OR
FUNCTION
L H H or L H or L X X Input Input Isolation
L H ↑↑X X Input Input Store A and B data
X H ↑H or L X X Input Unspecified‡Store A, hold B
H H ↑↑X
‡
X Input Output Store A in both registers
L X H or L ↑X X Unspecified‡Input Hold A, store B
L L ↑↑XX
‡Output Input Store B in both registers
L L X X X L Output Input Real-time B data to A bus
LL X H or L X H Output Input Stored B data to A bus
H H X X L X Input Output Real-time A data to B bus
HH H or L X H X Input Output Stored A data to B bus
H L H or L H or L H H Output Output Stored A data to B bus and
stored B data to A bus
†The data output functions may be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data input functions are always
enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs.
‡Select control = L; clocks can occur simultaneously.
Select control = H; clocks must be staggered to load both registers.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbols†
OEBA EN1 [BA]
21
G5
22
SBA
A1 4B1
20
4D
EN2 [AB]
3
OEAB 23
CLKBA
1
CLKAB G7
2
SAB
5
7
7
5
1
1
6D ≥1
≥1
1
2
C6
C4
A2 5B2
19
A3 6B3
18
A4 7B4
17
A5 8B5
16
A6 9B6
15
A7 10 B7
14
A8 11 B8
13
OEBA EN1 [BA]
21
G5
22
SBA
A1 4B1
20
4D
EN2 [AB]
3
OEAB 23
CLKBA
1
CLKAB G7
2
SAB
5
7
7
5
1
1
6D ≥1
≥1
1
2
C6
C4
A2 5B2
19
A3 6B3
18
A4 7B4
17
A5 8B5
16
A6 9B6
15
A7 10 B7
14
A8 11 B8
13
OEBA EN1 [BA]
21
G5
22
SBA
A1 4B1
20
4D
EN2 [AB]
3
OEAB 23
CLKBA
1
CLKAB G7
2
SAB
5
7
7
5
1
1
6D ≥1
≥1
1
2
C6
C4
A2 5B2
19
A3 6B3
18
A4 7B4
17
A5 8B5
16
A6 9B6
15
A7 10 B7
14
A8 11 B8
13
OEBA EN1 [BA]
21
G5
22
SBA
A1 4B1
20
4D
EN2 [AB]
3
OEAB 23
CLKBA
1
CLKAB G7
2
SAB
5
7
7
5
1
1
6D ≥1
≥1
1
2
C6
C4
A2 5B2
19
A3 6B3
18
A4 7B4
17
A5 8B5
16
A6 9B6
15
A7 10 B7
14
A8 11 B8
13
SN54ALS653, SN74ALS653 SN74ALS654
SN54AS651,
SN74ALS651A, SN74AS651 SN54ALS652, SN54AS652,
SN74ALS652A, SN74AS652
†These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagrams (positive logic)
OEBA
A1 B1
1D
C1
1D
C1
One of Eight Channels
20
4
2
1
22
23
21
3
SAB
CLKAB
SBA
CLKBA
OEAB
To Seven Other Channels
SN54ALS653, SN54AS651,
SN74ALS651A, SN74ALS653, SN74AS651
OEBA
A1 B1
1D
C1
1D
C1
One of Eight Channels
20
4
2
1
22
23
21
3
SAB
CLKAB
SBA
CLKBA
OEAB
To Seven Other Channels
SN54ALS652, SN54AS652,
SN74ALS652A, SN74ALS654, SN74AS652
Pin numbers shown are for the DW, JT, and NT packages.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI: Control inputs 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: SN54ALS652 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ALS651A, SN74ALS652A 0°C to 70°C. . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
recommended operating conditions
SN74ALS651A
UNIT
MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 V
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
IOH High-level output current –15 mA
I
Low level output current
24
mA
I
OL
L
ow-
l
eve
l
ou
t
pu
t
curren
t
48‡m
A
fclock Clock frequency 0 40 MHz
t
Pulse duration
CLKBA or CLKAB high 12.5
ns
t
w
P
u
lse
d
u
ration
CLKBA or CLKAB low 12.5
ns
tsu Setup time before CLKAB↑ or CLKBA↑A or B 10 ns
thHold time after CLKAB↑ or CLKBA↑A or B 0 ns
TAOperating free-air temperature 0 70 °C
‡Applies only to the SN74ALS651A-1 and only if VCC is maintained between 4.75 V and 5.25 V
recommended operating conditions
SN54ALS652 SN74ALS652A
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.7 0.8 V
IOH High-level output current –12 –15 mA
I
Low level output current
12 24
mA
I
OL
L
ow-
l
eve
l
ou
t
pu
t
curren
t
48‡m
A
fclock Clock frequency 0 35 0 40 MHz
t
Pulse duration
CLKBA or CLKAB high 14.5 12.5
ns
t
w
P
u
lse
d
u
ration
CLKBA or CLKAB low 14.5 12.5
ns
tsu Setup time before CLKAB↑ or CLKBA↑A or B 15 10 ns
thHold time after CLKAB↑ or CLKBA↑A or B 5 0 ns
TAOperating free-air temperature –55 125 0 70 °C
‡Applies only to the SN74ALS652A-1 and only if VCC is maintained between 4.75 V and 5.25 V
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
SN74ALS651A
UNIT
PARAMETER
MIN TYP†MAX
UNIT
VIK VCC = 4.5 V, II = –18 mA –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC–2
VOH
VCC =45V
IOH = –3 mA 2.4 3.2 V
V
CC =
4
.
5
V
IOH = –15 mA 2
VCC =45V
IOL = 12 mA 0.25 0.4
VOL
V
CC =
4
.
5
V
IOL = 24 mA 0.35 0.5 V
VCC = 4.75 V, IOL = 48 mA (-1 versions) 0.35 0.5
II
Control inputs VCC = 5.5 V, VI = 7 V 0.1
mA
I
IA or B ports VCC = 5.5 V, VI = 5.5 V 0.1
mA
I
Control inputs
V55V
V27V
20
A
I
IH A or B ports‡
V
CC =
5
.
5
V
,
V
I =
2
.
7
V
20 µ
A
I
Control inputs
V55V
V04V
–0.2
mA
I
IL A or B ports‡
V
CC =
5
.
5
V
,
V
I =
0
.
4
V
–0.2 m
A
IO§VCC = 5.5 V, VO = 2.25 V –30 –112 mA
Outputs high 42 68
ICC VCC = 5.5 V Outputs low 52 82 mA
Outputs disabled 52 82
†All typical values are at VCC = 5 V, TA = 25°C.
‡For I/O ports, the parameters IIH and IIL include the off-state output current.
§The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54ALS652 SN74ALS652A
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC–2 VCC–2
VOH
IOH = –3 mA 2.4 3.2 2.4 3.2
V
V
OH VCC = 4.5 V IOH = –12 mA 2
V
IOH = –15 mA 2
VCC =45V
IOL = 12 mA 0.25 0.4 0.25 0.4
VOL
V
CC =
4
.
5
V
IOL = 24 mA 0.35 0.5 V
VCC = 4.75 V, IOL = 48 mA (-1 versions) 0.35 0.5
II
Control inputs VCC = 5.5 V, VI = 7 V 0.1 0.1
mA
I
IA or B ports VCC = 5.5 V, VI = 5.5 V 0.1 0.1
mA
I
Control inputs
V55V
V27V
20 20
A
I
IH A or B ports‡
V
CC =
5
.
5
V
,
V
I =
2
.
7
V
20 20 µ
A
I
Control inputs
V55V
V04V
–0.2 –0.2
mA
I
IL A or B ports‡
V
CC =
5
.
5
V
,
V
I =
0
.
4
V
–0.2 –0.2 m
A
IO§VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
Outputs high 47 76 47 76
ICC VCC = 5.5 V Outputs low 55 88 55 88 mA
Outputs disabled 55 88 55 88
†All typical values are at VCC = 5 V, TA = 25°C.
‡For I/O ports, the parameters IIH and IIL include the off-state output current.
§The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER FROM
(INPUT) TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX†UNIT
SN74ALS651A
MIN MAX
fmax 40 MHz
tPLH
CLKBA or CLKAB
AorB
832
ns
tPHL
CLKBA
or
CLKAB
A
or
B
5 17
ns
tPLH
AorB
BorA
218
ns
tPHL
A
or
B
B
or
A
2 10
ns
tPLH SBA or SAB
‡
AorB
8 38
ns
tPHL (with A or B high)
A
or
B
621
ns
tPLH SBA or SAB
‡
AorB
8 25
ns
tPHL (with A or B low)
A
or
B
721
ns
tPZH
OEBA
A
320
ns
tPZL
OEBA
A
518
ns
tPHZ
OEBA
A
2 9
ns
tPLZ
OEBA
A
312
ns
tPZH
OEAB
B
322
ns
tPZL
OEAB
B
621
ns
tPHZ
OEAB
B
2 12
ns
tPLZ
OEAB
B
214
ns
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡These parameters are measured with the internal output state of the storage register opposite that of the bus input.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER FROM
(INPUT) TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX†UNIT
SN54ALS652 SN74ALS652A
MIN MAX MIN MAX
fmax 35 40 MHz
tPLH
CLKBA or CLKAB
AorB
10 35 8 30
ns
tPHL
CLKBA
or
CLKAB
A
or
B
5 20 5 17
ns
tPLH
AorB
BorA
520 4 18
ns
tPHL
A
or
B
B
or
A
3 15 3 12
ns
tPLH SBA or SAB
‡
AorB
15 40 8 35
ns
tPHL
SBA
or
SAB
(with A or B high)
A
or
B
623 6 20
ns
tPLH SBA or SAB
‡
AorB
8 30 8 25
ns
tPHL
SBA
or
SAB
(with A or B low)
A
or
B
524 5 20
ns
tPZH
OEBA
A
320 3 17
ns
tPZL
OEBA
A
522 5 18
ns
tPHZ
OEBA
A
1 12 1 10
ns
tPLZ
OEBA
A
220 2 16
ns
tPZH
OEAB
B
825 3 22
ns
tPZL
OEAB
B
621 5 18
ns
tPHZ
OEAB
B
1 12 1 10
ns
tPLZ
OEAB
B
221 2 16
ns
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡These parameters are measured with the internal output state of the storage register opposite that of the bus input.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI: All inputs and A I/O ports 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B I/O ports 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: SN54ALS653 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ALS653, SN74ALS654 0°C to 70°C. . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
recommended operating conditions
SN54ALS653 SN74ALS653
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.7 0.8 V
VOH High-level output voltage A ports 5.5 5.5 V
IOH High-level output current B ports –12 –15 mA
IOL Low-level output current 12 24 mA
fclock Clock frequency 0 25 0 35 MHz
t
Pulse duration
CLKBA or CLKAB high 20 14.5
ns
t
w
P
u
lse
d
u
ration
CLKBA or CLKAB low 20 14.5
ns
tsu Setup time before CLKAB↑ or CLKBA↑A or B 15 10 ns
thHold time after CLKAB↑ or CLKBA↑A or B 5 0 ns
TAOperating free-air temperature –55 125 0 70 °C
recommended operating conditions
SN74ALS654
UNIT
MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 V
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
VOH High-level output voltage A ports 5.5 V
IOH High-level output current B ports –15 mA
IOL Low-level output current 24 mA
fclock Clock frequency 0 35 MHz
t
Pulse duration
CLKBA or CLKAB high 14.5
ns
t
w
P
u
lse
d
u
ration
CLKBA or CLKAB low 14.5
ns
tsu Setup time before CLKAB↑ or CLKBA↑A or B 10 ns
thHold time after CLKAB↑ or CLKBA↑A or B 0 ns
TAOperating free-air temperature 0 70 °C
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54ALS653 SN74ALS653
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC–2 VCC–2
VOH
B
p
orts
IOH = –3 mA 2.4 3.2 2.4 3.2
V
V
OH
B
ports
VCC = 4.5 V IOH = –12 mA 2
V
IOH = –15 mA 2
VOL
VCC =45V
IOL = 12 mA 0.25 0.4 0.25 0.4
V
V
OL
V
CC =
4
.
5
V
IOL = 24 mA 0.35 0.5
V
II
Control inputs VCC = 5.5 V, VI = 7 V 0.1 0.1
mA
I
IA or B ports VCC = 5.5 V, VI = 5.5 V 0.1 0.1
mA
I
Control inputs
V55V
V27V
20 20
A
I
IH A or B ports‡
V
CC =
5
.
5
V
,
V
I =
2
.
7
V
20 20 µ
A
I
Control inputs
V55V
V04V
–0.2 –0.2
mA
I
IL A or B ports‡
V
CC =
5
.
5
V
,
V
I =
0
.
4
V
–0.2 –0.2 m
A
IOH A ports VCC = 4.5 V, VOH = 5.5 V 0.1 0.1 mA
IO§B ports VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
Outputs high 47 76 47 76
ICC VCC = 5.5 V Outputs low 55 88 55 88 mA
Outputs disabled 55 88 55 88
†All typical values are at VCC = 5 V, TA = 25°C.
‡For I/O ports, the parameters IIH and IIL include the off-state output current.
§The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
SN74ALS654
UNIT
PARAMETER
MIN TYP†MAX
UNIT
VIK VCC = 4.5 V, II = –18 mA –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC–2
VOH B ports
VCC =45V
IOH = –3 mA 2.4 3.2 V
V
CC =
4
.
5
V
IOH = –15 mA 2
VOL
VCC =45V
IOL = 12 mA 0.25 0.4
V
V
OL
V
CC =
4
.
5
V
IOL = 24 mA 0.35 0.5
V
II
Control inputs VCC = 5.5 V, VI = 7 V 0.1
mA
I
IA or B ports VCC = 5.5 V, VI = 5.5 V 0.1
mA
IIH
Control inputs
VCC =55V
VI=27V
20
µA
I
IH A or B ports‡
V
CC =
5
.
5
V
,
V
I =
2
.
7
V
20 µ
A
IIL
Control inputs
VCC =55V
VI=04V
–0.2
mA
I
IL A or B ports‡
V
CC =
5
.
5
V
,
V
I =
0
.
4
V
–0.2
mA
IOH A ports VCC = 4.5 V, VOH = 5.5 V 0.1 mA
IO§B ports VCC = 5.5 V, VO = 2.25 V –30 –112 mA
Outputs high 47 76
ICC VCC = 5.5 V Outputs low 55 88 mA
Outputs disabled 55 88
†All typical values are at VCC = 5 V, TA = 25°C.
‡For I/O ports, the parameters IIH and IIL include the off-state output current.
§The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER FROM
(INPUT) TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 680 Ω (A outputs),
R1 = R2 = 500 Ω (B outputs),
TA = MIN to MAX†UNIT
SN54ALS653 SN74ALS653
MIN MAX MIN MAX
fmax 25 35 MHz
tPLH
CLKBA
A
16 71 16 64
ns
tPHL
CLKBA
A
6 24 6 22
ns
tPLH
CLKAB
B
10 35 10 30
ns
tPHL
CLKAB
B
5 20 5 17
ns
tPLH
A
B
520 5 18
ns
tPHL
A
B
1.5 18 2 15
ns
tPLH
B
A
863 12 56
ns
tPHL
B
A
2 18 2 15
ns
tPLH SBA
‡
A
12 68 19 62
ns
tPHL (with B high)
A
5 27 5 25
ns
tPLH SBA
‡
A
12 68 19 62
ns
tPHL (with B low)
A
5 27 5 25
ns
tPLH SAB
‡
B
8 30 15 35
ns
tPHL (with A high)
B
6 25 6 22
ns
tPLH SAB
‡
B
12 40 8 25
ns
tPHL (with A low)
B
6 25 6 22
ns
tPLH
OEBA
A
635 6 30
ns
tPHL
OEBA
A
6 27 6 24
ns
tPZH
OEAB
B
725 8 22
ns
tPZL
OEAB
B
625 6 22
ns
tPHZ
OEAB
B
1 16 1 14
ns
tPLZ
OEAB
B
221 2 16
ns
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡These parameters are measured with the internal output state of the storage register opposite that of the bus input.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER FROM
(INPUT) TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 680 Ω (A outputs),
R1 = R2 = 500 Ω (B outputs),
TA = MIN to MAX†UNIT
SN74ALS654
MIN MAX
fmax 35 MHz
tPLH
CLKBA
A
16 64
ns
tPHL
CLKBA
A
6 22
ns
tPLH
CLKAB
B
10 30
ns
tPHL
CLKAB
B
5 17
ns
tPLH
A
B
518
ns
tPHL
A
B
2 15
ns
tPLH
B
A
12 56
ns
tPHL
B
A
2 21
ns
tPLH SBA
‡
A
19 62
ns
tPHL (with B low)
A
5 25
ns
tPLH SBA
‡
A
19 62
ns
tPHL (with B high)
A
5 25
ns
tPLH SAB
‡
B
15 35
ns
tPHL (with A low)
B
6 22
ns
tPLH SAB
‡
B
8 25
ns
tPHL (with A high)
B
6 22
ns
tPLH
OEBA
A
630
ns
tPHL
OEBA
A
6 24
ns
tPZH
OEAB
B
622
ns
tPZL
OEAB
B
622
ns
tPHZ
OEAB
B
1 14
ns
tPLZ
OEAB
B
216
ns
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡These parameters are measured with the internal output state of the storage register opposite that of the bus input.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI: Control inputs 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: SN54AS651, SN54AS652 –55°C to 125°C. . . . . . . . . . . . . . . . . . .
SN74AS651, SN74AS652 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
recommended operating conditions
SN54AS651
SN54AS652 SN74AS651
SN74AS652 UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
IOH High-level output current –12 –15 mA
IOL Low-level output current 32 48 mA
fclock*Clock frequency 0 75 0 90 MHz
t
*
Pulse duration
CLKBA or CLKAB high 6 5
ns
t
w
*
P
u
lse
d
u
ration
CLKBA or CLKAB low 7 6
ns
tsu*Setup time before CLKAB↑ or CLKBA↑A or B 7 6 ns
th*Hold time after CLKAB↑ or CLKBA A or B 0 0 ns
TAOperating free-air temperature –55 125 0 70 °C
* On products compliant to MIL-PRF-38535, this parameter is based on characterized data but is not production tested.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS SN54AS651
SN54AS652 SN74AS651
SN74AS652 UNIT
MIN TYP†MAX MIN TYP†MAX
VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC–2 VCC–2
VOH
IOH = –3 mA 2.4 3.2 2.4 3.2
V
V
OH VCC = 4.5 V IOH = –12 mA 2
V
IOH = –15 mA 2
VOL
VCC =45V
IOL = 32 mA 0.25 0.5
V
V
OL
V
CC =
4
.
5
V
IOL = 48 mA 0.35 0.5
V
II
Control inputs VCC = 5.5 V, VI = 7 V 0.1 0.1
mA
I
IA or B ports VCC = 5.5 V, VI = 5.5 V 0.1 0.1
mA
I
Control inputs
V55V
V27V
20 20
A
I
IH A or B ports‡
V
CC =
5
.
5
V
,
V
I =
2
.
7
V
70 70 µ
A
I
Control input
V55V
V04V
–0.5 –0.5
mA
I
IL A or B ports‡
V
CC =
5
.
5
V
,
V
I =
0
.
4
V
–0.75 –0.75 m
A
IO§VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
Outputs high 110 185 110 185
′AS651 VCC = 5.5 V Outputs low 120 195 120 195
ICC
Outputs disabled 130 195 130 195
mA
I
CC Outputs high 120 195 120 195
mA
′AS652 VCC = 5.5 V Outputs low 130 211 130 211
Outputs disabled 130 211 130 211
†All typical values are at VCC = 5 V, TA = 25 °C.
‡For I/O ports, the parameters IIH and IIL include the off-state output current.
§The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER FROM
(INPUT) TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX†UNIT
SN54AS651 SN74AS651
MIN MAX MIN MAX
fmax*75 90 MHz
tPLH
CLKBA or CLKAB
AorB
211 2 8.5
ns
tPHL
CLKBA
or
CLKAB
A
or
B
2 10 2 9
ns
tPLH
AorB
BorA
212 2 8
ns
tPHL
A
or
B
B
or
A
1817
ns
tPLH
SBA or SAB‡
AorB
215 2 11
ns
tPHL
SBA
or
SAB‡
A
or
B
211 2 9
ns
tPZH
OEBA
A
211 2 10
ns
tPZL
OEBA
A
318 3 16
ns
tPHZ
OEBA
A
2 10 2 9
ns
tPLZ
OEBA
A
210 2 9
ns
tPZH
OEAB
B
312 3 11
ns
tPZL
OEAB
B
320 3 16
ns
tPHZ
OEAB
B
211 2 10
ns
tPLZ
OEAB
B
212 2 11
ns
* On products compliant to MIL-PRF-38535, this parameter is based on characterized data but is not production tested.
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡These parameters are measured with the internal output state of the storage register opposite that of the bus input.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER FROM
(INPUT) TO
(OUTPUT)
VCC = 4.5 V TO 5.5 V,
CL = 50 PF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN TO MAX†UNIT
SN54AS652 SN74AS652
MIN MAX TYP MAX
fmax*75 90 MHz
tPLH
CLKBA or CLKAB
AorB
211 2 8.5
ns
tPHL
CLKBA
or
CLKAB
A
or
B
2 10 2 9
ns
tPLH
AorB
BorA
212 2 9
ns
tPHL
A
or
B
B
or
A
1 8 1 7
ns
tPLH
SBA or SAB‡
AorB
215 2 11
ns
tPHL
SBA
or
SAB‡
A
or
B
211 2 9
ns
tPZH
OEBA
A
211 2 10
ns
tPZL
OEBA
A
318 3 16
ns
tPHZ
OEBA
A
2 10 2 9
ns
tPLZ
OEBA
A
210 2 9
ns
tPZH
OEAB
B
312 3 11
ns
tPZL
OEAB
B
320 3 16
ns
tPHZ
OEAB
B
211 2 10
ns
tPLZ
OEAB
B
212 2 11
ns
* On products compliant to MIL-PRF-38535, this parameter is based on characterized data but is not production tested.
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡These parameters are measured with the internal output state of the storage register opposite that of the bus input.
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066F – DECEMBER 1983 – REVISED OCT OBER 1996
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
tPHZ
tPLZ
tPHL tPLH 0.3 V
tPZL
tPZH
TEST S1
Open
Open
Open
tPHL
tPZH
tPZL Closed
Open
Closed
tPHZ
tPLZ
tPLH tPHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
From Output
Under Test Test Point
R1 = 500 Ω
S1
CL = 50 pF
(see Note A)
7 V
Open
1.3 V
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
1.3 V 1.3 V 3.5 V
3.5 V
0.3 V
0.3 V
High-Level
Pulse
Low-Level
Pulse
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Input
Out-of-Phase
Output
1.3 V 1.3 V
1.3 V1.3 V
1.3 V 1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
VOL
VOH
VOH
VOL
Output
Control
W aveform 1
S1 Closed
(see Note B)
W aveform 2
S1 Open
(see Note B) 0 V
VOH
VOL
3.5 V
In-Phase
Output
0.3 V
tPLH
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
SWITCH POSITION TABLE
R2 = 500 Ω
VCC
RL
Test Point
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 2 ns, tf≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 2. Load Circuits and Voltage Waveforms
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
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