LT1336 Half-Bridge N-Channel Power MOSFET Driver with Boost Regulator Features n n n n n n n n n n Description Floating Top Driver Switches Up to 60V Internal Boost Regulator for DC Operation 180ns Transition Times Driving 10,000pF Adaptive Nonoverlapping Gate Drives Prevent Shoot-Through Drives Gate of Top N-Channel MOSFET Above Supply Top Drive Maintained at High Duty Cycles TTL/CMOS Input Levels Undervoltage Lockout with Hysteresis Operates at Supply Voltages from 10V to 15V Separate Top and Bottom Drive Pins Applications n n n n n n PWM of High Current Inductive Loads Half-Bridge and Full-Bridge Motor Control Synchronous Step-Down Switching Regulators 3-Phase Brushless Motor Drive High Current Transducer Drivers Class D Power Amplifiers The LT(R)1336 is a cost effective half-bridge N-channel power MOSFET driver. The floating driver can drive the topside N-channel power MOSFETs operating off a high voltage (HV) rail of up to 60V (absolute maximum). In PWM operation an on-chip switching regulator maintains charge in the bootstrap capacitor even when approaching and operating at 100% duty cycle. The internal logic prevents the inputs from turning on the power MOSFETs in a half-bridge at the same time. Its unique adaptive protection against shoot-through currents eliminates all matching requirements for the two MOSFETs. This greatly eases the design of high efficiency motor control and switching regulator systems. During low supply or start-up conditions, the undervoltage lockout actively pulls the driver outputs low to prevent the power MOSFETs from being partially turned on. The 0.5V hysteresis allows reliable operation even with slowly varying supplies. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application 12V 1N4148 200H* RSENSE 2 1/4W + 1 ISENSE 2 SV + 10 PV + 10F 25V 5 3 4 PWM 0Hz TO 100kHz SWITCH BOOST 16 13 TGATEDR LT1336 12 TGATEFB 11 TSOURCE UVOUT 9 BGATEDR INTOP 8 BGATEFB INBOTTOM SGND 6 SWGND PGND 15 7 1N4148 14 HV = 40V MAX** + + IRFZ44 CBOOST 1F 1000F 100V INTOP INBOTTOM IRFZ44 L L H H L H L H TGATEDR BGATEDR L L H L L H L L * SUMIDA RCR-664D-221KC ** FOR HV > 40V SEE "DERIVING THE FLOATING SUPPLY WITH THE FLYBACK TOPOLOGY" IN APPLICATIONS INFORMATION SECTION 1336 TA01 1336fa 1 LT1336 Absolute Maximum Ratings (Note 1) Supply Voltage (Pins 2, 10)........................................20V Boost Voltage.............................................................75V Peak Output Currents (<10s)................................... 1.5A Input Pin Voltages...............................-0.3V to V+ + 0.3V Top Source Voltage........................................ -5V to 60V Boost-to-Source Voltage (VBOOST - V TSOURCE).............................. -0.3V to 20V Switch Voltage (Pin 16)............................... -0.3V to 60V Operating Temperature Range Commercial.............................................. 0C to 70C Industrial..............................................-40C to 85C Junction Temperature (Note 2).............................. 125C Storage Temperature Range................... -65C to 150C Lead Temperature (Soldering, 10 sec).................... 300C Pin Configuration TOP VIEW TOP VIEW 16 SWITCH ISENSE 1 16 SWITCH 2 15 SWGND SV + 15 SWGND 3 14 BOOST INTOP 3 INBOTTOM 4 13 TGATEDR INBOTTOM 4 13 TGATEDR UVOUT 5 12 TGATEFB UVOUT 5 12 TGATEFB SGND 6 11 TSOURCE SGND 6 11 TSOURCE PGND 7 10 PV + PGND 7 10 PV + BGATEFB 8 9 ISENSE SV + INTOP 1 2 BGATEFB 8 BGATEDR N PACKAGE 16-LEAD PLASTIC DIP TJMAX = 125C, JA = 70C/W 14 BOOST 9 BGATEDR S PACKAGE 16-LEAD PLASTIC SO TJMAX = 125C, JA = 110C/W Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT1336CN#PBF LT1336IN#PBF LT1336CN#TRPBF LT1336CN 16-Lead Plastic DIP 0C to 70C LT1336IN#TRPBF LT1336IN 16-Lead Plastic DIP -40C to 85C LT1336CS#PBF LT1336CS#TRPBF LT1336CS 16-Lead Plastic SO 0C to 70C LT1336IS#PBF LT1336IS#TRPBF LT1336IS 16-Lead Plastic SO -40C to 85C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 1336fa 2 LT1336 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Test Circuit, V+ = VBOOST = 12V, VTSOURCE = 0V and Pins 1, 16 open. Gate Feedback pins connected to Gate Drive pins unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX IS DC Supply Current (Note 3) V + = 15V, VINTOP = 0.8V, VINBOTTOM = 2V V+ = 15V, VINTOP = 2V, VINBOTTOM = 0.8V V+ = 15V, VINTOP = 0.8V, VINBOTTOM = 0.8V V+ = 15V, VTSOURCE = 40V, VINTOP = VINBOTTOM = 12 12 12 15 14 15 30 20 20 20 40 mA mA mA mA IBOOST Boost Current (Note 3) V+ = 15V, VTSOURCE = 60V, VBOOST = 75V, VINTOP = VINBOTTOM = 0.8V 3 5 7 mA VIL Input Logic Low l 1.4 0.8 VIH Input Logic High l 2 1.7 0.8V (Note 4) V V IIN Input Current 7 25 A V+UVH V+ Undervoltage Start-Up Threshold 8.4 9.2 9.75 V V+ V+ Undervoltage Shutdown Threshold 7.8 8.3 8.9 V VBUVH VBOOST Undervoltage Start-Up Threshold VTSOURCE = 60V, VBOOST - VTSOURCE 8.8 9.3 9.8 V VBUVL VBOOST Undervoltage Shutdown Threshold VTSOURCE = 60V, VBOOST - VTSOURCE 8.2 8.7 9.2 V IUVOUT Undervoltage Output Leakage V+ = 15V l 0.1 5 A VUVOUT Undervoltage Output Saturation V+ = 7.5V, IUVOUT = 2.5mA l 0.2 0.4 V VOH Top Gate ON Voltage VINTOP = 2V, VINBOTTOM = 0.8V, VTGATE DR - VTSOURCE l 11 11.3 12 V Bottom Gate ON Voltage VINTOP = 0.8V, VINBOTTOM = 2V, VBGATE DR l 11 11.3 12 V Top Gate OFF Voltage VINTOP = 0.8V, VINBOTTOM = 2V, VTGATE DR - VTSOURCE l 0.4 0.7 V Bottom Gate OFF Voltage VINTOP = 2V, VINBOTTOM = 0.8V, VBGATE DR l 0.4 0.7 V 310 480 650 mV 25 55 85 mV 0.85 1.2 V 10.6 11.2 V UVL VOL VINTOP = VINBOTTOM = 4V UNITS = 68V, V + - V VIS ISENSE Peak Current Threshold VTSOURCE = 60V, VBOOST VISHYS ISENSE Hysteresis VTSOURCE = 60V, VBOOST = 68V l ISENSE = V+, V VSAT Switch Saturation Voltage VISENSE BOOST - VTSOURCE = 9V, ISW = 100mA VBOUT VBOOST Regulated Output VTSOURCE = 40V, VINTOP = VINBOTTOM = 0.8V, IBOOST = 10mA, VBOOST - VTSOURCE tr Top Gate Rise Time VINTOP (+) Transition, VINBOTTOM = 0.8V, Measured at VTGATE DR - VTSOURCE (Note 5) l 130 200 ns Bottom Gate Rise Time VINBOTTOM (+) Transition, VINTOP = 0.8V, Measured at VBGATE DR (Note 5) l 90 200 ns Top Gate Fall Time VINTOP (-) Transition, VINBOTTOM = 0.8V, Measured at VTGATE DR - VTSOURCE (Note 5) l 60 140 ns Bottom Gate Fall Time VINBOTTOM (-) Transition, VINTOP = 0.8V, Measured at VBGATE DR (Note 5) l 60 140 ns Top Gate Turn-On Delay VINTOP (+) Transition, VINBOTTOM = 0.8V, Measured at VTGATE DR - VTSOURCE (Note 5) l 250 500 ns Bottom Gate Turn-On Delay VINBOTTOM (+) Transition, VINTOP = 0.8V, Measured at VBGATE DR (Note 5) l 200 400 ns Top Gate Turn-Off Delay VINTOP (-) Transition, VINBOTTOM = 0.8V, Measured at VTGATE DR - VTSOURCE (Note 5) l 300 600 ns Bottom Gate Turn-Off Delay VINBOTTOM (-) Transition, VINTOP = 0.8V, Measured at VBGATE DR (Note 5) l 200 400 ns tf t D1 t D2 l 10 1336fa 3 LT1336 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Test Circuit, V+ = VBOOST = 12V, VTSOURCE = 0V and Pins 1, 16 open. Gate Feedback pins connected to Gate Drive pins unless otherwise specified. SYMBOL PARAMETER CONDITIONS t D3 Top Gate Lockout Delay VINBOTTOM (+) Transition, VINTOP = 2V, Measured at VTGATE DR - VTSOURCE (Note 5) Bottom Gate Lockout Delay t D4 MIN TYP MAX UNITS l 300 600 ns VINTOP (+) Transition, VINBOTTOM = 2V, Measured at VBGATE DR (Note 5) l 250 500 ns Top Gate Release Delay VINBOTTOM (-) Transition, VINTOP = 2V, Measured at VTGATE DR - VTSOURCE (Note 5) l 250 500 ns Bottom Gate Release Delay VINTOP (-) Transition, VINBOTTOM = 2V, Measured at VBGATE DR (Note 5) l 200 400 ns Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas: LT1336CN/LT1336IN: TJ = TA + (PD)(70C/W) LT1336CS/LT1336IS: TJ = TA + (PD)(110C/W) Note 3: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Typical Performance Characteristics and Applications Information sections. Note 4: Pins 1 and 16 connected to each end of the inductor. Booster is free running. Note 5: See Timing Diagram. Gate rise times are measured from 2V to 10V and fall times are measured from 10V to 2V. Delay times are measured from the input transition to when the gate voltage has risen to 2V or decreased to 10V. Typical Performance Characteristics DC Supply Current vs Supply Voltage DC Supply Current vs Temperature 18 VTSOURCE = 0V 18 17 BOTH INPUTS HIGH OR LOW 16 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 20 14 12 VINTOP = HIGH VINBOTTOM = LOW 10 VINTOP = LOW VINBOTTOM = HIGH 8 6 16 BOTH INPUTS HIGH OR LOW 15 14 13 12 VINTOP = HIGH VINBOTTOM = LOW 11 VINTOP = LOW VINBOTTOM = HIGH 10 4 6 8 10 12 14 16 SUPPLY VOLTAGE (V) 18 20 1336 G01 34 V + = 12V VTSOURCE = 0V 9 -50 -25 0 25 50 75 TEMPERATURE (C) V += 12V 31 SUPPLY CURRENT (mA) 22 DC Supply Current vs Top Source Voltage 28 VINTOP = LOW VINBOTTOM = HIGH 25 BOTH INPUTS HIGH OR LOW 22 19 VINTOP = HIGH VINBOTTOM = LOW 16 13 100 125 1336 G02 10 0 5 10 15 20 25 30 TOP SOURCE VOLTAGE (V) 35 40 1336 G18 1336fa 4 LT1336 Typical Performance Characteristics DC + Dynamic Supply Current vs Input Frequency DC + Dynamic Supply Current vs Input Frequency SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 40 V + = 20V 30 50% DUTY CYCLE V+ = 12V 50 V + = 15V 20 V + = 10V 12 11 40 CGATE = 10000pF 30 CGATE = 3000pF 20 1 10 100 INPUT FREQUENCY (kHz) 0 1000 1 2.0 10 100 INPUT FREQUENCY (kHz) SHUTDOWN THRESHOLD 7 6 5 0 25 50 75 TEMPERATURE (C) Top or Bottom Input Pin Current vs Temperature V + = 12V VIN = 4V 13 VHIGH 1.8 125 100 1336 G05 14 12 1.6 VLOW 1.4 1.2 11 10 9 8 7 6 1.0 -25 0 25 50 75 TEMPERATURE (C) 100 0.8 -50 125 -25 0 25 50 75 TEMPERATURE (C) 230 210 BOTTOM GATE RISE TIME (ns) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 4 5 6 10 8 7 9 INPUT VOLTAGE (V) 11 12 1336 G09 50 25 0 75 TEMPERATURE (C) 100 190 210 190 CLOAD = 10000pF 170 150 130 110 CLOAD = 3000pF 90 50 -50 0 25 50 75 TEMPERATURE (C) 100 V + = 12V 170 CLOAD = 10000pF 150 130 110 90 70 CLOAD = 1000pF CLOAD = 3000pF 50 CLOAD = 1000pF -25 125 Bottom Gate Fall Time vs Temperature V + = 12V 70 0.5 -25 1336 G08 Bottom Gate Rise Time vs Temperature V + = 12V 4.5 4 -50 125 BOTTOM GATE FALL TIME (ns) Top or Bottom Input Pin Current vs Input Voltage 5.0 100 1336 G07 1336 G06 INPUT CURRENT (mA) -25 5 4 -50 0 4 -50 1000 INPUT CURRENT (A) INPUT THRESHOLD VOLTAGE (V) VBOOST - VTSOURCE VOLTAGE (V) 9 8 6 V + = 12V VTSOURCE = 60V START-UP THRESHOLD SHUTDOWN THRESHOLD 7 Input Threshold Voltage vs Temperature 13 10 8 1336 G04 Undervoltage Lockout (VBOOST) 11 START-UP THRESHOLD 9 5 1336 G03 12 10 CGATE = 1000pF 10 10 SUPPLY VOLTAGE (V) 50% DUTY CYCLE CGATE = 3000pF 50 0 Undervoltage Lockout (V +) 13 60 60 125 1336 G10 30 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 1336 G11 1336fa 5 LT1336 Typical Performance Characteristics 180 V + = 12V 280 TOP GATE RISE TIME (ns) 260 240 220 200 180 160 CLOAD = 3000pF 140 120 80 -50 -25 0 25 50 75 TEMPERATURE (C) 400 CLOAD = 10000pF 120 100 80 CLOAD = 3000pF 60 100 CLOAD = 1000pF 0 25 50 75 100 TEMPERATURE (C) 400 V + = 12V CLOAD = 3000pF 300 250 BOTTOM DRIVER 200 150 100 -50 400 350 BOTTOM DRIVER 250 200 150 -25 0 25 50 75 TEMPERATURE (C) 100 -25 0 25 50 75 TEMPERATURE (C) 100 1336 G15 11.5 0.50 ISENSE VOLTAGE THRESHOLD (mV) VBOOST REGULATED OUTPUT (V) 0.52 VBOOST - VTSOURCE 10.5 10.0 9.5 V + = 12V VTSOURCE = 40V ILOAD = 10mA 8.5 8.0 -50 -25 0 25 300 TOP DRIVER 250 200 BOTTOM DRIVER 100 -50 125 -25 0 25 50 75 TEMPERATURE (C) 50 75 TEMPERATURE (C) 100 125 1336 G17 ISENSE Voltage Threshold vs Temperature 12.0 9.0 125 V + = 12V CLOAD = 3000pF 1336 G16 VBOOST Regulated Output vs Temperature 11.0 100 150 100 -50 125 0 25 50 75 TEMPERATURE (C) Release Delay Time vs Temperature TOP DRIVER 300 -25 1336 G14 V + = 12V CLOAD = 3000pF 350 TOP DRIVER BOTTOM DRIVER 100 -50 125 RELEASE DELAY TIME (ns) TURN-OFF DELAY TIME (ns) 350 200 Lockout Delay Time vs Temperature LOCKOUT DELAY TIME (ns) 400 TOP DRIVER 250 1336 G13 1336 G12 Turn-Off Delay Time vs Temperature 300 150 20 -50 -25 125 V + = 12V CLOAD = 3000pF 350 140 40 CLOAD = 1000pF 100 Turn-On Delay Time vs Temperature V + = 12V 160 CLOAD = 10000pF TOP GATE FALL TIME (ns) 300 Top Gate Fall Time vs Temperature TURN-ON DELAY TIME (ns) Top Gate Rise Time vs Temperature 100 125 HIGH VOLTAGE THRESHOLD 0.48 0.46 0.44 LOW VOLTAGE THRESHOLD 0.42 0.40 V + = 12V VBOOST = 68V VTSOURCE = 60V 0.38 0.36 -50 -25 0 25 50 75 TEMPERATURE (C) 1336 G19 100 125 1336 G20 1336fa 6 LT1336 Pin Functions ISENSE (Pin 1): Boost Regulator ISENSE Comparator Input. An RSENSE placed between Pin 1 and V + sets the maximum peak current. Pin 1 can be left open if the boost regulator is not used. BGATEDR (Pin 9): Bottom Gate Drive. The high current drive point for the bottom MOSFET. When a gate resistor is used it is inserted between Pin 9 and the gate of the MOSFET. SV+ (Pin 2): Main Signal Supply. Must be closely decoupled to the signal ground Pin 6. PV + (Pin 10): Bottom Driver Supply. Must be connected to the same supply as Pin 2. INTOP (Pin 3): Top Driver Input. Pin 3 is disabled when Pin 4 is high. A 3k input resistor followed by a 5V internal clamp prevents saturation of the input transistors. TSOURCE (Pin 11): Top Driver Return. Connects to the top MOSFET source and the low side of the bootstrap capacitor. INBOTTOM (Pin 4): Bottom Driver Input. Pin 4 is disabled when Pin 3 is high. A 3k input resistor followed by a 5V internal clamp prevents saturation of the input transistors. TGATEFB (Pin 12): Top Gate Feedback. Must connect directly to the top power MOSFET gate. The bottom MOSFET turn-on is inhibited until VTGATE FB - VTSOURCE has discharged to below 2.9V. UVOUT (Pin 5): Undervoltage Output. Open collector NPN output which turns on when V + drops below the undervoltage threshold. TGATEDR (Pin 13): Top Gate Drive. The high current drive point for the top MOSFET. When a gate resistor is used it is inserted between Pin 13 and the gate of the MOSFET. SGND (Pin 6): Small-Signal Ground. Must be routed separately from other grounds to the system ground. BOOST (Pin 14): Top Driver Supply. Connects to the high side of the bootstrap capacitor. PGND (Pin 7): Bottom Driver Power Ground. Connects to source of bottom N-channel MOSFET. SWGND (Pin 15): Boost Regulator Ground. Must be routed separately from the other grounds to the system ground. Pin 15 can be left open if the boost regulator is not used. BGATEFB (Pin 8): Bottom Gate Feedback. Must connect directly to the bottom power MOSFET gate. The top MOSFET turn-on is inhibited until Pin 8 has discharged to below 2.5V. SWITCH (Pin 16): Boost Regulator Switch. Connect this pin to the inductor/diode of the boost regulator network. Pin 16 can be left open if the boost regulator is not used. 1336fa 7 LT1336 Functional Diagram SV + ISENSE + 1 16 SWITCH - 15 SWGND 14 BOOST 6V 480mV TRIP = 10.6V TRIP = 8.7V SV + 2 TOP UV DETECT BIAS 13 TGATEDR - 3k 3 + INTOP 12 TGATEFB 5V 2.9V 11 TSOURCE INBOTTOM 4 10 PV + 3k 5V BOTTOM UV LOCK 5 SGND 6 PGND 7 BGATEFB 8 - UVOUT 9 BGATEDR + 2.5V 1336 FD 1336fa 8 LT1336 Test Circuit 1N4148 200H* + V 2 + + V/I 1F 1 2 3 3k 4 5 6 7 50 50 8 ISENSE SV + SWITCH LT1336 INTOP SWGND BOOST INBOTTOM TGATEDR UVOUT TGATEFB SGND TSOURCE 16 15 14 + 13 V/I + 12 3000pF BGATEDR 1F V 11 + PV + 10 PGND BGATEFB V/I V 9 + 3000pF V * SUMIDA RCR-664D-221KC 1336 TC01 Timing Diagram 2V INTOP 0.8V 2V INBOTTOM 0.8V tr 12V TOP GATE DRIVER t D3 t D2 10V 2V 0V t D1 tr 12V BOTTOM GATE DRIVER 0V t D3 tf t D4 t D2 10V 2V t D1 tf t D4 1336 TD 1336fa 9 LT1336 Operation (Refer to Functional Diagram) The LT1336 incorporates two independent driver channels with separate inputs and outputs. The inputs are TTL/CMOS compatible; they can withstand input voltages as high as V +. The 1.4V input threshold is regulated and has 300mV of hysteresis. Both channels are noninverting drivers. The internal logic prevents both outputs from simultaneously turning on under any input conditions. When both inputs are high both outputs are actively held low. An internal switching regulator permits smooth transition from PWM to DC operation. In PWM operation the bootstrap capacitor is recharged each time Top Source pin goes low. As the duty cycle approaches 100% the output pulse width becomes narrower and the time available to produce an elevated upper MOSFET gate supply becomes shorter than required. As the voltage across the bootstrap capacitor drops below 10.6V, an inductor-based switching regulator kicks in and takes over the charging of the float- ing supply. This allows the output to smoothly transition to 100% duty cycle. An undervoltage detection circuit disables both channels when V + is below the undervoltage trip point. A separate undervoltage detect block disables the high side channel when VBOOST - VTSOURCE is below 9V. The top and bottom gate drivers in the LT1336 each utilize two gate connections: 1) a Gate Drive pin, which provides the turn-on and turn-off currents through an optional series gate resistor, and 2) a Gate Feedback pin which connects directly to the gate to monitor the gate-to-source voltage. Whenever there is an input transition to command the outputs to change states, the LT1336 follows a logical sequence to turn off one MOSFET and turn on the other. First, turn-off is initiated, then VGS is monitored until it has decreased below the turn-off threshold, and finally the other gate is turned on. Applications Information Deriving the Floating Supply In a typical half-bridge driver like the LT1158 or the LT1160, the floating supply for the topside driver is provided by a bootstrap capacitor. This capacitor is recharged each time its negative plate goes low in PWM operation. As the duty cycle approaches 100% the output pulse width becomes narrower and the time available to recharge the bootstrap capacitor becomes shorter than required (1s to 2s). For instance, at 100kHz and at 95% duty cycle the output pulse width is only 0.5s; clearly this is insufficient time to recharge the capacitor by bootstrapping. To get around this problem, the LT1336 incorporates a switching regulator to help recharge the bootstrap capacitor under such extreme conditions. The LT1336 provides all the necessary circuitry to construct a boost or flyback switching regulator. This regulator can charge the bootstrap capacitor when it cannot recharge by bootstrapping. This happens when nearing 100% duty cycle in PWM applications. This is a worst-case condition because the bootstrap capacitor must still provide for the gate charging current of the high side MOSFETs. A diode connected between V + and the Boost pin is still needed to allow conventional bootstrapping of the bootstrap capacitor when duty cycles are below 90%. The LT1336's internal switching regulator can provide enough charge to the bootstrap capacitor to allow the top driver to drive several power MOSFETs in parallel at its maximum operating frequency. The regulated voltage across VBOOST - VTSOURCE is 10.6V; when this voltage is exceeded due to normal bootstrap action, the regulator automatically shuts down. The switching regulator uses a hysteretic current mode control. This method of control is simple, inherently stable and provides peak inductor current limit in every cycle. It is designed to run at a nominal frequency of around 700kHz which is 7x the maximum PWM operating frequency of the LT1336. Since the hysteretic current mode control has no internal oscillator, the frequency is determined by external conditions such as supply voltage and load currents and external components such as inductor value and current sense resistor value. 1336fa 10 LT1336 Applications Information In applications where switching is always above 10kHz and the duty cycle never exceeds 90%, Pins 1, 15 and 16 can be left open. The bootstrap capacitor is then charged by conventional bootstrapping. Only a diode needs to be connected between V+ and the Boost pin. A 0.1F bootstrap capacitor is usually adequate using this technique for driving a single MOSFET under 10,000pF. When driving multiple MOSFETs in parallel, if the total gate capacitance exceeds 10,000pF, the bootstrap capacitor should be increased proportionally above 0.1F (see Paralleling MOSFETs). Deriving the Floating Supply with the Boost Topology The advantage of using the boost topology is its simplicity. Only a resistor, a small inductor, a diode and a capacitor are needed. However, the high voltage rail may not exceed 40V to avoid reaching the collector-base breakdown voltage of the internal NPN switch. The recommended values for the current sense resistor, inductor and bootstrap capacitor are 2, 200H and 1F respectively. Using the recommended component values the boost regulator will run at around 700kHz. To lower the frequency the inductor value can be increased and to increase the frequency the inductor value can be decreased. The sense resistor should be at least 1.5 to maintain adequate inductor current limit. The bootstrap capacitor value should be 1F or larger to minimize ripple voltage. An example of a boost regulator is shown in Figure 1. D1 1N4148 ISENSE SV + SWITCH D2 1N4148 S PV + HV = 40V MAX SWGND LT1336 BOOST + + VBOOST TSOURCE Current drawn from V + is delivered to VBOOST. Some of this current (~ 1.5mA) flows through the topside driver to the Top Source pin. This current is typically returned to ground via the bottom MOSFET or the output load. If the bottom MOSFET were off and the output load were returned to HV, then the Top Source pin will return the current to HV through the top MOSFET or the output load. If the HV supply cannot sink current and no load drawing greater than 1.5mA is connected to the supply, then a resistor from HV to ground may be needed to prevent voltage buildup on the HV supply. Note that the current drawn from V + and delivered to VBOOST is significantly higher than the current drawn from VBOOST as given by: V IIN ( V + ) =IOUT BOOST + V Deriving the Floating Supply with the Flyback Topology 200H* RSENSE 2 1/4W The boost regulator works as follows: when switch S is on, the inductor current ramps up as the magnetic field builds up. During this interval energy is being stored in the inductor and no power is transferred to VBOOST. When the inductor peak current is reached, sensed by the 2 resistor, the switch is turned off. Energy is no longer transferred to the inductor causing the magnetic field to collapse. The collapsing magnetic field induces a change in voltage across the inductor. The Switch pin voltage rises until diode D2 starts conducting. As the inductor current ramps down, the lower inductor current threshold is reached and switch S is turned off, thus completing the cycle. - + CBOOST 1F TGATEDR TGATEFB * SUMIDA RCR-664D-221KC Figure 1. Using the Boost Regulator 1336 F01 For applications where the high voltage rail is greater than 40V, the flyback topology must be used. To configure a flyback regulator, a resistor, a diode, a small 1:1 turns ratio transformer and a capacitor are needed. The maximum voltage across the switch, assuming an ideal transformer, will be about V + + 11.3V. Leakage inductance in nonideal transformers will induce an overvoltage spike at the switch at the instant when it opens. These spikes can be clamped using a snubbing network or a Zener. Unlike the boost topology, the current drawn from V+ (assuming no loss) is equal to the current drawn from VBOOST. 1336fa 11 LT1336 Applications Information Using the components as shown in Figure 2 the flyback regulator will run at around 800kHz. To lower the frequency CFILTER can be increased and to increase the frequency CFILTER can be decreased. D1 1N4148 T1* 1000pF 24V CFILTER 0.1F 6.2k 1:1 1N4148 RSENSE 2 1/4W ISENSE S PV + P = D (IDS ) (1+ ) RDS (ON ) 2 SWGND LT1336 BOOST + VBOOST TSOURCE Since the LT1336 inherently protects the top and bottom MOSFETs from simultaneous conduction, there are no size or matching constraints. Therefore, selection can be made based on the operating voltage and RDS(ON) requirements. The MOSFET BVDSS should be at least equal to the LT1336 absolute maximum operating voltage. For a maximum operating HV supply of 60V, the MOSFET BVDSS should be from 60V to 100V. The MOSFET RDS(ON) is specified at TJ = 25C and is generally chosen based on the operating efficiency required as long as the maximum MOSFET junction temperature is not exceeded. The dissipation in each MOSFET is given by: D2 1N4148 40V SWITCH SV + Power MOSFET Selection + - TGATEDR CBOOST HV = 1F 60V MAX + TGATEFB * COILTRONICS CTX100-1P 1336 F02 Figure 2. Using the Flyback Regulator The flyback regulator works as follows: when switch S is on, the primary current ramps up as the magnetic field builds up. The magnetic field in the core induces a voltage on the secondary winding equal to V+. However, no power is transferred to VBOOST because the rectifier diode D2 is reverse biased. The energy is stored in the transformer's magnetic field. When the primary inductor peak current is reached, the switch is turned off. Energy is no longer transferred to the transformer causing the magnetic field to collapse. The collapsing magnetic field induces a change in voltage across the transformer's windings. During this transition the Switch pin's voltage flies to 10.6V plus a diode above V+, the secondary forward biases the rectifier diode D2 and the transformer's energy is transferred to VBOOST. Meanwhile the primary inductor current goes to zero and the voltage at ISENSE decays to the lower inductor current threshold with a time constant of (RSENSE)(CFILTER), thus completing the cycle. where D is the duty cycle and is the increase in RDS(ON) at the anticipated MOSFET junction temperature. From this equation the required RDS(ON) can be derived: R DS(ON ) = P D (IDS ) (1+ ) 2 For example, if the MOSFET loss is to be limited to 2W when operating at 5A and a 90% duty cycle, the required RDS(ON) would be 0.089/(1 + ). (1 + ) is given for each MOSFET in the form of a normalized RDS(ON) vs temperature curve, but = 0.007/C can be used as an approximation for low voltage MOSFETs. Thus, if TA = 85C and the available heat sinking has a thermal resistance of 20C/W, the MOSFET junction temperature will be 125C and = 0.007(125 - 25) = 0.7. This means that the required RDS(ON) of the MOSFET will be 0.089/1.7 = 0.0523, which can be satisfied by an IRFZ34 manufactured by International Rectifier. Transition losses result from the power dissipated in each MOSFET during the time it is transitioning from off to on, or from on to off. These losses are proportional to (f)(HV)2 and vary from insignificant to being a limiting factor on operating frequency in some high voltage applications. 1336fa 12 LT1336 Applications Information Paralleling MOSFETs When the above calculations result in a lower RDS(ON) than is economically feasible with a single MOSFET, two or more MOSFETs can be paralleled. The MOSFETs will inherently share the currents according to their RDS(ON) ratio as long as they are thermally connected (e.g., on a common heat sink). The LT1336 top and bottom drivers can each drive five power MOSFETs in parallel with only a small loss in switching speeds (see Typical Performance Characteristics). A low value resistor (10 to 47) in series with each individual MOSFET gate may be required to "decouple" each MOSFET from its neighbors to prevent high frequency oscillations (consult manufacturer's recommendations). If gate decoupling resistors are used, the corresponding Gate Feedback pin can be connected to any one of the gates as shown in Figure 3. Driving multiple MOSFETs in parallel may restrict the operating frequency to prevent overdissipation in the LT1336 (see the following Gate Charge and Driver Dissipation). HV GATEDR LT1336 RG* + RG* GATEFB *OPTIONAL 10 1336 F03 Figure 3. Paralleling MOSFETs Gate Charge and Driver Dissipation A useful indicator of the load presented to the driver by a power MOSFET is the total gate charge QG, which includes the additional charge required by the gate-to-drain swing. QG is usually specified for VGS = 10V and VDS = 0.8VDS(MAX). When the supply current is measured in a switching application, it will be larger than given by the DC electrical characteristics because of the additional supply current associated with sourcing the MOSFET gate charge: dQ dQ I SUPPLY =IDC + G + G dt TOP dt BOTTOM The actual increase in supply current is slightly higher due to LT1336 switching losses and the fact that the gates are being charged to more than 10V. Supply Current vs Switching Frequency is given in the Typical Performance Characteristics. The LT1336 junction temperature can be estimated by using the equations given in Note 1 of the Electrical Characteristics. For example, the LT1336IS is limited to less than 31mA from a 12V supply: TJ = 85C + (31mA)(12V)(110C/W) = 126C exceeds absolute maximum In order to prevent the maximum junction temperature from being exceeded, the LT1336 supply current must be verified while driving the full complement of the chosen MOSFET type at the maximum switching frequency. Ugly Transient Issues In PWM applications the drain current of the top MOSFET is a square wave at the input frequency and duty cycle. To prevent large voltage transients at the top drain, a low ESR electrolytic capacitor must be used and returned to the power ground. The capacitor is generally in the range of 25F to 5000F and must be physically sized for the RMS current flowing in the drain to prevent heating and premature failure. In addition, the LT1336 requires a separate 10F capacitor connected closely between Pins 2 and 6. The LT1336 top source is internally protected against transients below ground and above supply. However, the Gate Drive pins cannot be forced below ground. In most applications, negative transients coupled from the source to the gate of the top MOSFET do not cause any problems. Switching Regulator Applications The LT1336 is ideal as a synchronous switch driver to improve the efficiency of step-down (buck) switching regulators. Most step-down regulators use a high current Schottky diode to conduct the inductor current when the switch is off. The fractions of the oscillator period that the switch is on (switch conducting) and off (diode conducting) are given by: 1336fa 13 LT1336 Applications Information switch turns back on. However, I2R losses will occur under these conditions due to the recirculating currents. V Switch On= OUT (Total Period) HV HV-VOUT Switch Off= (Total Period) HV Note that for HV > 2VOUT, the switch is off longer than it is on, making the diode losses more significant than the switch. The worst case for the diode is during a short circuit, when VOUT approaches zero and the diode conducts the short-circuit current almost continuously. Figure 4 shows the LT1336 used to synchronously drive a pair of power MOSFETs in a step-down regulator application, where the top MOSFET is the switch and the bottom MOSFET replaces the Schottky diode. Since both conduction paths have low losses, this approach can result in very high efficiency (90% to 95%) in most applications. For regulators under 10A, using low RDS(ON) N-channel MOSFETs eliminates the need for heat sinks. RGS holds the top MOSFET off when HV is applied before the 12V supply. One fundamental difference in the operation of a stepdown regulator with synchronous switching is that it never becomes discontinuous at light loads. The inductor current doesn't stop ramping down when it reaches zero, but actually reverses polarity, resulting in a constant ripple current independent of load. This does not cause a significant efficiency loss (as might be expected) since the negative inductor current is returned to HV when the The LT1336 performs the synchronous MOSFET drive in a step-down switching regulator. A reference and PWM are required to complete the regulator. Any voltage mode or current mode PWM controller may be used but the LT3526 is particularly well-suited to high power, high efficiency applications such as the 10A circuit shown in Figure 6. In higher current regulators a small Schottky diode across the bottom MOSFET helps to reduce reverse- recovery switching losses. Motor Drive Applications In applications where rotation is always in the same direction, a single LT1336 controlling a half-bridge can be used to drive a DC motor. One end of the motor may be connected either to supply or to ground. A motor in this configuration is controlled by its inputs which give three alternatives: run, free running stop (coasting) and fast stop ("plugging" braking with the motor shorted by one of the MOSFETs). Whenever possible, returning one end of the motor to ground is preferable. When the motor is returned to supply and the boost topology is used to charge the bootstrap capacitor, the return current from the top driver will find its way to the high voltage rail through the top MOSFET. Since most power supplies cannot sink current, this HV + TGATEDR TGATEFB LT1336 OUT A INTOP REF PWM OUT A TSOURCE BGATEDR INBOTTOM RGS RSENSE + VOUT BGATEFB 1336 F04 Figure 4. Adding Synchronous Switching to a Step-Down Switching Regulator 1336fa 14 LT1336 Applications Information current can raise the voltage of the high voltage rail. This can be avoided by placing a discharge resistor between HV supply and ground to divert the return current to ground as shown in Figure 5. For a high voltage rail of 40V, a 26k resistor or smaller should be used, since the top driver will return about 1.5mA. The motor speed in these examples can be controlled by switching the drivers with pulse width modulated square waves. This approach is particularly suitable for microcomputers/DSP control loops. D1 1N4148 For applications where using a discharge resistor is undesirable, use the flyback regulator topology instead of the boost regulator topology (see Deriving the Floating Supply with the Flyback Topology). 200H* + RSENSE 2 ISENSE 1/4W To drive a DC motor in both directions, two LT1336s can be used to drive an H-bridge output stage. In this configuration the motor can be made to run clockwise, counterclockwise, stop rapidly ("plugging" braking) or free run (coast) to a stop. A very rapid stop may be achieved by reversing the current, though this requires more careful design to stop the motor dead. In practice a closed-loop control system with tachometric feedback is usually necessary. + HV = 40V MAX SWITCH V+ BOOST V+ TGATEDR 10F TGATEFB LT1336 TSOURCE RDISCHRG 24k D2 1N4148 + VBOOST + CBOOST 1F - BGATEDR BGATEFB *SUMIDA RCR-664D-221KC PGND 1336 F05 Figure 5. Driving a Supply Referenced Motor Typical Applications C1 0.1F 4.7k 4.7k 0.1F + 0.022F 1F 0.33F + 3 16 4 15 5 0.1F 510 SHUTDOWN LT3526 1N4148 1 2 3 14 1k 1N4148 5k 4 6 13 7 12 8 11 7 9 10 8 27k 1k 5 2N2222 12V L1* 200H 10F RSENSE 2, 1/4W 17 2 2k + 18 1 360 1F 6 ISENSE SV + SWITCH LT1336 INTOP INBOTTOM SWGND BOOST TGATEDR UVOUT TGATEFB SGND TSOURCE PGND BGATEFB PV 16 + 40V 2200F EA LOW ESR 1N4148 15 14 13 12 + IRFZ44 1F 330k 11 + 10 BGATEDR + 1N4148 9 L2** 70H RS 0.007 + IRFZ44 IRFZ44 MBR340 5V 5400F LOW ESR 2.2nF f = 25kHz * SUMIDA RCR-664D-221KC ** MAGNETICS CORE #55585-A2 30 TURNS 14GA MAGNET WIRE DALE TYPE LVR-3 ULTRONIX RCS01 1336 F06 Figure 6. 90% Efficiency, 40V to 5V, 10A, Low Dropout Voltage Mode Switching Regulator 1336fa 15 LT1336 Typical Applications 100F 10k + IN 150k 12V 0.0033F 1k + 60V MAX 10F 1N4148 5V 0.1F 1000F 0.1F 1 1k 1 8 1 8 2 2 7 2 7 3 6 3 6 4 5 4 5 5 LT1015 3 100k 1k 4 TC4428 6 1k 1 2 + 1F 3 0.1F LT1016 4 8 7 7 8 + 5 10k + 47F 200k 47F 10k 95k 2 13 3 12 4 LT1058 10 6 9 7 8 INTOP BOOST INBOTTOM UVOUT TGATEDR TGATEFB SGND TSOURCE PGND PV + BGATEFB BGATEDR + 15 14 13 12 IRFZ44 0.1F 330k 11 L* 158H 10 9 1N4148 + 10F IRFZ44 1000F + 1 2 3 10k 4 -12V 11 5 SWGND 10F 10k 14 LT1336 16 + 0.0033F 1 SV + SWITCH 6 10k 1k ISENSE 150k 5 6 0.1F 7 8 ISENSE SV + SWITCH LT1336 SWGND INTOP INBOTTOM UVOUT BOOST TGATEDR TGATEFB SGND TSOURCE PGND PV + BGATEFB BGATEDR 16 15 LOAD 14 13 12 11 IRFZ44 0.1F 330k L* 158H + 10 9 10F IRFZ44 + 10k 200k 47F + 47F 10k 95k * Kool M CORE #77548-A7 35 TURNS 14GA MAGNET WIRE fCARRIER = 100kHz 1336 F07 Figure 7. 200W Class D, 10Hz to 1kHz Amplifier 1336fa 16 LT1336 Package Description N Package 16-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) .770* (19.558) MAX 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 .255 .015* (6.477 0.381) .300 - .325 (7.620 - 8.255) .008 - .015 (0.203 - 0.381) ( +.035 .325 -.015 +0.889 8.255 -0.381 NOTE: 1. DIMENSIONS ARE ) .130 .005 (3.302 0.127) .045 - .065 (1.143 - 1.651) .020 (0.508) MIN .065 (1.651) TYP .120 (3.048) MIN .100 (2.54) BSC INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) .018 .003 (0.457 0.076) N16 1002 1336fa 17 LT1336 Package Description S Package 16-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .386 - .394 (9.804 - 10.008) NOTE 3 .045 .005 .050 BSC 16 N .245 MIN 14 13 12 11 10 9 N .160 .005 .150 - .157 (3.810 - 3.988) NOTE 3 .228 - .244 (5.791 - 6.197) 1 .030 .005 TYP 15 2 3 N/2 N/2 RECOMMENDED SOLDER PAD LAYOUT .010 - .020 x 45 (0.254 - 0.508) .008 - .010 (0.203 - 0.254) 1 2 3 4 5 .053 - .069 (1.346 - 1.752) NOTE: 1. DIMENSIONS IN .014 - .019 (0.355 - 0.483) TYP 7 8 .004 - .010 (0.101 - 0.254) 0 - 8 TYP .016 - .050 (0.406 - 1.270) 6 .050 (1.270) BSC S16 0502 INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 1336fa 18 LT1336 Revision History REV DATE DESCRIPTION PAGE NUMBER A 10/10 Change to Undervoltage Start-Up Threshold and Undervoltage Shutdown Threshold max limits in Electrical Characteristics section. 3 Updated Notes in Electrical Characteristics section. 4 Updated Related Parts. 20 1336fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT1336 Typical Application 2.2F 1F + 2k + 10k 18k 6800pF * HURRICANE LAB HL-KM147U ** DALE TYPE LVR-3 ULTRONIX RCS01 100pF 0.1F 25k 500k 18k 1 16 2 15 3 14 4 13 LT1846 5 10F 2 1N4148 3 1k 4 5 6 11 6 7 10 8 9 1N4148 7 5k Q1 10k 1k 2200F EA LOW ESR LT1336 1 12 4700pF 12V 1N4148 + 8 ISENSE SWITCH SV + SWGND INTOP INBOTTOM UVOUT SGND PGND BGATEFB BOOST TGATEDR TGATEFB TSOURCE 16 15 40V + 14 13 12 IRFZ34 0.1F 330k 11 10 PV + BGATEDR + 9 L* 47H RS** 0.007 + IRFZ44 IRFZ44 5V 5400F LOW ESR MBR340 f = 40kHz 1136 F08 Figure 8. 90% Efficiency, 40V to 5V, 10A, Low Dropout Current Mode Switching Regulator Related Parts PART NUMBER DESCRIPTION COMMENTS LT1158 Half-Bridge N-Channel Power MOSFET Driver Single Input, Continuous Current Protection and Internal Charge Pump for DC Operation LT1160 Half-Bridge N-Channel Power MOSFET Driver One Input per Channel, 60V High Voltage Supply Rail and Undervoltage Protection LTC4446 High Voltage Highside/Lowside Driver Separate Input Channels, 100V Maximum Input Voltage, MSOP-8 1336fa 20 Linear Technology Corporation LT 1010 REV A * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 1996