1
Motorola Small–Signal Transistors, FETs and Diodes Device Data
N–Channel
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain–Gate Voltage VDG 25 Vdc
Reverse Gate–Source Voltage VGS(r) 25 Vdc
Forward Gate Current IG(f) 10 mAdc
Continuous Device Dissipation at or Below
TC = 25°C
Linear Derating Factor
PD200
2.8 mW
mW/°C
Storage Channel Temperature Range Tstg –65 to +150 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation FR–5 Board(1)
TA = 25°C
Derate above 25°C
PD225
1.8
mW
mW/°C
Thermal Resistance, Junction to Ambient R
q
JA 556 °C/W
Junction and Storage Temperature TJ, Tstg –55 to +150 °C
DEVICE MARKING
MMBF5484LT1 = 6B
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Gate–Source Breakdown Voltage
(IG = –1.0 µAdc, VDS = 0) V(BR)GSS –25 — Vdc
Gate Reverse Current
(VGS = –20 Vdc, VDS = 0)
(VGS = –20 Vdc, VDS = 0, TA = 100°C)
IGSS —
—–1.0
–0.2 nAdc
µAdc
Gate Source Cutoff Voltage
(VDS = 15 Vdc, ID = 10 nAdc) VGS(off) –0.3 –3.0 Vdc
ON CHARACTERISTICS
Zero–Gate–Voltage Drain Current
(VDS = 15 Vdc, VGS = 0) IDSS 1.0 5.0 mAdc
SMALL–SIGNAL CHARACTERISTICS
Forward Transfer Admittance
(VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) |Yfs|3000 6000 µmhos
Output Admittance
(VDS = 15 Vdc, VGS = 0, f = 1.0 kHz) |yos| — 50 µmhos
1. FR–5 = 1.0
0.75
0.062 in.
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
Order this document
by MMBF5484LT1/D
SEMICONDUCTOR TECHNICAL DATA
Motorola Preferred Device
12
3
CASE 318–08, STYLE 10
SOT–23 (TO–236AB)
Motorola, Inc. 1996
2 SOURCE
3
GATE
1 DRAIN
MMBF5484LT1
2 Motorola Small–Signal Transistors, FETs and Diodes Device Data
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic Symbol Min Max Unit
SMALL–SIGNAL CHARACTERISTICS (Continued)
Input Capacitance
(VDS = 15 Vdc, VGS = 0, f = 1.0 MHz) Ciss —5.0 pF
Reverse T ransfer Capacitance
(VDS = 15 Vdc, VGS = 0, f = 10 MHz) Crss —1.0 pF
Output Capacitance
(VDS = 15 Vdc, VGS = 0, f = 1.0 MHz) Coss —2.0 pF
FUNCTIONAL CHARACTERISTICS
Noise Figure
(VDS = 15 Vdc, ID = 1.0 mAdc, YG′ = 1.0 mmhos)
(RG = 1.0 kΩ, f = 100 MHz)
(VDS = 15 Vdc, VGS = 0, YG′ = 1.0 µmhos)
(RG = 1.0 MΩ, f = 1.0 kHz)
NF
—
—
3.0
2.5
dB
Common Source Power Gain
(VDS = 15 Vdc, ID = 1.0 mAdc, f = 100 MHz) Gps 16 25 dB
PG, POWER GAIN (dB)
POWER GAIN
2.0 ID, DRAIN CURRENT (mA)
Figure 1. Effects of Drain Current
4.0
24
8.0
12
16
20
0 4.0 6.0 8.0 10 12 14
f = 100 MHz
400 MHz
Tchannel = 25
°
C
VDS = 15 Vdc
VGS = 0 V
MMBF5484LT1
3
Motorola Small–Signal Transistors, FETs and Diodes Device Data
NF, NOISE FIGURE (dB)
2.0 VDS, DRAIN–SOURCE VOLT AGE (VOLTS)
Figure 2. 100 MHz and 400 MHz Neutralized Test Circuit
0
10
2.0
4.0
6.0
8.0
0 4.0 6.0 8.0 10 12 14
ID = 5.0 mA
100 MHz
VDS = 15 Vdc
f1 = 399 MHz
f2 = 400 MHz
NF, NOISE FIGURE (dB)
2.0 ID, DRAIN CURRENT (mA)
1.5
6.5
2.5
3.5
4.5
5.5
0 4.0 6.0 8.0 10 12 14
Figure 3. Effects of Drain–Source Voltage Figure 4. Effects of Drain Current
NOISE FIGURE
(Tchannel = 25°C)
*L1 17 turns, (approx. — depends upon circuit layout) A WG #28
enameled copper wire, close wound on 9/32″ ceramic coil
form. T uning provided by a powdered iron slug.
*L2 4–1/2 turns, A WG #18 enameled copper wire, 5/16″ long,
3/8″ I.D. (AIR CORE).
*L3 3–1/2 turns, A WG #18 enameled copper wire, 1/4″ long,
3/8″ I.D. (AIR CORE).
**L1 6 turns, (approx. — depends upon circuit layout) A WG #24
enameled copper wire, close wound on 7/32″ ceramic coil
form. T uning provided by an aluminum slug.
**L2 1 turn, AWG #16 enameled copper wire, 3/8″ I.D.
(AIR CORE).
**L3 1/2 turn, A WG #16 enameled copper wire, 1/4″ I.D.
(AIR CORE).
Adjust VGS for
ID = 50 mA
VGS < 0 Volts
NOTE: The noise source is a hot–cold body
(AIL type 70 or equivalent) with a
test receiver (AIL type 136 or equivalent).
Reference
Designation VALUE
100 MHz 400 MHz
C1 7.0 pF 1.8 pF
C2 1000 pF 17 pF
C3 3.0 pF 1.0 pF
C4 1–12 pF 0.8–8.0 pF
C5 1–12 pF 0.8–8.0 pF
C6 0.0015 µF 0.001 µF
C7 0.0015 µF 0.001 µF
L1 3.0 µH* 0.2 µH**
L2 0.15 µH* 0.03 µH**
L3 0.14 µH* 0.022 µH**
INPUT
TO 50
Ω
SOURCE
NEUTRALIZING
COIL L1
C5
L3Rg
′
C1
C6
C4 L2
C3
TO 500
Ω
LOAD
CASE
C7
COMMON ID = 5.0 mA
VGS VDS
+15 V
C2
Pin, INPUT POWER PER TONE (dB)
+40
Figure 5. Third Order Intermodulation Distortion
P , OUTPUT POWER PER TONE (dB)
out
16 18 20
f = 400 MHz f = 400 MHz
100 MHz
VDS = 15 V
VGS = 0 V
+20
0
–20
–40
–60
–80
–100
–120
–140
–160
–120 –100 –80 –60 –40 –20 0 +20
3RD ORDER INTERCEPT
FUNDAMENTAL
OUTPUT @ IDSS,
0.25 IDSS
3RD ORDER IMD
OUTPUT @ IDSS,
0.25 IDSS
INTERMODULATION CHARACTERISTICS
MMBF5484LT1
4 Motorola Small–Signal Transistors, FETs and Diodes Device Data
f, FREQUENCY (MHz)
30
10
bis @ IDSS
f, FREQUENCY (MHz)
5.0
Figure 6. Input Admittance (yis) Figure 7. Reverse Transfer Admittance (yrs)
COMMON SOURCE CHARACTERISTICS
ADMITTANCE PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C)
f, FREQUENCY (MHz)
20
f, FREQUENCY (MHz)
10
Figure 8. Forward Transadmittance (yfs) Figure 9. Output Admittance (yos)
gis, INPUT CONDUCTANCE (mmhos)
20
10
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
20 30 50 70 100 200 300 500 700 1000
bis, INPUT SUSCEPTANCE (mmhos)
gfs, FORWARD TRANSCONDUCTANCE (mmhos)
|bfs|, FORWARD SUSCEPTANCE (mmhos)
grs, REVERSE TRANSADMITTANCE (mmhos)
brs, REVERSE SUSCEPTANCE (mmhos)
0.2
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
10
gos, OUTPUT ADMITTANCE (mhos)
bos, OUTPUT SUSCEPTANCE (mhos)
3.0
0.05
0.07
0.1
0.2
0.3
0.7
0.5
1.0
2.0
10 20 30 50 70 100 200 300 500 700 1000
10 20 30 50 70 100 200 300 500 700 1000 0.01
0.02
0.05
0.1
0.2
0.5
1.0
2.0
5.0
10 20 30 50 70 100 200 300 500 700 1000
bis @ 0.25 IDSS
gis @ IDSS
gis @ 0.25 IDSS
brs @ IDSS
0.25 IDSS
grs @ IDSS, 0.25 IDSS
gfs @ IDSS
|bfs| @ IDSS
|bfs| @ 0.25 IDSS
bos @ IDSS and 0.25 IDSS
gos @ IDSS
gos @ 0.25 IDSS
gfs @ 0.25 IDSS
MMBF5484LT1
5
Motorola Small–Signal Transistors, FETs and Diodes Device Data
Figure 10. S11s Figure 11. S12s
0
°
350
°
340
°
330
°
10
°
20
°
30
°
180
°
190
°
200
°
210
°
170
°
160
°
150
°
320
°
310
°
300
°
290
°
280
°
270
°
260
°
250
°
240
°
230
°
220
°
40
°
50
°
60
°
70
°
80
°
90
°
100
°
110
°
120
°
130
°
140
°
0
°
350
°
340
°
330
°
10
°
20
°
30
°
180
°
190
°
200
°
210
°
170
°
160
°
150
°
320
°
310
°
300
°
290
°
280
°
270
°
260
°
250
°
240
°
230
°
220
°
40
°
50
°
60
°
70
°
80
°
90
°
100
°
110
°
120
°
130
°
140
°
0
°
350
°
340
°
330
°
10
°
20
°
30
°
180
°
190
°
200
°
210
°
170
°
160
°
150
°
320
°
310
°
300
°
290
°
280
°
270
°
260
°
250
°
240
°
230
°
220
°
40
°
50
°
60
°
70
°
80
°
90
°
100
°
110
°
120
°
130
°
140
°
0
°
350
°
340
°
330
°
10
°
20
°
30
°
180
°
190
°
200
°
210
°
170
°
160
°
150
°
320
°
310
°
300
°
290
°
280
°
270
°
260
°
250
°
240
°
230
°
220
°
40
°
50
°
60
°
70
°
80
°
90
°
100
°
110
°
120
°
130
°
140
°
1.0
0.9
0.8
0.7
0.6
0.4
0.3
0.2
0.1
0.0
1.0
0.9
0.8
0.7
0.6
0.6
0.5
0.4
0.3
0.3
0.4
0.5
0.6
900 900
800
700
600
500
400
300
200
100
800 700
600
500
400
300
200
100
ID = 0.25 IDSS
ID = IDSS
100
200
300
400
600 700
800 900
500
ID = IDSS, 0.25 IDSS
900
500
800
700
600
500
400 300 200
100
ID = 0.25 IDSS
ID = IDSS 100
200
300
400
900
600
700
800
900
800
600
400
300
200
200
100 ID = 0.25 IDSS
ID = IDSS 900
100 500
700
300
400
500
600
700
800
Figure 12. S21s Figure 13. S22s
COMMON SOURCE CHARACTERISTICS
S–PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C, Data Points in MHz)
MMBF5484LT1
6 Motorola Small–Signal Transistors, FETs and Diodes Device Data
f, FREQUENCY (MHz)
10
gig @ IDSS
f, FREQUENCY (MHz)
0.5
Figure 14. Input Admittance (yig) Figure 15. Reverse Transfer Admittance (yrg)
COMMON GATE CHARACTERISTICS
ADMITTANCE PARAMETERS
(VDG = 15 Vdc, Tchannel = 25°C)
f, FREQUENCY (MHz) f, FREQUENCY (MHz)
Figure 16. Forward Transfer Admittance (yfg) Figure 17. Output Admittance (yog)
gig, INPUT CONDUCTANCE (mmhos)
20
10
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
20 30 50 70 100 200 300 500 700 1000
big, INPUT SUSCEPTANCE (mmhos)
gfg, FORWARD TRANSCONDUCTANCE (mmhos)
bfg, FORWARD SUSCEPTANCE (mmhos)
grg, REVERSE TRANSADMITTANCE (mmhos)
brg, REVERSE SUSCEPT ANCE (mmhos)
0.2
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
10
gog, OUTPUT ADMITTANCE (mmhos)
bog, OUTPUT SUSCEPTANCE (mmhos)
0.3
0.01
0.1
0.2
10 20 30 50 70 100 200 300 500 700 1000
10 20 30 50 70 100 200 300 500 700 1000 0.01
0.02
0.03
0.3
10 20 30 50 70 100 200 300 500 700 1000
big @ 0.25 IDSS
big @ IDSS
grg @ 0.25 IDSS
gfg @ IDSS
gfg @ 0.25 IDSS
brg @ 0.25 IDSS
bog @ IDSS, 0.25 IDSS
gog @ IDSS
gog @ 0.25 IDSS
0.2 0.005
0.007
0.02
0.03
0.05
0.07
0.1
0.05
0.07
0.1
0.2
0.5
0.7
1.0
brg @ IDSS
0.25 IDSS
gig @ IDSS, 0.25 IDSS
bfg @ IDSS
MMBF5484LT1
7
Motorola Small–Signal Transistors, FETs and Diodes Device Data
0
°
350
°
340
°
330
°
10
°
20
°
30
°
180
°
190
°
200
°
210
°
170
°
160
°
150
°
320
°
310
°
300
°
290
°
280
°
270
°
260
°
250
°
240
°
230
°
220
°
40
°
50
°
60
°
70
°
80
°
90
°
100
°
110
°
120
°
130
°
140
°
0
°
350
°
340
°
330
°
10
°
20
°
30
°
180
°
190
°
200
°
210
°
170
°
160
°
150
°
320
°
310
°
300
°
290
°
280
°
270
°
260
°
250
°
240
°
230
°
220
°
40
°
50
°
60
°
70
°
80
°
90
°
100
°
110
°
120
°
130
°
140
°
0
°
350
°
340
°
330
°
10
°
20
°
30
°
180
°
190
°
200
°
210
°
170
°
160
°
150
°
320
°
310
°
300
°
290
°
280
°
270
°
260
°
250
°
240
°
230
°
220
°
40
°
50
°
60
°
70
°
80
°
90
°
100
°
110
°
120
°
130
°
140
°
0
°
350
°
340
°
330
°
10
°
20
°
30
°
180
°
190
°
200
°
210
°
170
°
160
°
150
°
320
°
310
°
300
°
290
°
280
°
270
°
260
°
250
°
240
°
230
°
220
°
40
°
50
°
60
°
70
°
80
°
90
°
100
°
110
°
120
°
130
°
140
°
Figure 18. S11g Figure 19. S12g
Figure 20. S21g Figure 21. S22g
0.7
0.6
0.5
0.4
0.3
0.04
0.5
0.4
0.3
0.2
1.0
0.9
0.8
0.7
0.6
0.03
0.02
0.01
0.0
0.01
0.02
0.03
0.04
0.1
900
900
800
700
600
500
300
200
100
800
700
600
500
400
300
200
100
ID = 0.25 IDSS
ID = IDSS
100 200 300 400500600
700
800
900
900
600
700
800
ID = 0.25 IDSS
ID = IDSS
100
900
100
900
ID = 0.25 IDSS
ID = IDSS
1.5
100 400 500
600 700
800 900
ID = IDSS, 0.25 IDSS
COMMON GATE CHARACTERISTICS
S–PARAMETERS
(VDS = 15 Vdc, Tchannel = 25°C, Data Points in MHz)
MMBF5484LT1
8 Motorola Small–Signal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
SOT–23
mm
inches
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:
PD = TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T A of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD = 150°C – 25°C
556°C/W = 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•Always preheat the device.
•The delta temperature between the preheat and
soldering should be 100°C or less.*
•When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
•The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
•When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
•After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
•Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
MMBF5484LT1
9
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PACKAGE DIMENSIONS
DJ
K
L
A
C
BS
H
GV
3
12
CASE 318–08
ISSUE AE
SOT–23 (TO–236AB)
DIM
AMIN MAX MIN MAX
MILLIMETERS
0.1102 0.1197 2.80 3.04
INCHES
B0.0472 0.0551 1.20 1.40
C0.0350 0.0440 0.89 1.11
D0.0150 0.0200 0.37 0.50
G0.0701 0.0807 1.78 2.04
H0.0005 0.0040 0.013 0.100
J0.0034 0.0070 0.085 0.177
K0.0180 0.0236 0.45 0.60
L0.0350 0.0401 0.89 1.02
S0.0830 0.0984 2.10 2.50
V0.0177 0.0236 0.45 0.60
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
MMBF5484LT1
10 Motorola Small–Signal Transistors, FETs and Diodes Device Data
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Af firmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center ,
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INTERNET: http://Design–NET.com 51 Ti n g K o k Road, Tai Po, N.T., Hong Kong. 852–26629298
MMBF5484LT1/D
*MMBF5484LT1/D*
◊
