Package Outline TO-220 TO-220F
(7900A) (7900FA)
ABSOLUTE MAXIMUM RATINGS (Ta=25℃)
PARAMETER SYMBOL UNIT
Storage Temperature Range Tstg
Tj
Topr
Power Dissipation PDW
THERMAL RESISTANCE
Θ ja
Θ jc
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
ML7905A / ML7905FA
Output Voltage Vo VIN=-10V Io=0.5A -4.8 -5.0 -5.2 V
Quiescent Current IQVIN=-10V Io=0mA - 2.2 5.0 mA
Load Regulation ΔVo Io VIN=-10V - 50 100 mV
Line Regulation ΔVo Vin VIN=-7 to -25V Io=0.5A - 12.5 100 mV
Ripple Rejection RR VIN=-10V Io=0.5A ein=2Vp-p f=120Hz 54 60 -dB
Output Noise Voltage VNO VIN=-10V Io=0.5A - 125 -μV
Average Temperature
Cofficient of Out
p
ut Volta
ge
ΔVo / ΔTVIN=-10V Io=5mA - -0.4 - mV/
APR 2005
TEST CONDITIONS
BW=10Hz to 100KHz
Io=0.005A to 1.5A
Maximum Rating
ML7905 to ML7909
ML7912 to ML7920
ML7924
Operating Junction Temperature
15(Tc45 )
VIN
-30 to +125
-30 to +75
Input Voltage
-40 to +125
V
-35
-35
-40
Junction-to-Case
60
5
Operating Temperature
Range Operating Ambient Temperature
The ML7900 series are 3-Terminal Negative Voltage Regulators. These negative regulators are intended as complements to
the popular ML7800 series of positive voltage regulations, and they are available in the same voltage options from -5V to -
24V. The ML7900 series employ internal current-limiting. safe-area protection , and thermal shutdown, making them
virtually indestructible.
* Parts of FBE are satisfied with requirements of directive 2002/95/EC on RoHS.
3-TERMINAL NEGATIVE
VOLTAGE REGULATOR
/W
(Tj=25,C1=0.33μF,Co=0.1μF)
ELECTRICAL CHARACTERISTICS Measurement is to be conducted
in pulse testing.
Thermal Resistance Junction-to-Ambient Temperature
1. OUT
2. IN
3. COMMON
ML7900 - FBE*
SERIES
321
MICRO ELECTRONICS LTD.
7/F, Enterprise Square Three, 39 Wang Chiu Road, Kowloon Bay, Kowloon, Hong Kong.
Fax: (852) 2341 0321 Tel: (852) 2343 0181-5 Website: www.microelectr.com.hk
Page 1 of 10
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
ML7906A / ML7906FA
Output Voltage Vo VIN=-11V Io=0.5A -5.75 -6.0 -6.25 V
Quiescent Current IQVIN=-11V Io=0mA - 2.2 5.0 mA
Load Regulation ΔVo Io VIN=-11V - 50 120 mV
Line Regulation ΔVo Vin VIN=-8 to -25V Io=0.5A - 12.5 120 mV
Ripple Rejection RR VIN=-11V Io=0.5A ein=2Vp-p f=120Hz 54 60 -dB
Output Noise Voltage VNO VIN=-11V Io=0.5A - 150 -μV
Average Temperature
Cofficient of Out
p
ut Volta
ge
ΔVo / ΔTVIN=-11V Io=5mA - -0.4 - mV/
ML7908A / ML7908FA
Output Voltage Vo VIN=-14V Io=0.5A -7.7 -8.0 -8.3 V
Quiescent Current IQVIN=-14V Io=0mA - 2.2 5.0 mA
Load Regulation ΔVo Io VIN=-14V - 60 160 mV
Line Regulation ΔVo Vin VIN=-10.5 to -25V Io=0.5A - 12.5 160 mV
Ripple Rejection RR VIN=-14V Io=0.5A ein=2Vp-p f=120Hz 54 60 -dB
Output Noise Voltage VNO VIN=-14V Io=0.5A - 200 -μV
Average Temperature
Cofficient of Out
p
ut Volta
ge
ΔVo / ΔTVIN=-14V Io=5mA - -0.7 - mV/
ML7909A / ML7909FA
Output Voltage Vo VIN=-15V Io=0.5A -8.65 -9.0 -9.35 V
Quiescent Current IQVIN=-15V Io=0mA - 2.2 5.0 mA
Load Regulation ΔVo Io VIN=-15V - 60 180 mV
Line Regulation ΔVo Vin VIN=-11.5 to -25V Io=0.5A - 8 180 mV
Ripple Rejection RR VIN=-15V Io=0.5A ein=2Vp-p f=120Hz 54 60 -dB
Output Noise Voltage VNO VIN=-15V Io=0.5A - 250 -μV
Average Temperature
Cofficient of Out
p
ut Volta
ge
ΔVo / ΔTVIN=-15V Io=5mA - -0.8 - mV/
ML7912A / ML7912FA
Output Voltage Vo VIN=-19V Io=0.5A -11.5 -12.0 -12.5 V
Quiescent Current IQVIN=-19V Io=0mA - 2.7 6.0 mA
Load Regulation ΔVo Io VIN=-19V - 60 240 mV
Line Regulation ΔVo Vin VIN=-14.5 to -30V Io=0.5A - 5 240 mV
Ripple Rejection RR VIN=-19V Io=0.5A ein=2Vp-p f=120Hz 54 60 -dB
Output Noise Voltage VNO VIN=-19V Io=0.5A - 300 -μV
Average Temperature
Cofficient of Out
p
ut Volta
ge
ΔVo / ΔTVIN=-19V Io=5mA - -0.8 - mV/
ELECTRICAL CHARACTERISTICS (Tj=25,C1=0.33μF,Co=0.1μF) Measurement is to be conducted
in pulse testing.
TEST CONDITIONS
Io=0.005A to 1.5A
BW=10Hz to 100KHz
Io=0.005A to 1.5A
BW=10Hz to 100KHz
Io=0.005A to 1.5A
BW=10Hz to 100KHz
Io=0.005A to 1.5A
BW=10Hz to 100KHz
Page 2 of 10
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
ML7915A / ML7915FA
Output Voltage Vo VIN=-23V Io=0.5A -14.4 -15.0 -15.6 V
Quiescent Current IQVIN=-23V Io=0mA - 2.7 6.0 mA
Load Regulation ΔVo Io VIN=-23V - 60 300 mV
Line Regulation ΔVo Vin VIN=-17.5 to -30V Io=0.5A - 5 300 mV
Ripple Rejection RR VIN=-23V Io=0.5A ein=2Vp-p f=120Hz 54 60 -dB
Output Noise Voltage VNO VIN=-23V Io=0.5A - 375 -μV
Average Temperature
Cofficient of Out
p
ut Volta
ge
ΔVo / ΔTVIN=-23V Io=5mA - -1 - mV/
ML7918A / ML7918FA
Output Voltage Vo VIN=-27V Io=0.5A -17.3 -18.0 -18.7 V
Quiescent Current IQVIN=-27V Io=0mA - 2.7 6.0 mA
Load Regulation ΔVo Io VIN=-27V - 60 360 mV
Line Regulation ΔVo Vin VIN=-21 to -33V Io=0.5A - 5 360 mV
Ripple Rejection RR VIN=-27V Io=0.5A ein=2Vp-p f=120Hz 54 60 -dB
Output Noise Voltage VNO VIN=-27V Io=0.5A - 450 -μV
Average Temperature
Cofficient of Out
p
ut Volta
ge
ΔVo / ΔTVIN=-27V Io=5mA - -1 - mV/
ML7924A / ML7924FA
Output Voltage Vo VIN=-33V Io=0.5A -23.0 -24.0 -25.0 V
Quiescent Current IQVIN=-33V Io=0mA - 2.7 6.0 mA
Load Regulation ΔVo Io VIN=-33V - 85 480 mV
Line Regulation ΔVo Vin VIN=-28 to -38V Io=0.5A - 5 480 mV
Ripple Rejection RR VIN=-33V Io=0.5A ein=2Vp-p f=120Hz 54 60 -dB
Output Noise Voltage VNO VIN=-33V Io=0.5A - 600 -μV
Average Temperature
Cofficient of Out
p
ut Volta
ge
ΔVo / ΔTVIN=-33V Io=5mA - -1 - mV/
ELECTRICAL CHARACTERISTICS (Tj=25,C1=0.33μF,Co=0.1μF) Measurement is to be conducted
in pulse testing.
TEST CONDITIONS
Io=0.005A to 1.5A
BW=10Hz to 100KHz
Io=0.005A to 1.5A
BW=10Hz to 100KHz
Io=0.005A to 1.5A
BW=10Hz to 100KHz
Page 3 of 10
Equivalent Circuit
Power Dissipation vs. Ambient Temperature
Test Circuit
1. 2.Output Voltage, Line Regulation, Load
Regulation, Quiescent Current,
Average Temperature Coefficient of
Output Voltage, Output Noise Voltage.
Ripple Rejection
25 50 75
0
5
10
15
20
Power Dissipation P
D
(W)
Ambient Temperature Ta ( C)
Wi th out Heat S ink
HS = 20 C/W
HS = 10 C/W
HS = 5 C/W
HS = 3 C/W
Heat Sink
HS = Heat S i nk T hermal R esistan ce
2 1
3
2
3
1
Page 4 of 10
Typical Characteristics
Page 5 of 10
Typical Characteristics
Page 6 of 10
1. Application Circuit
Positive/Negative Voltage Supply
Note :
2. Note in Application Circuit
( 1 )
( 2 )
* In case of negative voltage regulator, reverse the SBD and capacitor direction.
In the following explain only the positive regulator unless otherwise specified. However they can apply to the
negative voltage regulator by easy change.
In the above positive and negative
power supply application, D1 and D2
should be connected. If D1 and D2
are not connected, either of positive
or negative power supply circuit may
not turns on.
If the higher voltage (above the rated value) or lower voltage (GND-0.5V) is supplied to the input
terminals, the IC may be destroyed. To avoid such a case, a zener diode or other parts of the surge
supressor should be connected as shown below.
If the higher voltage than the input terminal is supplied to the output terminal, the IC may be
destroyed. To avoid input terminal short to the GND or the stored voltage in the capacitor back to the
output terminal, by the large value capacitor connecting to the output terminal application, the SBD
should be required as shown below;
COM
-Vin
+Vin
0.33uF
0.33uF
OUT
COM
IN
79 series
OUT
GND
IN
78 series
-Vo
+Vo
D2
D1
0.1uF
0.1uF
Vin Vo
IN
1
GND 2
OUT 3
Capacitor
+
Zener Di ode
R
VoVin
Capacitor
+
IN
1
GND 2
OUT 3
L
Diode
Vin Vo
Capacitor
+
IN
1
GND 2
OUT 3
DIODE
Page 7 of 10
3. Thermal Design
( 1 ) Heat Producting
(1-1) PLOSS-1 : heat producting by own operation
PLOSS-1 = Vin X IQ
(1-2) PLOSS-2 : heat producing by output current and the input-output differential voltage.
Internal power transistor produces the hest mentioned following equation.
PLOSS-2 = (Vin-Vout) x Iout (W)
Therefore, the total heat producing PLOSS is :
PLOSS = PLOSS-1 + PLOSS-2
= Vin X IQ + (Vin-Vout) X Iout (W)
( 2 ) Thermal Resistance
(2-1) Definition of Thermal Resistance : θ
Thermal resistance (θ ) is a degree of heat radiation mentioned following equation.
= (T1 - T2)/P ( /W) Heat Producing Quantity : P (W)
Ambient Temperature or case temperature :T2 ( )
Heat Source Temperature :T1 ( )
(2-2) Thermal resistance of TO-220
θjc :
θja : thermal resistance between IC chip (junction point) and ambience.
Input voltage (Vin) and quiescent current (IQ) produce the heat mentioned below equation.
There are two kinds of heat producting (PLOSS-1, PLOSS-2) in three terminal regulator and the sum of
them is total heat producting of IC (PLOSS).
There are two kinds of thermal resistance of TO-220. One is "θjc" for the application with the heat
sink, the other is "θja" for the application without the heat sink.
thermal resistance between IC chip (junction point) and the package back side
contacting with the heat sink.
Input
GND
IN OUT Output
Vin Vout
IQ
Iout
T1 T2
P(W)
Rp
T1 > T2
Page 8 of 10
( 3 ) Heat Radiation Balance
(3-1) TO-220 with heat sink
Where θjc :
θjs :
θCH :
θHS :
The relation between temperature and heat radiation quantity is shown below.
Tj=PLOSS X (θjc+θCH +θHS) + Ta ( )
The heat produced in the IC is radiated to ambience through the package and the heat
sink.
The quantity of the heat radiation depends on the heat source temperature, ambient
temperature and the thermal resistance of the package.
Heat radiation balance model of the TO-220 with heat sink is shown as below.
thermal resistance between IC chip (junction point) and the
package backside connecting to the heatsink.
thermal resistance between IC chip (junction point) and the
package surface.
thermal resistance between package backside and the heat sink
including the condidtion of insulator, silicon grease and
tighten torque.
thermal resistance of the heat sink
If the js is large enough compare with other thermal resistance, the js can be neglected and the
heat radiation model can be mentioned as below.
Tj Ta
LOSSP
Ambient
Temperature
Heat Source
(junction)
Temperature
JCθθCH θHS
θJS
Heat Sink
IC
Package
Face Side
Resin
Chip
Package
Back Side
θJS
θJC
θCH
θHS
Tj
LOSSPθJC θCH
Ta
θHS
Page 9 of 10
( 4 ) Thermal Design
The heat radiation balance model of the TO-220 with the heat sink is shown as follows.
Heat radiation balance
Tj = PLOSS X (θjc +θCH + θHS) + Ta ( ) (4-1)
PLOSS = Vin X IQ + (Vin-Vout) X Iout (W) (4-2)
Substituting "Eq.(4-2) into "Eq.(4-1)" obtains
Tj = [Vin X IQ +(Vin-Vout) X Iout] X (θjc +θCH +θHS)+Ta () (4-3)
In Eq.(4-3)
Vin, Iout, θCH, θHS, Ta depand on using condition.
Tj, IQ,Vout,θjc depend on IC depend on IC specification.
WhenθCH, IQ and Tj are assumed the following values,
Eq.(4-3) becomes Eq.(4-4).
θCH=0.3 to 0.4 (/W)
IQ = 5 to 6mA (max.)
Tj = 125 (max.)
Tj(max) = 125 = [5 X Vin + (Vin-Vout) X Iout] X (5+0.3+θHS) +Ta () (4-4)
When fix the Vout, Tj depends on the Vin, Iout, θHS and Ta.
It means;
For more detail, please refer the heat resistance value mentioned in the specification of the heat sink
supplier.
Insert the mica paper (0.1t) and thermal conduction silicon grease between
the IC and heat sink and tighten them with the bolt by 4Kg*cm-min.
Lower Vin and / or Iout are required to linit the temperature rise.
Smaller θHS is required for the effective heat reduce (i.e. using the large heat sink).
In the thermal design, when fix the Vin, Iout and Ta, selectthe heat sink which θHS is smaller that
the result of Eq.(4-4).
Page 10 of 10