FEATURES FUNCTIONAL BLOCK DIAGRAM RF output frequency range: 12.7 GHz to 15.4 GHz IF input frequency range: 2.8 GHz to 4 GHz LO input frequency range: 9 GHz to 12.6 GHz Matched 50 RF output, LO input, and IF input 20 dB of image rejection 32-terminal, 4.9 mm x 4.9 mm LCC package VGMIX VGRF VDRF 29 7 31 ADMV1009 IF1 14 IF2 11 APPLICATIONS Point to point microwave radios Radars and electronic warfare systems Instrumentation, automatic test equipment 19 26 27 LOIN VGLO VDLO 3 RFOUT 2 GND 10 GND 15 GND 18 GND 15770-001 Data Sheet 12.7 GHz to 15.4 GHz, GaAs, MMIC, Upper Sideband, Differential Upconverter ADMV1009 Figure 1. GENERAL DESCRIPTION The ADMV1009 is a compact, gallium arsenide (GaAs) design, monolithic microwave integrated circuit (MMIC), upper sideband (USB), differential, upconverter in a RoHS compliant package optimized for point to point microwave radio designs that operate in the 12.7 GHz to 15.4 GHz frequency range. The ADMV1009 provides 21 dB of conversion gain with 20 dB of sideband rejection. The ADMV1009 uses a radio frequency (RF) amplifier preceded by a passive, double balanced mixer, where a driver amplifier drives the local oscillator (LO). IF1 and IF2 mixer Rev. B inputs are provided, and an external 180 balun is needed to drive the IF pins differentially. The ADMV1009 is a much smaller alternative to hybrid style single sideband (SSB) upconverter assemblies and eliminates the need for wire bonding by allowing the use of surface-mount manufacturing assemblies. The ADMV1009 upconverter comes in a compact, thermally enhanced, 4.9 mm x 4.9 mm LCC package. The ADMV1009 operates over the -40C to +85C temperature range. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2017-2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADMV1009 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Leakage Performance ................................................................. 13 Applications ....................................................................................... 1 Return Loss Performance .......................................................... 14 Functional Block Diagram .............................................................. 1 Spurious Performance ............................................................... 15 General Description ......................................................................... 1 M x N Spurious Performance................................................... 17 Revision History ............................................................................... 2 Theory of Operation ...................................................................... 18 Specifications..................................................................................... 3 LO Driver Amplifier .................................................................. 18 Absolute Maximum Ratings............................................................ 4 Mixer ............................................................................................ 18 Thermal Resistance ...................................................................... 4 RF Amplifier ............................................................................... 18 ESD Caution .................................................................................. 4 Applications Information .............................................................. 19 Pin Configuration and Function Descriptions ............................. 5 Typical Application Circuit ....................................................... 19 Typical Performance Characteristics ............................................. 6 Evaluation Board Information ................................................. 20 IF Frequency = 2.8 GHz .............................................................. 6 Bill of Materials ........................................................................... 22 IF Frequency = 3.4 GHz .............................................................. 8 Outline Dimensions ....................................................................... 23 IF Frequency = 4 GHz ............................................................... 10 Ordering Guide .......................................................................... 23 IF Bandwidth .............................................................................. 12 REVISION HISTORY 4/2018--Rev. A to Rev. B Changes to Thermal Resistance Section and Table 3................... 4 1/2018--Rev. 0 to Rev. A Change to Product Title................................................................... 1 Changes to General Description and Figure 1 ............................. 1 Changes to Table 1 ............................................................................ 3 Changes to Table 2 ............................................................................ 4 Added Thermal Resistance Section and Table 3; Renumbered Sequentially ....................................................................................... 4 Changes to Figure 2 and Table 4 ..................................................... 5 Changes to Figure 4, Figure 7, Figure 4 Caption, and Figure 7 Caption ............................................................................................... 6 Changes to Figure 14, Figure 17, Figure 14 Caption, and Figure 17 Caption ............................................................................................... 8 Changes to Figure 24, Figure 27, Figure 24 Caption, and Figure 27 Caption ............................................................................................ 10 Changes to Figure 35 and Figure 36............................................. 12 Changes to Figure 37 through Figure 40 ..................................... 13 Changes to Figure 47 through Figure 52 ..................................... 15 Changes to Figure 53 through Figure 58 ..................................... 16 Changes to Table 5 and M x N Spurious Performance Section .... 17 Change to Theory of Operation Section ..................................... 18 Changes to Figure 59...................................................................... 19 Changes to Power On Sequence Section and Power Off Sequence Section ............................................................................ 20 Change to Table 6 ........................................................................... 22 Changes to Ordering Guide .......................................................... 23 10/2017--Revision 0: Initial Version Rev. B | Page 2 of 23 Data Sheet ADMV1009 SPECIFICATIONS VDRF = 5 V, VDLO = 5 V, IDLO = 60 mA, IDRF = 250 mA, LO = -4 dBm LO +4 dBm, -40C TA +85C; data taken with Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted. Table 1. Parameter RF OUTPUT FREQUENCY RANGE INPUT FREQUENCY RANGE Local Oscillator Intermediate Frequency LO AMPLITUDE IF INPUT POWER PERFORMANCE Conversion Gain Noise Figure Output Third-Order Intercept Output 1 dB Compression Point Sideband Rejection Leakage LO to RF LO to IF RF Output 2x LO - 2x IF Spur 4x IF Spur Return Loss RF Output LO Input IF Input POWER INTERFACE Amplifier Voltage RF LO Gate Voltage RF LO Mixer Voltage Amplifier Current RF LO Gate Current RF LO Total Power Symbol Test Conditions/Comments LO IF Min 12.7 9 2.8 -4 -25 Typ Max 15.4 Unit GHz 12.6 4 +4 0 GHz GHz dBm dBm 21 14 35 25 60 25 16.5 dB dB dBm dBm dBc -30 -25 -10 -20 dBm dBm 0 With balun 15 NF IP3 P1dB At output power (POUT) = 8 dBm 31 23 20 IF = 0 dBm 45 70 12 12 11 -4 dBm LO +4 dBm VDRF VDLO dBc dBc 10 10 10 5 5 VGRF VGLO VGMIX IDRF IDLO 52 75 -1.5 -1.5 V V -0.5 -0.5 V V V 300 mA mA -1.1 Adjust VGRF between -1.5 V and -0.5 V to achieve IDRF Adjust VGLO between -1.5 V and -0.5 V to achieve IDLO IGRF IGLO 250 60 <3 <1 1.55 Rev. B | Page 3 of 23 dB dB dB mA mA W ADMV1009 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Supply Voltage VDRF VDLO VGLO VGRF VGMIX Maximum Junction Temperature Lifetime at Maximum Junction Temperature Maximum Power Dissipation Operating Temperature Range Storage Temperature Range Moisture Sensitivity Level (MSL) Rating Input Power LO IF Lead Temperature Range (Soldering 60 sec) Electrostatic Discharge (ESD) Sensitivity Human Body Model (HBM) Field Induced Charged Device Model (FICDM) Rating 6V 6V -2 V to 0 V -2 V to 0 V -2 V to 0 V 175C >1 million hours 2.9 W -40C to +85C -65C to +150C MSL3 Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. JA is thermal resistance, junction to ambient (C/W), and JC is thermal resistance, junction to case (C/W). Table 3. Package Type E-32-1 1 JA1 33.4 JC1 31 Unit C/W See JEDEC standard JESD51-2 for additional information on optimal thermal impedance (printed circuit board (PCB) within 3 x 3 vias) ESD CAUTION 15 dBm 15 dBm 260C 750 V 750 V Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. B | Page 4 of 23 Data Sheet ADMV1009 NIC VDRF NIC VGMX NIC VDLO VGLO NIC PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 ADMV1009 TOP VIEW (Not to Scale) 24 23 22 21 20 19 18 17 NIC NIC NIC NIC NIC LOIN GND NIC NOTES 1. NIC = NOT INTERNALLY CONNECTED. IT IS RECOMMENDED TO GROUND THESE PINS ON THE PCB. 2. EXPOSED PAD. EXPOSED PAD MUST BE CONNECTED TO GND. GOOD RF AND THERMAL GROUNDING IS RECOMMENDED. 15770-002 NIC GND IF2 NIC NIC IF1 GND NIC 9 10 11 12 13 14 15 16 NIC GND RFOUT NIC NIC NIC VGRF NIC 32 31 30 29 28 27 26 25 PIN1 INDICATOR Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1, 4 to 6, 8, 9, 12, 13, 16, 17, 20 to 25, 28, 30, 32 2, 10, 15, 18 3 7 Mnemonic NIC Description Not Internally Connected. It is recommended to ground these pins on the PCB. GND RFOUT VGRF 11, 14 IF2, IF1 19 26 LOIN VGLO 27 VDLO 29 VGMIX 31 VDRF Ground. These pins are grounded internally and must also be grounded on the PCB. RF Output. This pin is ac-coupled internally and matched to 50 , single-ended. Power Supply Voltage for the Gate of the RF Amplifier. Refer to the Applications Information section for the required external components and biasing. Differential IF Inputs. These pins are matched to 50 and are ac-coupled. No external dc block is required. Local Oscillator Input. This pin is ac-coupled and matched to 50 . Power Supply Voltage for the Gate of the LO Amplifier. Refer to the Applications Information section for the required external components and biasing. Power Supply Voltage for the LO Amplifier. Refer to the Applications Information section for the required external components and biasing. Power Supply Voltage for the Mixer. This pin is a high impedance port. Refer to the Applications Information section for the required external components and biasing. Power Supply Voltage for the RF Amplifier. Refer to the Applications Information section for the required external components and biasing. Exposed pad. The exposed pad must be connected to GND. Good RF and thermal grounding is recommended. EPAD Rev. B | Page 5 of 23 ADMV1009 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS IF FREQUENCY = 2.8 GHz 25 20 20 CONVERSION GAIN (dB) 25 10 12.5 13.0 5 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 0 12.0 70 70 SIDEBAND REJECTION (dBc) SIDEBAND REJECTION (dBc) 80 60 50 40 30 TA = +85C TA = +25C TA = -40C 13.5 14.0 14.5 15.0 15.5 16.0 20 16.0 +4dBm 0dBm -4dBm 45 45 40 35 35 OUTPUT IP3 (dBm) 40 25 20 TA = +85C TA = +25C TA = -40C 13.0 13.5 14.0 14.5 15.0 15.5 16.0 Figure 7. Sideband Rejection vs. RF Frequency at Various LO Powers 50 30 12.5 RF FREQUENCY (GHz) 30 25 20 15 10 5 +4dBm 0dBm -4dBm 5 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 0 12.0 15770-005 OUTPUT IP3 (dBm) 15.5 30 50 0 12.0 15.0 40 0 12.0 Figure 4. Sideband Rejection vs. RF Frequency at Various Temperatures 10 14.5 10 RF FREQUENCY (GHz) 15 14.0 50 15770-004 13.0 13.5 60 10 12.5 13.0 Figure 6. Conversion Gain vs. RF Frequency at Various LO Powers 80 0 12.0 12.5 RF FREQUENCY (GHz) Figure 3. Conversion Gain vs. RF Frequency at Various Temperatures 20 +4dBm 0dBm -4dBm 15770-007 0 12.0 TA = +85C TA = +25C TA = -40C 10 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) Figure 5. Output IP3 vs. RF Frequency at Various Temperatures Figure 8. Output IP3 vs. RF Frequency at Various LO Powers Rev. B | Page 6 of 23 15770-008 5 15 15770-006 15 15770-003 CONVERSION GAIN (dB) VDRF = 5 V, VDLO = 5 V, IDLO = 60 mA, IDRF = 250 mA, LO = -4 dBm LO +4 dBm, -40C TA +85C, data taken with Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted. ADMV1009 30 30 28 28 26 26 OUTPUT P1dB (dBm) 24 22 TA = +85C TA = +25C TA = -40C 18 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 16 12.0 17 17 16 16 15 15 NOISE FIGURE (dB) 18 14 13 12 10 TA = +85C TA = +25C TA = -40C 13.0 13.5 14.0 14.5 15.0 15.5 16.0 14 13 12 11 10 9 +4dBm 0dBm -4dBm 9 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 8 12.0 15770-010 8 12.0 12.5 Figure 11. Output P1dB vs. RF Frequency at Various LO Powers 18 11 +4dBm 0dBm -4dBm RF FREQUENCY (GHz) Figure 9. Output P1dB vs. RF Frequency at Various Temperatures NOISE FIGURE (dB) 20 18 15770-009 16 12.0 22 15770-011 20 24 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) Figure 10. Noise Figure vs. RF Frequency at Various Temperatures Figure 12. Noise Figure vs. RF Frequency at Various LO Powers Rev. B | Page 7 of 23 15770-012 OUTPUT P1dB (dBm) Data Sheet ADMV1009 Data Sheet IF FREQUENCY = 3.4 GHz 25 20 20 CONVERSION GAIN (dB) 25 10 12.5 13.0 5 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 0 12.0 80 80 SIDEBAND REJECTION (dBc) SIDEBAND REJECTION (dBc) 90 50 40 30 20 TA = +85C TA = +25C TA = -40C 13.0 13.5 14.0 14.5 15.0 15.5 16.0 15.0 15.5 16.0 70 50 40 30 20 +4dBm 0dBm -4dBm 50 50 45 40 35 35 OUTPUT IP3 (dBm) 40 30 25 20 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 Figure 17. Sideband Rejection vs. RF Frequency at Various LO Powers 45 TA = +85C TA = +25C TA = -40C 30 25 20 15 10 5 0 12.0 14.5 RF FREQUENCY (GHz) +4dBm 0dBm -4dBm 5 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 0 12.0 15770-015 OUTPUT IP3 (dBm) Figure 14. Sideband Rejection vs. RF Frequency at Various Temperatures 15 14.0 60 0 12.0 15770-014 12.5 RF FREQUENCY (GHz) 10 13.5 10 10 0 12.0 13.0 Figure 16. Conversion Gain vs. RF Frequency at Various LO Powers 90 70 12.5 RF FREQUENCY (GHz) Figure 13. Conversion Gain vs. RF Frequency at Various Temperatures 60 +4dBm 0dBm -4dBm 15770-017 0 12.0 TA = +85C TA = +25C TA = -40C 10 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) Figure 15. Output IP3 vs. RF Frequency at Various Temperatures Figure 18. Output IP3 vs. RF Frequency at Various LO Powers Rev. B | Page 8 of 23 15770-018 5 15 15770-016 15 15770-013 CONVERSION GAIN (dB) VDRF = 5 V, VDLO = 5 V, IDLO = 60 mA, IDRF = 250 mA, LO = -4 dBm LO +4 dBm, -40C TA +85C, data taken with Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted. ADMV1009 30 30 28 28 26 26 OUTPUT P1dB (dBm) 24 22 TA = +85C TA = +25C TA = -40C 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16 12.0 15770-019 12.5 RF FREQUENCY (GHz) 17 17 16 16 15 15 NOISE FIGURE (dB) 18 14 13 12 10 TA = +85C TA = +25C TA = -40C 13.0 13.5 14.0 14.5 15.0 15.5 16.0 14 13 12 11 +4dBm 0dBm -4dBm 10 9 9 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 8 12.0 15770-020 8 12.0 12.5 Figure 21. Output P1dB vs. RF Frequency at Various LO Powers 18 11 +4dBm 0dBm -4dBm RF FREQUENCY (GHz) Figure 19. Output P1dB vs. RF Frequency at Various Temperatures NOISE FIGURE (dB) 20 18 18 16 12.0 22 15770-021 20 24 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) Figure 20. Noise Figure vs. RF Frequency at Various Temperatures Figure 22. Noise Figure vs. RF Frequency at Various LO Powers Rev. B | Page 9 of 23 15770-022 OUTPUT P1dB (dBm) Data Sheet ADMV1009 Data Sheet IF FREQUENCY = 4 GHz 25 20 20 CONVERSION GAIN (dB) 25 10 12.5 13.0 5 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 0 12.0 90 80 80 SIDEBAND REJECTION (dBc) SIDEBAND REJECTION (dBc) 100 90 70 60 50 40 TA = +85C TA = +25C TA = -40C 13.0 13.5 14.0 14.5 15.0 15.5 16.0 15.5 16.0 60 40 30 +4dBm 0dBm -4dBm 20 50 50 45 40 35 35 OUTPUT IP3 (dBm) 40 30 25 20 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 Figure 27. Sideband Rejection vs. RF Frequency at Various LO Powers TA = +85C TA = +25C TA = -40C 30 25 20 15 +4dBm 0dBm -4dBm 10 5 5 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 0 12.0 15770-025 OUTPUT IP3 (dBm) 15.0 50 45 0 12.0 14.5 RF FREQUENCY (GHz) Figure 24. Sideband Rejection vs. RF Frequency at Various Temperatures 15 14.0 70 0 12.0 15770-024 12.5 RF FREQUENCY (GHz) 10 13.5 10 10 0 12.0 13.0 Figure 26. Conversion Gain vs. RF Frequency at Various LO Powers 100 30 12.5 RF FREQUENCY (GHz) Figure 23. Conversion Gain vs. RF Frequency at Various Temperatures 20 +4dBm 0dBm -4dBm 15770-027 0 12.0 TA = +85C TA = +25C TA = -40C 10 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) Figure 28. Output IP3 vs. RF Frequency at Various LO Powers Figure 25. Output IP3 vs. RF Frequency at Various Temperatures Rev. B | Page 10 of 23 15770-028 5 15 15770-026 15 15770-023 CONVERSION GAIN (dB) VDRF = 5 V, VDLO = 5 V, IDLO = 60 mA, IDRF = 250 mA, LO = -4 dBm LO +4 dBm, -40C TA +85C, data taken with Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted. ADMV1009 30 30 28 28 26 26 OUTPUT P1dB (dBm) 24 22 TA = +85C TA = +25C TA = -40C 18 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 16 12.0 17 16 16 15 15 NOISE FIGURE (dB) 17 14 13 12 TA = +85C TA = +25C TA = -40C 13.5 14.0 14.5 15.0 15.5 16.0 14 13 12 11 +4dBm 0dBm -4dBm 10 9 9 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) 8 12.0 15770-030 NOISE FIGURE (dB) 18 8 12.0 13.0 Figure 31. Output P1dB vs. RF Frequency at Various LO Powers 18 10 12.5 RF FREQUENCY (GHz) Figure 29. Output P1dB vs. RF Frequency at Various Temperatures 11 +4dBm 0dBm -4dBm 20 18 15770-029 16 12.0 22 15770-031 20 24 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) Figure 32. Noise Figure vs. RF Frequency at Various LO Powers Figure 30. Noise Figure vs. RF Frequency at Various Temperatures Rev. B | Page 11 of 23 15770-032 OUTPUT P1dB (dBm) Data Sheet ADMV1009 Data Sheet IF BANDWIDTH 25 20 20 CONVERSION GAIN (dB) 25 10 TA = +85C TA = +25C TA = -40C 5 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 0 2.0 45 45 40 40 35 35 OUTPUT IP3 (dBm) 50 25 20 TA = +85C TA = +25C TA = -40C 10 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 30 25 20 15 +4dBm 0dBm -4dBm 10 5 5 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 IF FREQUENCY (GHz) 0 2.0 15770-034 0 2.0 2.4 Figure 35. Conversion Gain vs. IF Frequency at Various LO Powers 50 30 2.2 IF FREQUENCY (GHz) Figure 33. Conversion Gain vs. IF Frequency at Various Temperatures 15 +4dBm 0dBm -4dBm 5 IF FREQUENCY (GHz) OUTPUT IP3 (dBm) 10 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 IF FREQUENCY (GHz) Figure 34. Output IP3 vs. IF Frequency at Various Temperatures Figure 36. Output IP3 vs. IF Frequency at Various LO Powers Rev. B | Page 12 of 23 15770-036 0 2.0 15 15770-035 15 15770-033 CONVERSION GAIN (dB) VDRF = 5 V, VDLO = 5 V, IDLO = 60 mA, IDRF = 250 mA, LO = -4 dBm LO +4 dBm at 10.2 GHz, -40C TA +85C, data taken with Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted. Data Sheet ADMV1009 LEAKAGE PERFORMANCE VDRF = 5 V, VDLO = 5 V, IDLO = 60 mA, IDRF = 250 mA, LO = -4 dBm LO +4 dBm, -40C TA +85C, data taken with Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted. -20 -30 -40 -50 9000 10000 11000 12000 13000 14000 LO FREQUENCY (MHz) Figure 37. LO Leakage at RFOUT vs. LO Frequency at Various Temperatures -40 -50 9000 10000 11000 12000 13000 14000 Figure 39. LO Leakage at RFOUT vs. LO Frequency at Various LO Powers 0 LO LEAKAGE AT IF INPUT (dBm) TA = +85C TA = +25C TA = -40C -30 -40 -50 -10 +4dBm 0dBm -4dBm -20 -30 -40 -50 -60 -60 -70 8000 -30 LO FREQUENCY (MHz) 9000 10000 11000 12000 13000 14000 LO FREQUENCY (MHz) Figure 38. LO Leakage at IF Input vs. LO Frequency at Various Temperatures -70 8000 15770-038 LO LEAKAGE AT IF INPUT (dBm) -20 -20 -60 8000 0 -10 +4dBm 0dBm -4dBm 9000 10000 11000 12000 LO FREQUENCY (MHz) 13000 14000 15770-040 -60 8000 -10 15770-039 TA = +85C TA = +25C TA = -40C LO LEAKAGE AT RF OUTPUT (dBm) -10 0 15770-037 LO LEAKAGE AT RF OUTPUT (dBm) 0 Figure 40. LO Leakage at IF Input vs. LO Frequency at Various LO Powers Rev. B | Page 13 of 23 ADMV1009 Data Sheet RETURN LOSS PERFORMANCE VDRF = 5 V, VDLO = 5 V, IDLO = 60 mA, IDRF = 250 mA, LO = -4 dBm LO +4 dBm, -40C TA +85C, data taken with Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted. Measurement includes trace loss and RF connector loss. 0 0 TA = +85C TA = +25C TA = -40C -10 -15 -20 -25 -30 -35 -40 -15 -20 -25 -30 -35 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RF FREQUENCY (GHz) -45 12.0 14.0 14.5 15.0 15.5 16.0 Figure 44. RF Output Return Loss vs. RF Frequency at Various LO Powers 0 -5 -10 -10 LO INPUT RETURN LOSS (dB) 0 -5 -15 -20 -25 -30 TA = +85C TA = +25C TA = -40C -40 13.5 RF FREQUENCY (GHz) Figure 41. RF Output Return Loss vs. RF Frequency at Various Temperatures -35 13.0 12.5 15770-044 12.5 15770-041 -50 12.0 -15 -20 -25 -30 -35 +4dBm 0dBm -4dBm -40 8 9 10 11 12 13 14 LO FREQUENCY (GHz) -50 15770-042 -50 8 -5 -5 IF INPUT RETURN LOSS (dB) 0 -10 -15 TA = +85C TA = +25C TA = -40C 2.0 2.5 3.0 3.5 4.0 IF FREQUENCY (GHz) 4.5 5.0 5.5 6.0 12 13 14 -10 -15 +4dBm 0dBm -4dBm -20 -25 1.0 15770-043 1.5 11 Figure 45. LO Input Return Loss vs. LO Frequency at Various LO Powers 0 -25 1.0 10 LO FREQUENCY (GHz) Figure 42. LO Input Return Loss vs. LO Frequency at Various Temperatures -20 9 1.5 2.0 2.5 3.0 3.5 4.0 IF FREQUENCY (GHz) Figure 43. IF Input Return Loss vs. IF Frequency at Various Temperatures 15770-045 -45 -45 4.5 5.0 5.5 6.0 15770-046 LO INPUT RETURN LOSS (dB) -10 -40 -45 IF INPUT RETURN LOSS (dB) +4dBm 0dBm -4dBm -5 RF OUTPUT RETURN LOSS (dB) RF OUTPUT RETURN LOSS (dB) -5 Figure 46. IF Input Return Loss vs. IF Frequency at Various LO Powers Rev. B | Page 14 of 23 Data Sheet ADMV1009 SPURIOUS PERFORMANCE 90 80 80 13500 Figure 50. 2x LO - 2x IF Leakage vs. RF Frequency at Various Temperatures, IF = 3.1 GHz, 0 dBm 90 90 -40C +25C +85C 80 2x LO - 2x IF SPUR (dBc) 30 20 20 10 10 13500 RF FREQUENCY (GHz) Figure 51. 2x LO - 2x IF Leakage vs RF Frequency at Various Temperatures, IF = 3.3 GHz, 0 dBm 90 80 80 70 70 30 13500 13450 13050 13000 13500 RF FREQUENCY (GHz) 15770-049 13450 13400 13350 13300 13250 13200 0 13150 0 13100 10 13050 10 13000 TA = +85C TA = +25C TA = -40C 20 13400 TA = +85C TA = +25C TA = -40C 13350 30 40 13300 40 50 13250 50 60 13200 60 13150 2x LO - 2x IF SPUR (dBc) 90 13100 Figure 48. 2x LO - 2x IF Leakage vs. RF Frequency at Various Temperatures, IF = 3.3 GHz, -10 dBm 20 15770-051 RF FREQUENCY (MHz) 0 RF FREQUENCY (GHz) Figure 52. 2x LO - 2x IF Leakage vs RF Frequency at Various Temperatures, IF = 3.5 GHz, 0 dBm Figure 49. 2x LO - 2x IF Leakage vs. RF Frequency at Various Temperatures, IF = 3.5 GHz, -10 dBm Rev. B | Page 15 of 23 15770-052 13500 13450 13400 13400 13300 13350 13200 13000 13100 15770-048 0 13000 TA = +85C TA = +25C TA = -40C 13300 30 40 13250 40 50 13200 50 60 13150 60 70 13100 70 13050 80 2x LO - 2x IF SPUR (dBc) 15770-050 RF FREQUENCY (GHz) Figure 47. 2x LO - 2x IF Leakage vs. RF Frequency at Various Temperatures, IF = 3.1 GHz, -10 dBm 2x LO - 2x IF LEAKAGE (dBc) 13450 13000 13500 15770-047 13450 13400 13350 13300 13100 13250 0 13200 0 13050 10 13000 10 RF FREQUENCY (GHz) TA = +85C TA = +25C TA = -40C 20 13400 20 30 13350 TA = +85C TA = +25C TA = -40C 13300 30 40 13250 40 50 13200 50 60 13150 60 70 13100 70 13050 2x LO - 2x IF LEAKAGE (dBm) 90 13150 2x LO - 2x IF SPUR (dBc) VDRF = 5 V, VDLO = 5 V, IDLO = 60 mA, IDRF = 250 mA, LO = 0 dBm, -40C TA +85C, data taken with Mini-Circuits NCS1-422+, RF transformer as upper sideband, unless otherwise noted. Data Sheet 120 120 100 100 80 80 4x IF SPUR (dBc) 60 40 TA = +85C TA = +25C TA = -40C 20 TA = +85C TA = +25C TA = -40C 100 100 80 80 4x IF SPUR (dBc) 120 40 TA = +85C TA = +25C TA = -40C 20 13500 15770-056 13450 13400 13350 13300 13250 13200 13150 13100 RF FREQUENCY (GHz) Figure 56. 4x IF Leakage vs. RF Frequency at Various Temperatures, IF = 3.1 GHz, 0 dBm 120 60 13050 13000 13500 RF FREQUENCY (GHz) 15770-053 13450 13400 13350 13300 13250 13200 13150 13100 13050 13000 0 Figure 53. 4x IF Leakage vs. RF Frequency at Various Temperatures, IF = 3.1 GHz, -10 dBm 60 40 TA = +85C TA = +25C TA = -40C 20 Figure 54. 4x IF Leakage vs. RF Frequency at Various Temperatures, IF = 3.3 GHz, -10 dBm 100 80 80 4x IF SPUR (dBc) 100 TA = +85C TA = +25C TA = -40C 20 13500 15770-057 13450 13400 13350 13300 13250 Figure 57. 4x IF Leakage vs. RF Frequency at Various Temperatures, IF = 3.3 GHz, 0 dBm 120 40 13200 RF FREQUENCY (GHz) 120 60 13150 13000 13500 15770-054 13450 13400 13350 13300 13250 13200 13150 13100 13050 13000 RF FREQUENCY (GHz) 13100 0 0 13050 60 40 TA = +85C TA = +25C TA = -40C 20 Figure 55. 4x IF Leakage vs. RF Frequency at Various Temperatures, IF = 3.5 GHz, -10 dBm 13500 13450 13400 15770-058 RF FREQUENCY (GHz) 13350 13300 13250 13200 13150 13000 13500 13450 13400 15770-055 RF FREQUENCY (GHz) 13350 13300 13250 13200 13150 13100 13050 0 13000 0 13100 4x IF SPUR (dBc) 40 20 0 4x IF SPUR (dBc) 60 13050 4x IF SPUR (dBc) ADMV1009 Figure 58. 4x IF Leakage vs. RF Frequency at Various Temperatures, IF = 3.5 GHz, 0 dBm Rev. B | Page 16 of 23 Data Sheet ADMV1009 Table 5. LO Harmonic Leakage at RFOUT LO Frequency (MHz)1 9000 9500 10000 10500 11000 11500 12000 12600 1 1.0 -51 -48 -40 -33 -33 -30 -35 -39 2.0 -14 -5 -15 -28 -44 -44 -44 -40 Harmonics 3.0 -50 -55 -51 -67 -74 -63 -73 -63 4.0 -72 -67 -63 -62 -75 -77 -76 -75 All values are in dBm. LO Input Power = 0 dBm. M x N SPURIOUS PERFORMANCE LO = 0 dBm, Upper Sideband IF = 3100 MHz at 0 dBm and RF = 13300 MHz. All values in dBc below RF power level. N/A means not applicable. 0 N/A N/A N/A N/A N/A 77 65 50 77 -4 -3 -2 -1 0 1 2 3 4 M x IF N x LO 2 83 66 52 27 38 68 31 77 83 1 98 99 60 61 53 0 43 67 58 3 83 75 77 80 68 70 86 64 96 4 105 104 89 97 85 75 86 78 N/A IF = 3300 MHz at 0 dBm and RF = 13300 MHz. All values in dBc below RF power level. N/A means not applicable. N x LO M x IF -4 -3 -2 -1 0 1 2 3 4 0 N/A N/A N/A N/A N/A 74 64 57 78 1 92 100 67 57 58 0 43 63 67 2 92 85 58 29 32 73 32 79 80 3 78 67 76 76 60 60 86 67 96 4 100 101 95 99 80 79 82 91 N/A IF = 3500 MHz at 0 dBm and RF = 13300 MHz. All values in dBc below RF power level. N/A means not applicable. N x LO M x IF -4 -3 -2 -1 0 1 2 3 4 0 N/A N/A N/A N/A N/A 71 59 57 78 1 92 100 67 50 64 0 43 63 67 2 92 85 50 28 27 73 32 79 80 Rev. B | Page 17 of 23 3 78 67 76 72 58 60 86 67 96 4 100 101 95 97 74 79 82 91 N/A ADMV1009 Data Sheet THEORY OF OPERATION The ADMV1009 is a GaAs, MMIC, SSB, upper side band upconverter in a RoHS compliant package optimized for upper sideband point to point microwave radio applications operating in the 12.7 GHz to 15.4 GHz output frequency range. The ADMV1009 supports LO input frequencies of 9 GHz to 12.6 GHz and IF frequencies of 2.8 GHz to 4 GHz. MIXER The ADMV1009 uses a RF amplifier preceded by a passive, double balanced mixer, where a driver amplifier drives the LO (see Figure 59). The combination of design, process, and packaging technology allows the functions of these subsystems to be integrated into a single die, using mature packaging and interconnection technologies to provide a high performance, low cost design with excellent electrical, mechanical, and thermal properties. In addition, the need for external components is minimized, optimizing cost and size. RF AMPLIFIER LO DRIVER AMPLIFIER The LO driver amplifier takes a single LO input and amplifies it to the desired LO signal level for the mixer to operate optimally. The LO driver amplifier requires a single dc bias voltage (VDLO) and a single dc gate bias (VGLO) to operate. Starting at -2 V at the gate supply (VGLO), the LO amplifier is biased at +5 V (VDLO). Then, the gate bias (VGLO) is varied until the desired LO amplifier bias current (IDLO) is achieved. The desired LO amplifier bias current is 60 mA under the LO input drive of -4 dBm to +4 dBm. The LO drive range of -4 dBm to +4 dBm makes it compatible with Analog Devices, Inc., wideband synthesizer portfolio without the requirement for an external LO driver amplifier. The mixer has two differential inputs, IF1 and IF2, and an external 180 balun is required to drive the IF ports differentially. The ADMV1009 is optimized to work with the Mini-Circuit NCS1-422+ RF balun. The mixer must be biased at -1.1 V (VGMIX) to operate. The RF amplifier requires a single dc bias voltage (VDRF) and a single dc gate bias (VGRF) to operate. Starting at -2 V at the gate supply (VGRF), the RF amplifier is biased at +5 V (VDRF). Then, the gate bias (VGRF) is varied until the desired RF amplifier bias current (IDRF) is achieved. The desired RF amplifier bias current is 250 mA under small signal conditions. The ADMV1009 has an internal band-pass filter between the mixer and the RF driver amplifier that reduces LO leakage and filters out the lower sideband at the RF output. The balanced input drive allows exceptional linearity performance compared to similar single-ended solutions. The typical application circuit (see Figure 59) shows the necessary external components on the bias lines to eliminate any undesired stability problems for the RF amplifier and the LO amplifier. The ADMV1009 upconverter comes in a compact, thermally enhanced, 4.9 mm x 4.9 mm, 32-terminal ceramic leadless chip carrier (LCC) package. The ADMV1009 operates over the -40C to +85C temperature range. Rev. B | Page 18 of 23 Data Sheet ADMV1009 APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT The typical applications circuit is shown in Figure 59. The application circuit shown has been replicated for the evaluation board circuit. VDRF C1 100pF C2 10nF C3 1F VGX C5 1F RFOUT SMA TP5 C14 1F C13 10nF C12 100pF C6 470pF 24 23 22 21 20 19 18 17 C7 10nF C8 1F VGLO LOIN J2 C9 100pF C10 10nF TP2 C11 1F TP3 5016 TP4 5016 SMA 9 10 11 12 13 14 15 16 5016 VGRF NIC NIC NIC GND NIC RFOUT U1 NIC NIC ADMV1009AEZ NIC NIC LOIN NIC GND VGRF NIC NIC 5016 5016 VDLO NIC GND IF2 NIC NIC IF1 GND NIC J1 1 2 3 4 5 6 7 8 NIC VDRF NIC VGMX NIC VDLO VGLO NIC 32 31 30 29 28 27 26 25 C4 100pF TP1 TP6 L1 L2 56nH 56nH C15 10pF C16 10pF 3300MHz TO 4000MHz 4 SEC_DOT SEC_BAL 3 5 GND PRI_GND 2 NC 6 NC PRI_DOT 1 NCS1-422+ U2 SMA J3 IFIN SMA Figure 59. Typical Application Circuit Rev. B | Page 19 of 23 15770-059 5016 ADMV1009 Data Sheet EVALUATION BOARD INFORMATION Power-On Sequence The circuit board used in the application must use RF circuit design techniques. Signal lines must have 50 impedance, and the package ground leads and exposed pad must be connected directly to the ground plane, similar to what is shown in Figure 60 and Figure 61. Use a sufficient number of via holes to connect the top and bottom ground planes. The evaluation circuit board shown in Figure 59 is available from Analog Devices, Inc., upon request. To set up the ADMV1009-EVALZ, take the following steps: Layout Solder the exposed pad on the underside of the ADMV1009 to a low thermal and electrical impedance ground plane. This pad is typically soldered to an exposed opening in the solder mask on the evaluation board. Connect these ground vias to all other ground layers on the evaluation board to maximize heat dissipation from the device package. Figure 60 shows the PCB land pattern footprint for the ADMV1009-EVALZ, and Figure 61 shows the solder paste stencil for the ADMV1009-EVALZ evaluation board. 1. 2. 3. 4. 5. 6. 7. 8. 9. Power up the VGLO with a -1.5 V supply. Power up the VDLO with a 5 V supply. Adjust VGLO from -1.5 V to -0.5 V such that IDLO = 60 mA. Power up VGRF with a -1.5 V supply. Power up VDRF with a 5 V supply. Adjust VGRF from -1.5 V to -0.5 V such that IDLO = 250 mA Power up VGMIX with a -1.5 V supply. Apply an LO signal. Apply an IF signal. Power Off Sequence To turn off the ADMV1009-EVALZ, take the following steps: 1. 2. 3. 4. Turn off the LO and IF signals. Set VGRF and VGLO to -1.5 V. Set the VDRF and VDLO supplies to 0 V and then turn off the VDRF and VDLO supplies. Turn off the VGRF and VGLO supplies. 0.217" SQUARE SOLDER MASK 0.004" MASK/METAL OVERLAP 0.010" MINIMUM MASK WIDTH GROUND PAD PAD SIZE 0.026" x 0.010" PIN 1 0.197" [0.50] 0.156" MASK OPENING o.034" TYPICAL VIA SPACING o.010" TYPICAL VIA 0.138" SQUARE MASK OPENING 0.02 x 45 CHAMFER FOR PIN 1 0.146" SQUARE GROUND PAD Figure 60. PCB Land Pattern Footprint of the ADMV1009-EVALZ Rev. B | Page 20 of 23 15770-104 0.010" REF 0.030" MASK OPENING Data Sheet ADMV1009 0.017 0.0197 TYP 0.219 SQUARE 0.132 SQUARE 0.017 R0.0040 TYP 132 PLCS 0.010 TYP 15770-105 0.027 TYP 15770-062 Figure 61. Solder Paste Stencil of the ADMV1009-EVALZ Figure 62. ADMV1009-EVALZ Evaluation Board Top Layer Rev. B | Page 21 of 23 ADMV1009 Data Sheet BILL OF MATERIALS Table 6. Qty. 1 1 4 4 5 1 2 2 1 2 6 1 1 Reference Designator Not applicable U1 C1, C4, C9, C12 C2, C7, C10, C13 C3, C5, C8, C11, C14 C6 C15, C16 J1, J2 J3 L1, L2 TP1 to TP6 U2 Heatsink Description PCB ADMV1009AEZ 100 pF ceramic capacitors, 5%, 50 V, C0G, 0402 10 nF ceramic capacitors, 50 V, 10%, X7R, 0603 1 F ceramic capacitors, 50 V, 10%, X7R, 0603 470 pF ceramic capacitor, 5%, 50 V, COG, 0402, SMD 10 pF ceramic capacitors, 5%, 25 V, C0G, 0402 SCD, COMP, SMA connectors, SRI SCD, COMP, SMA connector 56 nH inductors, 0805, 5%, 500 mA Test points, PC compact SMT 50 RF transformer, 3300 MHz to 4000 MHz Aluminum heatsink Rev. B | Page 22 of 23 Manufacturer/Part No. Analog Devices/600-01649-00 Analog Devices/ADMV1009AEZ Murata/GRM1555C1H101JA01D Panasonic/ECJ-1VB1H103K Taiyo Yuden/UMK107AB7105KA-T Murata/GRM1555C1H471JA01D Kemet/C0402C100J3GAL SRI Connector Gage Co./21-141-1000-01 Johnson Components/142-0701-851 Coilcraft/0805CS-560XJLB Keystone Electronics/5016 Mini-Circuits/NCS1-422+ Analog Devices/111332 Data Sheet ADMV1009 OUTLINE DIMENSIONS 0.36 0.30 0.24 0.08 REF 1 0.50 BSC 3.60 3.50 SQ 3.40 EXPOSED PAD 17 TOP VIEW 1.10 1.00 0.90 0.38 0.32 0.26 PIN 1 32 25 24 8 16 9 0.20 MIN BOTTOM VIEW 3.50 REF 4.10 REF SIDE VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. PKG-004843 SEATING PLANE 04-24-2017-D PIN 1 INDICATOR 5.05 4.90 SQ 4.75 Figure 63. 32-Terminal Ceramic Leadless Chip Carrier [LCC] (E-32-1) Dimensions shown in millimeters ORDERING GUIDE Model1 ADMV1009AEZ ADMV1009AEZ-R7 ADMV1009-EVALZ 1 Temperature Range -40C to +85C -40C to +85C Package Body Material Alumina Ceramic Alumina Ceramic Lead Finish Gold Over Nickel Gold Over Nickel Z = RoHS Compliant Part. (c)2017-2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D15770-0-4/18(B) Rev. B | Page 23 of 23 Package Description 32-Terminal Ceramic LCC 32-Terminal Ceramic LCC Evaluation Board Package Option E-32-1 E-32-1