HITFETBSP 78 Preliminary data Smart Lowside Power Switch Features Product Summary * Logic Level Input Drain source voltage V DS 40 V * Input Protection (ESD) On-state resistance R DS(on) 50 m * Thermal shutdown with Nominal load current ID(Nom) 3 Clamping energy EAS auto restart 500 A mJ * Overload protection * Short circuit protection * Overvoltage protection * Current limitation * Analog driving possible Application * All kinds of resistive, inductive and capacitive loads in switching or linear applications * C compatible power switch for 12 V and 24 V DC applications * Replaces electromechanical relays and discrete circuits General Description N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded protection functions. Pin Symbol Function 1 IN Input 2 DRAIN Output to the load 3 SOURCE Ground TAB DRAIN Output to the load Semiconductor Group Page 1 Jan-15-1998 Preliminary data BSP 78 Block Diagram Vb b + LOAD M Drain C u rrent lim i t a t i o n Overvoltage protection G a te-Driving U n it IN ESD Overload protection Overtemperature protection ho o rr tt c c ii rr c cu u ii tt SS h p prro otte ec cttiio onn Source H ITFET Semiconductor Group Page 2 Jan-15-1998 Preliminary data BSP 78 Maximum Ratings at T j = 25C, unless otherwise specified Parameter Symbol Drain source voltage V DS 40 Drain source voltage for VDS(SC) 40 short circuit protection Continuous input voltage VIN -0.2 ... +10 Peak input voltage (IIN 2 mA) VIN(peak) -0.2 ... VDS Operating temperature Tj -40 ...+150 Storage temperature Tstg -55 ...+150 Power dissipation, TC = 85 C P tot 1.7 W Unclamped single pulse inductive energy F) EAS 500 mJ 2000 kV Electrostatic discharge voltage (Human Body Model) VESD according to MIL STD 883D, method 3015.7 and Value Unit V C EOS/ESD assn. standard S5.1 - 1993 E DIN humidity category, DIN 40 040 IEC climatic category; DIN IEC 68-1 40/150/56 Thermal resistance junction - ambient: K/W RthJA @ min. footprint 125 @ 6 cm2 cooling area F) 72 junction-soldering point: R thJS 17 K/W 1 not tested, specified by design on 50mm+50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70m thick) copper area for Drain connection. PCB is vertical without blown air. 2 Device Semiconductor Group Page 3 Jan-15-1998 Preliminary data BSP 78 Electrical Characteristics Symbol Parameter at Tj = 25C, unless otherwise specified Values Unit min. typ. max. 40 - 55 V - - 10 A VIN(th) 1.3 1.7 2.2 V On state input current IIN(on) - 10 30 A On-state resistance R DS(on) Characteristics Drain source clamp voltage VDS(AZ) Tj = - 40 ...+ 150, Imess = 10 mA Off-state drain currentTj = -40 ... +150C IDSS VIN = 0 V, VDS = 32 V Input treshold voltage ID = 0.7 mA ID = 3 A, VIN = 5 V, Tj = 25 C ID = 3 A, VIN = 5 V, Tj = 150 C m - 45 60 - 75 120 - 35 50 - 65 100 ID(Nom) 3 - - A ID(lim) 16 24 32 A ton - 60 150 s RL = 5 , VIN = 0 to 10 V, Vbb = 12 V Turn-off time VIN to 10% ID: toff - 60 150 RL = 5 , VIN = 10 to 0 V, Vbb = 12 V Slew rate on 70 to 50% Vbb: -dVDS /dton - 0.4 1 RL = 5 , VIN = 0 to 10 V, Vbb = 12 V Slew rate off 50 to 70% Vbb: dVDS /dtoff - 0.7 1 On-state resistance R DS(on) ID = 3 A, VIN = 10 V, Tj = 25 C ID = 3 A, VIN = 10 V, Tj = 150 C Nominal load current VDS = 0.5 V, TS = 85 C, Tj < 150C, VIN = 10 V Current limit (active if VDS>2.5 V) VIN = 10 V, VDS = 12 V Dynamic Characteristics Turn-on time VIN to 90% ID: V/s RL = 5 , VIN = 10 to 0 V, Vbb = 12 V Semiconductor Group Page 4 Jan-15-1998 Preliminary data BSP 78 Electrical Characteristics Symbol Parameter at Tj = 25C, unless otherwise specified Values Unit min. typ. max. Protection Functions Thermal overload trip temperature Tjt 150 165 - C Thermal hysteresis Tjt - 10 - K Input current protection mode IIN(Prot) - - 300 Unclamped single pulse inductive energy F) EAS ID = 3 A, Tj = 25 C, Vbb = 12 V ID = 3 A, Tj = 150 C, Vbb = 12 V A mJ 500 - - 300 - - - 1.1 - Inverse Diode Continuous source drain voltage VSD V VIN = 0 V, -ID = 5*3 A, tP = 300 s 1 not tested, specified by design Semiconductor Group Page 5 Jan-15-1998 Preliminary data BSP 78 Block diagram Terms Inductive and overvoltage output clamp Input circuit (ESD protection) Short circuit behaviour V IN Gate Drive Input I I IN D t t Source/ Ground Input is not designed for DC current > 2 mA T t j Thermal hysteresis t Semiconductor Group Page 6 Jan-15-1998 Preliminary data BSP 78 Maximum allowable power dissipation On-state resistance Ptot = f(TC) R ON = f(T j); I D=3A; V IN=10V 1.7 120 m W 100 1.4 Ptot max. 90 RDS(on) 1.2 80 1.0 70 60 0.8 typ. 50 0.6 40 30 0.4 20 0.2 10 0.0 -50 -25 0 25 50 75 100 C 0 -40 150 -15 10 35 60 85 110 135 C TC 185 Tj On-state resistance Typ. input threshold voltage R ON = f(T j); ID=3A; V IN=5V VIN(th) = f(T j); ID=-; V DS=12V 140 2.0 m V 120 max. 110 RDS(on) VIN(th)1.5 100 90 1.2 80 typ. 70 1.0 60 0.8 50 40 0.5 30 20 0.2 10 0 -40 -15 10 35 60 85 110 135 C 0.0 -50 185 Tj Semiconductor Group -25 0 25 50 75 100 C 150 Tj Page 7 Jan-15-1998 Preliminary data BSP 78 Typ. transfer characteristics Typ. short circuit current ID = f(VIN); VDS=12V; Tj=25C ID(SC) = f(T j); VDS=12V Parameter: V IN 30 30 A A ID ID 20 20 15 15 Vin=10V 5V 10 10 5 5 0 0 1 2 3 4 5 6 7 V 8 0 -40 10 -15 10 35 60 85 110 135 C VIN 185 Tj Typ. output characteristic Typ. overload current ID = f(VDS); Tj=25C ID(lim) = f(t), Vbb=12 V, no heatsink Parameter: V IN Parameter: Tjstart 35 40 10V A A -40C 7V ID ID(lim) 6V 5V 25 30 25 4V 20 20 15 15 25C Vin=3V 10 10 150C 85C 5 0 5 0 1 2 3 4 V 0 0.0 6 1.0 1.5 2.0 s 3.0 t VDS Semiconductor Group 0.5 Page 8 Jan-15-1998 Preliminary data BSP 78 Typ. off-state drain current Transient thermal impendance IDSS = f(Tj) ZthJC = f(tP) Parameter: D=t P/T 10 10 2 max. K/W A D=0.5 0.2 10 1 8 IDSS ZthJA 0.1 0.05 7 0.02 10 0 6 0.01 5 10 -1 4 3 10 -2 2 typ. 0 1 0 -40 -15 10 35 60 85 110 135 C 10 -3 -7 -6 -5 -4 -3 -2 -1 0 1 10 10 10 10 10 10 10 10 10 185 3 tP Tj Semiconductor Group s 10 Page 9 Jan-15-1998 Preliminary data BSP 78 Package and ordering code all dimensions in mm Ordering code: Q67060-S7203-A2 Semiconductor Group Page 10 Jan-15-1998