SM72485MM/NOPB - NATIONAL SEMICONDUCTOR

SM72485

SM72485 SolarMagic 100V, 150 mA Constant On-Time Buck Switching Regulator

Literature Number: SNVS697C

SM72485

May 10, 2011

SolarMagic 100V, 150 mA Constant On-Time Buck

Switching Regulator

General Description

The SM72485 Step Down Switching Regulator features all of

the functions needed to implement a low cost, efficient, Buck

bias regulator. This high voltage regulator contains an 100 V

N-Channel Buck Switch. The device is easy to implement and

is provided in the MSOP-8 and the thermally enhanced LLP-8

package. The regulator is based on a control scheme using

an ON time inversely proportional to VIN. This feature allows

the operating frequency to remain relatively constant. The

control scheme requires no loop compensation. An intelligent

current limit is implemented with forced OFF time, which is

inversely proportional to Vout. This scheme ensures short

circuit control while providing minimum foldback. Other fea-

tures include: Thermal Shutdown, VCC under-voltage lockout,

Gate drive under-voltage lockout, Max Duty Cycle limiter, and

a pre-charge switch.

Features

■Renewable Energy Grade

■Operating input voltage range: 6V to 95V

■Integrated 100V, N-Channel buck switch

■Internal start-up regulator

■No loop compensation required

■Ultra-Fast transient response

■On time varies inversely with input voltage

■Operating frequency remains constant with varying line

voltage and load current

■Adjustable output voltage from 2.5V

■Highly efficient operation

■Precision internal reference

■Low bias current

■Intelligent current limit

■Thermal shutdown

Typical Applications

■PV Panel Smart Junction Boxes

■Non-Isolated Telecommunication Buck Regulator

■Secondary High Voltage Post Regulator

■+42V Automotive Systems

Package

■MSOP - 8

■LLP - 8 (4mm x 4mm)

Typical Application, Basic Step-Down Regulator

30142301

SM72485 SolarMagic 100V, 150 mA Constant On-Time Buck Switching Regulator

Connection Diagrams

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Top View

8-Lead LLP

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Top View

8-Lead MSOP

Ordering Information

Order Number Package Type NSC Package Drawing Package Marking Supplied As

SM72485SDE

LLP-8 SDC08A S2485

250 Units on Tape and Reel

SM72485SD 1000 Units on Tape and Reel

SM72485SDX 4500 Units on Tape and Reel

SM72485MME

MSOP-8 MUA08A 2485

250 Units on Tape and Reel

SM72485MM 1000 Units on Tape and Reel

SM72485MMX 3500 Units on Tape and Reel

Pin Descriptions

Pin Name Description Application Information

1 SW Switching Node Power switching node. Connect to the output inductor, re-circulating diode,

and bootstrap capacitor.

2 BST Boost Pin (Boot–strap capacitor

input)

An external capacitor is required between the BST and the SW pins. A 0.01

µF ceramic capacitor is recommended. An internal diode charges the

capacitor from VCC during each off-time.

3 RCL Current Limit OFF time set pin A resistor between this pin and RTN sets the off-time when current limit is

detected. The off-time is preset to 35 µs if FB = 0V.

4 RTN Ground pin Ground for the entire circuit.

5 FB Feedback input from Regulated

Output

This pin is connected to the inverting input of the internal regulation

comparator. The regulation threshold is 2.5V.

6 RT/SD On time set pin A resistor between this pin and VIN sets the switch on time as a function of

VIN. The minimum recommended on time is 400 ns at the maximum input

voltage. This pin can be used for remote shutdown.

7 VCC Output from the internal high

voltage series pass regulator.

This regulated voltage provides gate drive power for the internal Buck

switch. An internal diode is provided between this pin and the BST pin. A

local 0.47 µF decoupling capacitor is required. The series pass regulator is

current limited to 9 mA.

8 VIN Input voltage Input operating range: 6V to 95V.

EP Exposed Pad The exposed pad has no electrical contact. Connect to system ground plane

for reduced thermal resistance.

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SM72485

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

VIN to GND -0.3V to 100V

BST to GND -0.3V to 114V

SW to GND (Steady State) -1V

ESD Rating (Note 5)

Human Body Model 2kV

BST to VCC 100V

BST to SW 14V

VCC to GND 14V

All Other Inputs to GND -0.3 to 7V

Lead Temperature (Soldering 4 sec) 260°C

Storage Temperature Range -55°C to +150°C

Operating Ratings (Note 1)

VIN 6V to 95V

Operating Junction Temperature −40°C to + 125°C

Electrical Characteristics Specifications with standard typeface are for TJ = 25°C, and those with boldface type

apply over full Operating Junction Temperature range. VIN = 48V, unless otherwise stated (Note 3).

Symbol Parameter Conditions Min Typ Max Units

VCC Supply

Vcc Reg Vcc Regulator Output Vin = 48V 6.6 77.4 V

Vin – Vcc 6V < Vin < 8.5V 100 mV

Vcc Bypass Threshold Vin Increasing 8.5 V

Vcc Bypass Hysteresis 300 mV

Vcc Output Impedance Vin =6V 100 Ω

Vin = 10V 8.8 Ω

Vin = 48V 0.8 Ω

Vcc Current Limit Vin = 48V 9.2 mA

Vcc UVLO Vcc Increasing 5.3 V

Vcc UVLO hysteresis 190 mV

Vcc UVLO filter delay 3 µs

Iin Operating current FB = 3V, Vin = 48V 550 750 µA

Iin Shutdown Current RT/SD = 0V 110 176 µA

Switch Characteristics

Buckswitch Rds(on) Itest = 200 mA 2.2 4.6 Ω

Gate Drive UVLO Vbst – Vsw Rising 2.8 3.8 4.8 V

Gate Drive UVLO hysteresis 490 mV

Pre-charge switch voltage At 1 mA 0.8 V

Pre-charge switch on-time 150 ns

Current Limit

Current Limit Threshold 0.24 0.3 0.36 A

Current Limit Response Time Iswitch Overdrive = 0.1A Time

to Switch Off

350 ns

TOFF-1 OFF time generator FB=0V, RCL = 100K 35 µs

TOFF-2 OFF time generator FB=2.3V, RCL = 100K 2.56 µs

On Time Generator

TON - 1 Vin = 10V

Ron = 200K

2.15 2.77 3.5 µs

TON - 2 Vin = 95V

Ron = 200K

200 300 420 ns

Remote Shutdown Threshold Rising 0.40 0.70 1.05 V

Remote Shutdown Hysteresis 35 mV

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SM72485

Symbol Parameter Conditions Min Typ Max Units

Minimum Off Time

Minimum Off Timer FB = 0V 300 ns

Regulation and OV Comparators

FB Reference Threshold Internal reference

Trip point for switch ON

2.445 2.5 2.550 V

FB Over-Voltage Threshold Trip point for switch OFF 2.875 V

FB Bias Current 100 nA

Thermal Shutdown

Tsd Thermal Shutdown Temp. 165 °C

Thermal Shutdown Hysteresis 25 °C

Thermal Resistance

θJA Junction to Ambient SDC Package 40 °C/W

MUA Package 200

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the

device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.

Note 2: For detailed information on soldering plastic MSOP and LLP packages, refer to the Packaging Data Book available from National Semiconductor

Corporation.

Note 3: All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production with TA = TJ = 25°C. All hot and cold

limits are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

Note 4: The VCC output is intended as a self bias for the internal gate drive power and control circuits. Device thermal limitations limit external loading.

Note 5: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. The ESD rating for pin 2, pin 7, and pin 8 is 1 kV for HBM

and 150V for MM.

Note 6: For devices procured in the LLP-8 package the Rds(on) limits are guaranteed by design characterization data only.

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SM72485

Typical Performance Characteristics

Efficiency vs. Load Current and VIN

(Circuit of Figure 4)

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VCC vs. VIN

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ON-Time vs Input Voltage and RT

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Current Limit Off-Time vs. VFB and RCL

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Maximum Frequency vs. VOUT and VIN

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ICC Current vs. Applied VCC Voltage

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SM72485

Block Diagram

30142310

Functional Description

The SM72485 Step Down Switching Regulator features all

the functions needed to implement a low cost, efficient, Buck

bias power converter. This high voltage regulator contains a

100 V N-Channel Buck Switch, is easy to implement and is

provided in the MSOP-8 and the thermally enhanced LLP-8

package. The regulator is based on a control scheme using

an on-time inversely proportional to VIN. The control scheme

requires no loop compensation. Current limit is implemented

with forced off-time, which is inversely proportional to VOUT.

This scheme ensures short circuit control while providing min-

imum foldback.

The SM72485 can be applied in numerous applications to ef-

ficiently regulate down higher voltages. This regulator is well

suited for high voltage PV panel junction boxes, 48 Volt Tele-

com and the new 42V Automotive power bus ranges. Fea-

tures include: Thermal Shutdown, VCC under-voltage lockout,

Gate drive under-voltage lockout, Max Duty Cycle limit timer,

intelligent current limit off timer, and a pre-charge switch.

Control Circuit Overview

The SM72485 is a Buck DC-DC regulator that uses a control

scheme in which the on-time varies inversely with line voltage

(VIN). Control is based on a comparator and the on-time one-

shot, with the output voltage feedback (FB) compared to an

internal reference (2.5V). If the FB level is below the reference

the buck switch is turned on for a fixed time determined by the

line voltage and a programming resistor (RT). Following the

ON period the switch will remain off for at least the minimum

off-timer period of 300ns. If FB is still below the reference at

that time the switch will turn on again for another on-time pe-

riod. This will continue until regulation is achieved.

The SM72485 operates in discontinuous conduction mode at

light load currents, and continuous conduction mode at heavy

load current. In discontinuous conduction mode, current

through the output inductor starts at zero and ramps up to a

peak during the on-time, then ramps back to zero before the

end of the off-time. The next on-time period starts when the

voltage at FB falls below the internal reference - until then the

inductor current remains zero. In this mode the operating fre-

quency is lower than in continuous conduction mode, and

varies with load current. Therefore at light loads the conver-

sion efficiency is maintained, since the switching losses re-

duce with the reduction in load and frequency. The discon-

tinuous operating frequency can be calculated as follows:

where RL = the load resistance

In continuous conduction mode, current flows continuously

through the inductor and never ramps down to zero. In this

mode the operating frequency is greater than the discontinu-

ous mode frequency and remains relatively constant with load

and line variations. The approximate continuous mode oper-

ating frequency can be calculated as follows:

(1)

The output voltage (VOUT) is programmed by two external re-

sistors as shown in the Block Diagram. The regulation point

can be calculated as follows:

VOUT = 2.5 x (RFB1 + RFB2) / RFB1

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SM72485

The SM72485 regulates the output voltage based on ripple

voltage at the feedback input, requiring a minimum amount of

ESR for the output capacitor C2. A minimum of 25mV to 50mV

of ripple voltage at the feedback pin (FB) is required for the

SM72485. In cases where the capacitor ESR is too small,

additional series resistance may be required (R3 in the Block

Diagram).

For applications where lower output voltage ripple is required

the output can be taken directly from a low ESR output ca-

pacitor, as shown in Figure 1. However, R3 slightly degrades

the load regulation.

30142313

FIGURE 1. Low Ripple Output Configuration

Start-Up Regulator (VCC)

The high voltage bias regulator is integrated within the

SM72485. The input pin (VIN) can be connected directly to

line voltages between 6V and 95V, with transient capability to

100V. Referring to the block diagram and the graph of VCC vs

VIN, when VIN is between 6V and the bypass threshold (nom-

inally 8.5V), the bypass switch (Q2) is on, and VCC tracks

VIN within 100 mV to 150 mV. The bypass switch on-resis-

tance is approximately 100Ω, with inherent current limiting at

approximately 100 mA. When VIN is above the bypass thresh-

old Q2 is turned off, and VCC is regulated at 7V. The VCC

regulator output current is limited at approximately 9.2 mA.

When the SM72485 is shutdown using the RT/SD pin, the

VCC bypass switch is shut off regardless of the voltage at

VIN.

When VIN exceeds the bypass threshold, the time required

for Q2 to shut off is approximately 2 - 3 µs. The capacitor at

VCC (C3) must be a minimum of 0.47 µF to prevent the volt-

age at VCC from rising above its absolute maximum rating in

response to a step input applied at VIN. C3 must be located

as close as possible to the VCC and RTN pins. In applications

with a relatively high input voltage, power dissipation in the

bias regulator is a concern. An auxiliary voltage of between

7.5V and 14V can be diode connected to the VCC pin to shut

off the VCC regulator, thereby reducing internal power dissi-

pation. The current required into the VCC pin is shown in the

graph “ICC Current vs. Applied VCC Voltage”. Internally a diode

connects VCC to VIN requiring that the auxiliary voltage be

less than VIN.

The turn-on sequence is shown in Figure 2. During the initial

delay (t1) VCC ramps up at a rate determined by its current

limit and C3 while internal circuitry stabilizes. When VCC

reaches the upper threshold of its under-voltage lock-out (UV-

LO, typically 5.3V) the buckswitch is enabled. The inductor

current increases to the current limit threshold (ILIM) and dur-

ing t2 VOUT increases as the output capacitor charges up.

When VOUT reaches the intended voltage the average induc-

tor current decreases (t3) to the nominal load current (IO).

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SM72485

30142314

FIGURE 2. Startup Sequence

Regulation Comparator

The feedback voltage at FB is compared to an internal 2.5V

reference. In normal operation (the output voltage is regulat-

ed), an on-time period is initiated when the voltage at FB falls

below 2.5V. The buck switch will stay on for the on-time,

causing the FB voltage to rise above 2.5V. After the on-time

period, the buck switch will stay off until the FB voltage again

falls below 2.5V. During start-up, the FB voltage will be below

2.5V at the end of each on-time, resulting in the minimum off-

time of 300 ns. Bias current at the FB pin is nominally 100 nA.

Over-Voltage Comparator

The feedback voltage at FB is compared to an internal 2.875V

reference. If the voltage at FB rises above 2.875V the on-time

pulse is immediately terminated. This condition can occur if

the input voltage, or the output load, change suddenly. The

buck switch will not turn on again until the voltage at FB falls

below 2.5V.

On-Time Generator and Shutdown

The on-time for the SM72485 is determined by the RT resistor,

and is inversely proportional to the input voltage (Vin), result-

ing in a nearly constant frequency as Vin is varied over its

range. The on-time equation for the SM72485 is:

TON = 1.385 x 10-10 x RT / VIN (2)

RT should be selected for a minimum on-time (at maximum

VIN) greater than 400 ns, for proper current limit operation.

This requirement limits the maximum frequency for each ap-

plication, depending on VIN and VOUT.

The SM72485 can be remotely disabled by taking the RT/SD

pin to ground. See Figure 3. The voltage at the RT/SD pin is

between 1.5 and 3.0 volts, depending on Vin and the value of

the RT resistor.

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SM72485

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FIGURE 3. Shutdown Implementation

Current Limit

The SM72485 contains an intelligent current limit OFF timer.

If the current in the Buck switch exceeds 0.3A the present

cycle is immediately terminated, and a non-resetable OFF

timer is initiated. The length of off-time is controlled by an ex-

ternal resistor (RCL) and the FB voltage (see the graph Cur-

rent Limit Off-Time vs. VFB and RCL). When FB = 0V, a

maximum off-time is required, and the time is preset to 35µs.

This condition occurs when the output is shorted, and during

the initial part of start-up. This amount of time ensures safe

short circuit operation up to the maximum input voltage of

95V. In cases of overload where the FB voltage is above zero

volts (not a short circuit) the current limit off-time will be less

than 35µs. Reducing the off-time during less severe over-

loads reduces the amount of foldback, recovery time, and the

start-up time. The off-time is calculated from the following

equation:

TOFF = 10-5 / (0.285 + (VFB / 6.35 x 10-6 x RCL)) (3)

The current limit sensing circuit is blanked for the first 50-70ns

of each on-time so it is not falsely tripped by the current surge

which occurs at turn-on. The current surge is required by the

re-circulating diode (D1) for its turn-off recovery.

N - Channel Buck Switch and Driver

The SM72485 integrates an N-Channel Buck switch and as-

sociated floating high voltage gate driver. The gate driver

circuit works in conjunction with an external bootstrap capac-

itor and an internal high voltage diode. A 0.01 µF ceramic

capacitor (C4) connected between the BST pin and SW pin

provides the voltage to the driver during the on-time.

During each off-time, the SW pin is at approximately 0V, and

the bootstrap capacitor charges from Vcc through the internal

diode. The minimum OFF timer, set to 300ns, ensures a min-

imum time each cycle to recharge the bootstrap capacitor.

The internal pre-charge switch at the SW pin is turned on for

≊150 ns during the minimum off-time period, ensuring suffi-

cient voltage exists across the bootstrap capacitor for the on-

time. This feature helps prevent operating problems which

can occur during very light load conditions, involving a long

off-time, during which the voltage across the bootstrap ca-

pacitor could otherwise reduce below the Gate Drive UVLO

threshold. The pre-charge switch also helps prevent startup

problems which can occur if the output voltage is pre-charged

prior to turn-on. After current limit detection, the pre-charge

switch is turned on for the entire duration of the forced off-

time .

Thermal Protection

The SM72485 should be operated so the junction tempera-

ture does not exceed 125°C during normal operation. An

internal Thermal Shutdown circuit is provided to shutdown the

SM72485 in the event of a higher than normal junction tem-

perature. When activated, typically at 165°C, the controller is

forced into a low power reset state by disabling the buck

switch. This feature prevents catastrophic failures from acci-

dental device overheating. When the junction temperature

reduces below 140°C (typical hysteresis = 25°C) normal op-

eration is resumed.

Applications Information

SELECTION OF EXTERNAL COMPONENTS

A guide for determining the component values will be illus-

trated with a design example. Refer to the Block Diagram. The

following steps will configure the SM72485 for:

•Input voltage range (Vin): 12V to 90V

•Output voltage (VOUT1): 10V

•Load current (for continuous conduction mode): 100 mA

to 150 mA

RFB1, RFB2: VOUT = VFB x (RFB1 + RFB2) / RFB1, and since

VFB = 2.5V, the ratio of RFB2 to RFB1 calculates as 3:1. Stan-

dard values of 3.01 kΩ and 1.00 kΩ are chosen. Other values

could be used as long as the 3:1 ratio is maintained.

Fs and RT: The recommended operating frequency range for

the SM72485 is 50 kHz to 1.1 MHz. Unless the application

requires a specific frequency, the choice of frequency is gen-

erally a compromise since it affects the size of L1 and C2, and

the switching losses. The maximum allowed frequency,

based on a minimum on-time of 400 ns, is calculated from:

FMAX = VOUT / (VINMAX x 400 ns)

For this exercise, Fmax = 277 kHz. From equation 1, RT cal-

culates to 260 kΩ. A standard value 309 kΩ resistor will be

used to allow for tolerances in equation 1, resulting in a fre-

quency of 234 kHz.

L1: The main parameter affected by the inductor is the output

current ripple amplitude. The choice of inductor value there-

fore depends on both the minimum and maximum load cur-

rents, keeping in mind that the maximum ripple current occurs

at maximum Vin.

a) Minimum load current: To maintain continuous conduc-

tion at minimum Io (100 mA), the ripple amplitude (IOR) must

be less than 200 mA p-p so the lower peak of the waveform

does not reach zero. L1 is calculated using the following

equation:

At Vin = 90V, L1(min) calculates to 190 µH. The next larger

standard value (220 µH) is chosen and with this value IOR

calculates to 173 mA p-p at Vin = 90V, and 32 mA p-p at Vin

= 12V.

b) Maximum load current: At a load current of 150 mA, the

peak of the ripple waveform must not reach the minimum

guaranteed value of the SM72485’s current limit threshold

(240 mA). Therefore the ripple amplitude must be less than

180 mA p-p, which is already satisfied in the above calcula-

tion. With L1 = 220 µH, at maximum Vin and Io, the peak of

the ripple will be 236 mA. While L1 must carry this peak cur-

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SM72485

rent without saturating or exceeding its temperature rating, it

also must be capable of carrying the maximum guaranteed

value of the SM72485’s current limit threshold (360 mA) with-

out saturating, since the current limit is reached during start-

up.

The DC resistance of the inductor should be as low as pos-

sible to minimize its power loss.

C3: The capacitor on the VCC output provides not only noise

filtering and stability, but its primary purpose is to prevent false

triggering of the VCC UVLO at the buck switch on/off transi-

tions. C3 should be no smaller than 0.47 µF.

C2, and R3: When selecting the output filter capacitor C2, the

items to consider are ripple voltage due to its ESR, ripple

voltage due to its capacitance, and the nature of the load.

ESR and R3: A low ESR for C2 is generally desirable so as

to minimize power losses and heating within the capacitor.

However, the regulator requires a minimum amount of ripple

voltage at the feedback input for proper loop operation. For

the SM72485 the minimum ripple required at pin 5 is 25 mV

p-p, requiring a minimum ripple at VOUT of 100 mV. Since the

minimum ripple current (at minimum Vin) is 32 mA p-p, the

minimum ESR required at VOUT is 100 mV/32 mA = 3.12Ω.

Since quality capacitors for SMPS applications have an ESR

considerably less than this, R3 is inserted as shown in the

Block Diagram. R3’s value, along with C2’s ESR, must result

in at least 25 mV p-p ripple at pin 5. Generally, R3 will be 0.5

to 4.0Ω.

RCL: When current limit is detected, the minimum off-time set

by this resistor must be greater than the maximum normal off-

time, which occurs at maximum input voltage. Using Equation

2, the minimum on-time is 476 ns, yielding an off-time of 3.8

µs (at 234 kHz). Due to the 25% tolerance on the on-time, the

off-time tolerance is also 25%, yielding a maximum off-time

of 4.75 µs. Allowing for the response time of the current limit

detection circuit (350 ns) increases the maximum off-time to

5.1 µs. This is increased an additional 25% to 6.4 µs to allow

for the tolerances of Equation 3. Using Equation 3, RCL cal-

culates to 310 kΩ at VFB = 2.5V. A standard value 316 kΩ

resistor will be used.

D1: The important parameters are reverse recovery time and

forward voltage. The reverse recovery time determines how

long the reverse current surge lasts each time the buck switch

is turned on. The forward voltage drop is significant in the

event the output is short-circuited as it is only this diode’s

voltage which forces the inductor current to reduce during the

forced off-time. For this reason, a higher voltage is better, al-

though that affects efficiency. A good choice is a Schottky

power diode, such as the DFLS1100. D1’s reverse voltage

rating must be at least as great as the maximum Vin, and its

current rating be greater than the maximum current limit

threshold (360 mA).

C1: This capacitor’s purpose is to supply most of the switch

current during the on-time, and limit the voltage ripple at Vin,

on the assumption that the voltage source feeding Vin has an

output impedance greater than zero. At maximum load cur-

rent, when the buck switch turns on, the current into pin 8 will

suddenly increase to the lower peak of the output current

waveform, ramp up to the peak value, then drop to zero at

turn-off. The average input current during this on-time is the

load current (150 mA). For a worst case calculation, C1 must

supply this average load current during the maximum on-time.

To keep the input voltage ripple to less than 2V (for this ex-

ercise), C1 calculates to:

Quality ceramic capacitors in this value have a low ESR which

adds only a few millivolts to the ripple. It is the capacitance

which is dominant in this case. To allow for the capacitor’s

tolerance, temperature effects, and voltage effects, a 1.0 µF,

100V, X7R capacitor will be used.

C4: The recommended value is 0.01µF for C4, as this is ap-

propriate in the majority of applications. A high quality ceramic

capacitor, with low ESR is recommended as C4 supplies the

surge current to charge the buck switch gate at turn-on. A low

ESR also ensures a quick recharge during each off-time. At

minimum Vin, when the on-time is at maximum, it is possible

during start-up that C4 will not fully recharge during each 300

ns off-time. The circuit will not be able to complete the start-

up, and achieve output regulation. This can occur when the

frequency is intended to be low (e.g., RT = 500K). In this case

C4 should be increased so it can maintain sufficient voltage

across the buck switch driver during each on-time.

C5: This capacitor helps avoid supply voltage transients and

ringing due to long lead inductance at VIN. A low ESR, 0.1µF

ceramic chip capacitor is recommended, located close to the

SM72485.

FINAL CIRCUIT

The final circuit is shown in Figure 4. The circuit was tested,

and the resulting performance is shown in Figure 5 and Figure

PC BOARD LAYOUT

The SM72485 regulation and over-voltage comparators are

very fast, and as such will respond to short duration noise

pulses. Layout considerations are therefore critical for opti-

mum performance. The components at pins 1, 2, 3, 5, and 6

should be as physically close as possible to the IC, thereby

minimizing noise pickup in the PC tracks. The current loop

formed by D1, L1, and C2 should be as small as possible. The

ground connection from D1 to C1 should be as short and di-

rect as possible.

If the internal dissipation of the SM72485 produces excessive

junction temperatures during normal operation, good use of

the pc board’s ground plane can help considerably to dissi-

pate heat. The exposed pad on the bottom of the LLP-8

package can be soldered to a ground plane on the PC board,

and that plane should extend out from beneath the IC to help

dissipate the heat. Additionally, the use of wide PC board

traces, where possible, can also help conduct heat away from

the IC. Judicious positioning of the PC board within the end

product, along with use of any available air flow (forced or

natural convection) can help reduce the junction tempera-

tures.

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SM72485

30142318

FIGURE 4. SM72485 Example Circuit

Bill of Materials

Item Description Part Number Value

C1 Ceramic Capacitor TDK C4532X7R2A105M 1 µF, 100V

C2 Ceramic Capacitor TDK C4532X7R1E226M 22 µF, 25V

C3 Ceramic Capacitor Kemet C1206C474K5RAC 0.47 µF, 50V

C4 Ceramic Capacitor Kemet C1206C103K5RAC 0.01 µF, 50V

C5 Ceramic Capacitor TDK C3216X7R2A104M 0.1 µF, 100V

D1 Schottky Power Diode Diodes Inc. DFLS1100 100V, 1A

L1 Power Inductor COILTRONICS DR125-221-R, or 220 µH

TDK SLF10145T-221MR65

RFB2 Resistor Vishay CRCW12063011F 3.01 kΩ

RFB1 Resistor Vishay CRCW12061001F 1.0 kΩ

R3 Resistor Vishay CRCW12063R30F 3.3 Ω

RTResistor Vishay CRCW12063093F 309 kΩ

RCL Resistor Vishay CRCW12063163F 316 kΩ

U1 Switching Regulator National Semiconductor SM72485

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SM72485

30142324

FIGURE 5. Efficiency vs. Load Current and VIN

30142328

FIGURE 6. Efficiency vs. VIN

LOW OUTPUT RIPPLE CONFIGURATIONS

For applications where low output ripple is required, the fol-

lowing options can be used to reduce or nearly eliminate the

ripple.

a) Reduced ripple configuration: In Figure 7, Cff is added

across RFB2 to AC-couple the ripple at VOUT directly to the FB

pin. This allows the ripple at VOUT to be reduced to a minimum

of 25 mVp-p by reducing R3, since the ripple at VOUT is not

attenuated by the feedback resistors. The minimum value for

Cff is determined from:

where tON(max) is the maximum on-time, which occurs at VIN

(min). The next larger standard value capacitor should be used

for Cff.

www.national.com 12

SM72485

30142321

FIGURE 7. Reduced Ripple Configuration

b) Minimum ripple configuration: If the application requires

a lower value of ripple (<10 mVp-p), the circuit of Figure 8 can

be used. R3 is removed, and the resulting output ripple volt-

age is determined by the inductor’s ripple current and C2’s

characteristics. RA and CA are chosen to generate a saw-

tooth waveform at their junction, and that voltage is AC-

coupled to the FB pin via CB. To determine the values for RA,

CA and CB, use the following procedure:

Calculate VA = VOUT - (VSW x (1 - (VOUT/VIN(min))))

where VSW is the absolute value of the voltage at the SW pin

during the off-time (typically 1V). VA is the DC voltage at the

RA/CA junction, and is used in the next equation.

- Calculate RA x CA = (VIN(min) - VA) x tON/ΔV

where tON is the maximum on-time (at minimum input volt-

age), and ΔV is the desired ripple amplitude at the RA/CA

junction (typically 40-50 mV). RA and CA are then chosen

from standard value components to satisfy the above product.

Typically CA is 1000 pF to 5000 pF, and RA is 10 kΩ to 300

kΩ. CB is then chosen large compared to CA, typically 0.1 µF.

30142322

FIGURE 8. Minimum Output Ripple Using Ripple Injection

c) Alternate minimum ripple configuration: The circuit in

Figure 9 is the same as that in the Block Diagram, except the

output voltage is taken from the junction of R3 and C2. The

ripple at VOUT is determined by the inductor’s ripple current

and C2’s characteristics. However, R3 slightly degrades the

load regulation. This circuit may be suitable if the load current

is fairly constant.

13 www.national.com

SM72485

30142323

FIGURE 9. Alternate Minimum Output Ripple

www.national.com 14

SM72485

Physical Dimensions inches (millimeters) unless otherwise noted

8-Lead LLP Package

NS Package Number SDC08B

8-Lead MSOP Package

NS Package Number MUA08A

15 www.national.com

SM72485

SM72485 SolarMagic 100V, 150 mA Constant On-Time Buck Switching Regulator

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