TCAN1042DQ1 - TEXAS INSTRUMENTS

March, 2014 − Rev. 11

1Publication Order Number:

NCP1595/D

NCP1595, NCP1595A,

NCP1595C

1 MHz, 1.5 A Synchronous

Buck Regulator

The NCP1595/A/C family are fixed 1 MHz, high−output−current,

synchronous PWM converters that integrate a low−resistance,

high−side P−channel MOSFET and a low−side N−channel MOSFET.

The NCP1595/A/C utilizes current mode control to provide fast

transient response and excellent loop stability. It regulates input

voltages from 4.0 V to 5.5 V down to an output voltage as low as 0.8 V

and is able to supply up to 1.5 A.

The NCP1595/A/C includes an internally fixed switching frequency

(FSW), and an internal soft−start to limit inrush currents. Using the EN

pin, shutdown supply current is reduced to 3 mA maximum.

Other features include cycle−by−cycle current limiting,

short−circuit protection and thermal shutdown.

Features

•Input Voltage Range: from 4.0 V to 5.5 V

•Internal 140 mW High−Side Switching P−Channel MOSFET and

90 mW Low−Side N−Channel MOSFET

•Fixed 1 MHz Switching Frequency

•Cycle−by−Cycle Current Limiting

•Overtemperature Protection

•Internal Soft−Start

•Diode Emulation During Light Load (Disabled for NCP1595C)

•Hiccup Mode Short−Circuit Protection

•Start−up with Pre−Biased Output Load

•Adjustable Output Voltage Down to 0.8 V

•These are Pb−Free Devices

Applications

•DSP Power

•Hard Disk Drivers

•Computer Peripherals

•Home Audio

•Set−Top Boxes

•Networking Equipment

•LCD TV

•Wireless and DSL/Cable Modem

•USB Power Devices

Device Package Shipping†

ORDERING INFORMATION

NCP1595MNR2G

DFN6

(Pb−Free) 3000 / Tape & Reel

NCP1595MNT2G

DFN6

CASE 506AH

MARKING

DIAGRAM

http://onsemi.com

XXXXX = N1595, 1595A, 1595C

A = Assembly Location

L = Wafer Lot

Y = Year

W = Work Week

G= Pb−Free Package

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

VCC

VCCP

GND

NCP1595/NCP1595C

VCC

VCCP

GND

NCP1595A

PIN CONNECTIONS

NCP1595AMNR2G

NCP1595AMNTWG

(Note: Microdot may be in either location)

XXXXX

ALYWG

NCP1595CMNTWG

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BLOCK DIAGRAM

Figure 1. Block Diagram

−

Soft−Start

Power Reset

UVLO

THD

Hiccup

PWM Control

Logic

OSC

−

NCP1595/A/C

VCCP

GND

VCC

NC/EN

Vref

PMOS

PIN DESCRIPTIONS

Pin No Symbol Description

1 FB Feedback input pin of the Error Amplifier. Connect a resistor divider from the converter’s output

voltage to this pin to set the converter’s output voltage.

2 GND Ground pin. Connect to thermal pad.

3 LX The drains of the internal MOSFETs. The output inductor should be connected to this pin.

4 VCCP Power input for the power stage

5 VCC Input supply pin for internal bias circuitry. A 0.1 mF ceramic bypass capacitor is preferred to connect

to this pin.

6NC No connection for NCP1595 or NCP1595C

EN Logic input to enable the part. Logic high to turn on the part and logic low to shut off the part.

An internal pullup forces the part into an enable state when no external bias is present on the pin.

For NCP1595A only

EP PAD Exposed pad of the package provides both electrical contact to the ground and good thermal contact

to the PCB. This pad must be soldered to the PCB for proper operation.

NCP1595, NCP1595A, NCP1595C

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APPLICATION CIRCUIT

Figure 2. NCP1595/A/C

VCCP

VCC

NC/EN

GND

Vin

4.0 V − 5.5 V

Vout

ABSOLUTE MAXIMUM RATINGS

Rating Symbol Value Unit

Power Supply Pin (Pin 4, 5) to GND Vin 6.5

−0.3 (DC)

−1.0 (t < 100 ns)

LX to GND LX Vin + 0.7

Vin + 1.0 (t < 20 ns)

−0.7 (DC)

−5.0 (t < 100 ns)

All other pins 6.0

−0.3 (DC)

−1.0 (t < 100 ns)

Operating Temperature Range TA−40 to +125 °C

Junction Temperature TJ−40 to +150 °C

Storage Temperature Range TS−55 to +150 °C

Thermal Resistance Junction−to−Air (Note 1) RqJA 68.5 °C/W

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. RqJA measured on approximately 1x1 inch sq. of 1 oz. Copper.

NCP1595, NCP1595A, NCP1595C

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ELECTRICAL CHARACTERISTICS

(Vin = 4.0 V − 5.5 V, Vout = 1.2 V, TJ = +25°C for typical value; For NCP1595, NCP1595A: −40°C < TA < 125°C; For NCP1595C: −40°C

< TA < 85°C for min/max values unless noted otherwise)

Parameter Symbol Test Conditions Min Typ Max Unit

Vin Input Voltage Range (Note 2) Vin 4.0 5.5 V

VCC UVLO Threshold 3.2 3.5 3.8 V

UVLO Hysteresis 335 mV

VCC Quiescent Current IinVCC Vin = 5 V,VFB = 1.5 V,

(No Switching)

1.7 2.0 mA

VCCP Quiescent Current IinVCCP Vin = 5 V,VFB = 1.5 V,

(No Switching)

25 mA

Vin Shutdown Supply Current (Note 3) IQSHDN (NCP1595A), EN = 0 V 1.8 3.0 mA

FEEDBACK VOLTAGE

Reference Voltage VFB 0.788 0.800 0.812 V

Feedback Input Bias Current (Note 2) IFB VFB = 0.8 V 10 100 nA

Feedback Voltage Line Regulation (Note 3) Vin = 4.0 V to 5.5 V 0.06 %/V

PWM

Maximum Controllable Duty Cycle (regulating) 82 85 %

Minimum Controllable ON Time (Note 3) 50 ns

PULSE−BY−PULSE CURRENT LIMIT

Pulse−by−Pulse Current Limit (Regulation) ILIM 2.7 3.9 4.3 A

Pulse−by−Pulse Current Limit (Soft−Start) ILIMSS 4.0 5.3 6.1 A

OSCILLATOR

Oscillator Frequency FSW 0.87 1.0 1.13 MHz

MOSFET

High Side MOSFET ON Resistance (Note 2) RDS(on)

RDS(on)

IDS = 100 mA, VGS = 5 V 140 200 mW

High Side MOSFET Leakage (Note 3) VEN = 0 V, VSW = 0 V 10 mA

Low Side MOSFET ON Resistance (Note 2) RDS(on)

RDS(on)

IDS = 100 mA, VGS = 5 V 90 125 mW

Low Side MOSFET Leakage (Note 3) VEN = 0 V, VSW = 5 V 10 mA

ENABLE (NCP1595A)

EN HI Threshold ENHI (NCP1595A) 1.4 V

EN LO Threshold ENLO (NCP1595A) 0.4 V

EN Hysteresis (NCP1595A) 200 mV

EN Pullup Current (NCP1595A) 1.4 3.0 mA

SOFT−START

Soft−Start Ramp Time (Note 3) tSS FSW = 1 MHz 1.0 ms

Hiccup Timer (Note 3) 2.0 ms

THERMAL SHUTDOWN

Thermal Shutdown Threshold (Note 3) 185 °C

Thermal Shutdown Hysteresis (Note 3) 40 °C

2. Guaranteed by characterization. Not production tested.

3. Guaranteed by design. Not production tested.

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

NCP1595, NCP1595A, NCP1595C

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TYPICAL OPERATING CHARACTERISTICS

TA, AMBIENT TEMPERATURE (°C)

3.1

3.2

3.3

3.4

3.5

3.7

−40 5 20 125

Figure 3. Undervoltage Lockout vs.

Temperature

UVLO (V)

Figure 4. Feedback Input Threshold vs.

Temperature

785

790

795

800

805

810

815

−40 5 50 125

TA, AMBIENT TEMPERATURE (°C)

VFB, FB INPUT THRESHOLD (mV)

Figure 5. Switching Frequency vs.

Temperature

0.7

0.8

0.9

1.0

1.1

1.2

1.3

−40 5 35 125

TA, AMBIENT TEMPERATURE (°C)

fSW, SWITCH FREQUENCY (MHz)

Figure 6. Current Limit vs. Temperature

3.0

3.5

4.0

4.5

5.0

5.5

−40 5 35 125

TA, AMBIENT TEMPERATURE (°C)

ILIM (A)

1.0

1.2

1.4

1.6

1.8

2.0

−40 5 50 125

TA, AMBIENT TEMPERATURE (°C)

ICC, SWITCHING (mA)

Figure 7. Quiescent Current Into VCC vs.

Temperature Figure 8. Quiescent Current Into VCC vs.

Temperature

UVLO Falling Threshold

3.6

65−10

UVLO Rising Threshold

−25 65

65−25 −25 65

ILIM (Regulation)

ILIM (Soft−Start)

−25 95 1.0

1.2

1.4

1.6

1.8

2.0

−40 20 95 125

TA, AMBIENT TEMPERATURE (°C)

ICC, DISABLED (mA)

−25 110

−25 35 50 11080 95 −10 20 35 95 11080

−10 20 50 80 11095 −10 20 50 80 95 110

110−10 20 35 65 80 −10 5 35506580

NCP1595, NCP1595A, NCP1595C

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TYPICAL OPERATING CHARACTERISTICS

Figure 9. Load Regulation for VOUT = 3.3 V Figure 10. Efficiency vs. Output Current for

VOUT = 3.3 V

Figure 11. Load Regulation for VOUT = 1.8 V Figure 12. Efficiency vs. Output Current for

VOUT = 1.8 V

Figure 13. Load Regulation for VOUT = 1.2 V

1.10

1.12

1.14

1.16

1.18

1.20

1.22

0.1 0.7 1.0 1.5

VIN = 4.0 V

VIN = 5.0 V

100

0.01 0.1 1 10

VOUT

, OUTPUT VOLTAGE (V)

IOUT

, OUTPUT CURRENT (A)

IOUT

, OUTPUT CURRENT (A)

VIN = 5.0 V

VIN = 4.0 V

EFFICIENCY (%)

Figure 14. Efficiency vs. Output Current for

VOUT = 1.2 V

1.24

1.26

1.28

1.30

0.2 0.3 0.4 0.5 0.6 0.8 0.9 1.1 1.2 1.3 1.4

1.70

1.72

1.74

1.76

1.78

1.80

1.82

0.1 0.7 1.0 1.5

VIN = 4.0 V

VIN = 5.0 V

VOUT

, OUTPUT VOLTAGE (V)

IOUT

, OUTPUT CURRENT (A)

1.84

1.86

1.88

1.90

0.2 0.3 0.4 0.5 0.6 0.8 0.9 1.1 1.2 1.3 1.4

3.20

3.22

3.24

3.26

3.28

3.30

3.32

0.1 0.7 1.0 1.5

VIN = 4.0 V

VIN = 5.0 V

VOUT

, OUTPUT VOLTAGE (V)

IOUT

, OUTPUT CURRENT (A)

3.34

3.36

3.38

3.40

0.2 0.3 0.4 0.5 0.6 0.8 0.9 1.1 1.2 1.3 1.4

100

0.01 0.1 1 10

IOUT

, OUTPUT CURRENT (A)

VIN = 5.0 V

VIN = 4.0 V

EFFICIENCY (%)

100

0.01 0.1 1 10

IOUT

, OUTPUT CURRENT (A)

VIN = 5.0 V

VIN = 4.0 V

EFFICIENCY (%)

VOUT = 1.2 V

L = 3.3 mH

COUT = 2 x 22 mF

VOUT = 1.8 V

L = 3.3 mH

COUT = 2 x 22 mF

VOUT = 3.3 V

L = 3.3 mH

COUT = 2 x 22 mF

VOUT = 3.3 V

L = 3.3 mH

COUT = 2 x 22 mF

VOUT = 1.8 V

L = 3.3 mH

COUT = 2 x 22 mF

VOUT = 1.2 V

L = 3.3 mH

COUT = 2 x 22 mF

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(VIN = 5 V, ILOAD = 700 mA, L = 3.3 mH, COUT = 2 x 22 mF)

Upper Trace: LX Pin Switching Waveform, 2 V/div

Middle Trace: Output Ripple Voltage, 20 mV/div

Lower Trace: Inductor Current, 1 A/div

Time Scale: 1.0 ms/div

(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)

Upper Trace: LX Pin Switching Waveform, 2 V/div

Middle Trace: Output Ripple Voltage, 20 mV/div

Lower Trace: Inductor Current, 1 A/div

Time Scale: 1.0 ms/div

Figure 15. DCM Switching Waveform for

VOUT = 3.3 V

Figure 16. CCM Switching Waveform for

VOUT = 3.3 V

(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)

Upper Trace: LX Pin Switching Waveform, 2 V/div

Middle Trace: Output Ripple Voltage, 20 mV/div

Lower Trace: Inductor Current, 200 mA/div

Time Scale: 1.0 ms/div

(VIN = 5 V, ILOAD = 400 mA, L = 3.3 mH, COUT = 2 x 22 mF)

Upper Trace: LX Pin Switching Waveform, 2 V/div

Middle Trace: Output Ripple Voltage, 20 mV/div

Lower Trace: Inductor Current, 1 A/div

Time Scale: 1.0 ms/div

Figure 17. DCM Switching Waveform for

VOUT = 1.2 V

Figure 18. CCM Switching Waveform for

VOUT = 1.2 V

(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)

Upper Trace: EN Pin Voltage, 2 V/div

Middle Trace: Output Voltage, 1 V/div

Lower Trace: Inductor Current, 100 mA/div

Time Scale: 500 ms/div

(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)

Upper Trace: EN Pin Voltage, 2 V/div

Middle Trace: Output Voltage, 1 V/div

Lower Trace: Inductor Current, 100 mA/div

Time Scale: 500 ms/div

ure 19. Soft−Start Waveforms for V

OUT

= 3.3 V Fi

ure 20. Soft−Start Waveforms for V

OUT

= 1.2 V

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(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)

Upper Trace: Output Dynamic Voltage, 100 mV/div

Lower Trace: Output Current, 500 mA/div

Time Scale: 200 ms/div

(VIN = 5 V, ILOAD = 100 mA, L = 3.3 mH, COUT = 2 x 22 mF)

Upper Trace: Output Dynamic Voltage, 100 mV/div

Lower Trace: Output Current, 500 mA/div

Time Scale: 200 ms/div

(VIN = 5 V, ILOAD = 100 mA, L = 3.3 H, COUT = 2 x 22 mF)

Upper Trace: Output Dynamic Voltage, 100 mV/div

Lower Trace: Output Current, 500 mA/div

Time Scale: 200 ms/div

(VIN = 5 V, ILOAD = 100 mA, L = 3.3 H, COUT = 2 x 22 mF)

Upper Trace: Output Dynamic Voltage, 100 mV/div

Lower Trace: Output Current, 500 mA/div

Time Scale: 200 ms/div

Figure 21. Transient Response for VOUT =

3.3 V

Figure 22. Transient Response for VOUT =

3.3 V

Figure 23. Transient Response for VOUT =

1.2 V

Figure 24. Transient Response for VOUT =

1.2 V

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DETAILED DESCRIPTION

Overview

The NCP1595/A/C is a synchronous PWM controller that

incorporates all the control and protection circuitry

necessary to satisfy a wide range of applications. The

NCP1595/A/C employs current mode control to provide fast

transient response, simple compensation, and excellent

stability. The features of the NCP1595/A/C include a

precision reference, fixed 1 MHz switching frequency, a

transconductance error amplifier, an integrated high−side

P−channel MOSFET and low−side N−Channel MOSFET,

internal soft−start, and very low shutdown current. The

protection features of the NCP1595/A/C include internal

soft−start, pulse−by−pulse current limit, and thermal

shutdown.

Reference Voltage

The NCP1595/A/C incorporates an internal reference that

allows output voltages as low as 0.8 V. The tolerance of the

internal reference is guaranteed over the entire operating

temperature range of the controller. The reference voltage is

trimmed using a test configuration that accounts for error

amplifier offset and bias currents.

Oscillator Frequency

A fixed precision oscillator is provided. The oscillator

frequency range is 1 MHz with $13% variation.

Transconductance Error Amplifier

The transconductance error amplifier’s primary function

is to regulate the converter’s output voltage using a resistor

divider connected from the converter’s output to the FB pin

of the controller, as shown in the applications Schematic. If

a Fault occurs, the amplifier’s output is immediately pulled

to GND and PWM switching is inhibited.

Internal Soft−Start

To limit the startup inrush current, an internal soft start

circuit is used to ramp up the reference voltage from 0 V to

its final value linearly. The internal soft start time is 1 ms

typically.

Output MOSFETs

The NCP1595/A/C includes low RDS(on), both high−side

P−channel and low−side N−channel MOSFETs capable of

delivering up to 1.5 A of current. When the controller is

disabled or during a Fault condition, the controller’s output

stage is tri−stated by turning OFF both the upper and lower

MOSFETs.

Adaptive Dead Time Gate Driver

In a synchronous buck converter, a certain dead time is

required between the low side drive signal and high side

drive signal to avoid shoot through. During the dead time,

the body diode of the low side FET freewheels the current.

The body diode has much higher voltage drop than that of

the MOSFET, which reduces the efficiency significantly.

The longer the body diode conducts, the lower the

efficiency. In NCP1595/A/C, the drivers and MOSFETs are

integrated in a single chip. The parasitic inductance is

minimized. Adaptive dead time control method is used to

prevent the shoot through from happening and minimizing

the diode conduction loss at the same time.

Pulse Width Modulation

A high−speed PWM comparator, capable of pulse widths

as low as 50 ns, is included in the NCP1595/A/C. The

inverting input of the comparator is connected to the output

of the error amplifier. The non−inverting input is connected

to the the current sense signal. At the beginning of each

PWM cycle, the CLK signal sets the PWM flip−flop and the

upper MOSFET is turned ON. When the current sense signal

rises above the error amplifier’s voltage then the comparator

will reset the PWM flip−flop and the upper MOSFET will

be turned OFF.

Current Sense

The NCP1595/A/C monitors the current in the upper

MOSFET. The current signal is required by the PWM

comparator and the pulse−by−pulse current limiter.

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PROTECTIONS

Undervoltage Lockout (UVLO)

The under voltage lockout feature prevents the controller

from switching when the input voltage is too low to power

the internal power supplies and reference. Hysteresis must

be incorporated in the UVLO comparator to prevent IxR

drops in the wiring or PCB traces from causing ON/OFF

cycling of the controller during heavy loading at power up

or power down.

Overcurrent Protection (OCP)

NCP1595/A/C detects high side switch current and then

compares to a voltage level representing the overcurrent

threshold limit. If the current through the high side FET

exceeds the overcurrent threshold limit for seven

consecutive switching cycles, overcurrent protection is

triggered.

Once the overcurrent protection occurs, hiccup mode

engages. First, hiccup mode, turns off both FETs and

discharges the internal compensation network at the output

of the OTA. Next, the IC waits typically 2 ms and then resets

the overcurrent counter. After this reset, the circuit attempts

another normal soft−start. During soft−start, the overcurrent

protection threshold is increased to prevent false

overcurrent detection while charging the output capacitors.

Hiccup mode reduces input supply current and power

dissipation during a short circuit. It also allows for much

improved system up−time, allowing auto−restart upon

removal of a temporary short−circuit.

Power Save Mode

If the load current decreases, the converter can skip

switching and operate with reduced frequency. This

minimizes the quiescent current and maintains high

efficiency. NCP1595C disables this feature.

Pre−Bias Startup

In some applications the controller will be required to start

switching when it’s output capacitors are charged anywhere

from slightly above 0 V to just below the regulation voltage.

This situation occurs for a number of reasons: the

converter’s output capacitors may have residual charge on

them or the converter’s output may be held up by a low

current standby power supply. NCP1595/A/C supports

pre−bias start up by holding switching off until the soft−start

ramp reaches the FB Pin voltage.

Thermal Shutdown

The NCP1595/A/C protects itself from over heating with

an internal thermal monitoring circuit. If the junction

temperature exceeds the thermal shutdown threshold both

the upper and lower MOSFETs will be shut OFF.

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APPLICATION INFORMATION

Programming the Output Voltage

The output voltage is set using a resistive voltage divider

from the output voltage to FB pin (see Figure 25). So the

output voltage is calculated according to Eq.1.

Vout +VFB @R1)R2

(eq. 1)

Figure 25. Output divider

Vout

Inductor Selection

The inductor is the key component in the switching

regulator. The selection of inductor involves trade−offs

among size, cost and efficiency. The inductor value is

selected according to the equation 2.

L+Vout

f@Iripple

@ǒ1*Vout

Vin(max)Ǔ(eq. 2)

Where Vout − the output voltage;

f − switching frequency, 1.0 MHz;

Iripple − Ripple current, usually it’s 20% − 30% of output

current;

Vin(max) − maximum input voltage.

Choose a standard value close to the calculated value to

maintain a maximum ripple current within 30% of the

maximum load current. If the ripple current exceeds this

30% limit, the next larger value should be selected.

The inductor’s RMS current rating must be greater than

the maximum load current and its saturation current should

be about 30% higher. For robust operation in fault conditions

(start−up or short circuit), the saturation current should be

high enough. To keep the efficiency high, the series

resistance (DCR) should be less than 0.1 W, and the core

material should be intended for high frequency applications.

Output Capacitor Selection

The output capacitor acts to smooth the dc output voltage

and also provides energy storage. So the major parameter

necessary to define the output capacitor is the maximum

allowed output voltage ripple of the converter. This ripple is

related to capacitance and the ESR. The minimum

capacitance required for a certain output ripple can be

calculated by Equation 4.

COUT(min) +

Iripple

8@f@Vripple

(eq. 3)

Where Vripple is the allowed output voltage ripple.

The required ESR for this amount of ripple can be

calculated by equation 5.

ESR +

Vripple

Iripple

(eq. 4)

Based on Equation 2 to choose capacitor and check its

ESR according to Equation 3. If ESR exceeds the value from

Eq.4, multiple capacitors should be used in parallel.

Ceramic capacitor can be used in most of the applications.

In addition, both surface mount tantalum and through−hole

aluminum electrolytic capacitors can be used as well.

Maximum Output Capacitor

NCP1595/A/C family has internal 1 ms fixed soft−start

and overcurrent limit. It limits the maximum allowed output

capacitor to startup successfully. The maximum allowed

output capacitor can be determined by the equation:

Cout(max) +

Ilim(min) *Iload(max) *

Dip−p

VoutńTSS(min)

(eq. 5)

Where TSS(min) is the minimum soft−start period (1ms);

DiPP is the current ripple.

This is assuming that a constant load is connected. For

example, with 3.3 V/2.0 A output and 20% ripple, the max

allowed output capacitors is 546 mF.

Input Capacitor Selection

The input capacitor can be calculated by Equation 6.

Cin(min) +Iout(max) @Dmax @1

f@Vin(ripple)

(eq. 6)

Where Vin(ripple) is the required input ripple voltage.

Dmax +Vout

Vin(min)

is the maximum duty cycle. (eq. 7)

Power Dissipation

The NCP1595/A/C is available in a thermally enhanced

6−pin, DFN. When the die temperature reaches +185°C, the

NCP1595/A/C shuts down (see the Thermal−Overload

Protection section). The power dissipated in the device is the

sum of the power dissipated from supply current (PQ),

power dissipated due to switching the internal power

MOSFET (PSW), and the power dissipated due to the RMS

current through the internal power MOSFET (PON). The

total power dissipated in the package must be limited so the

junction temperature does not exceed its absolute maximum

rating of +150°C at maximum ambient temperature.

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Calculate the power lost in the NCP1595/A/C using the

following equations:

1. High side MOSFET

The conduction loss in the top switch is:

PHSON +I2RMS_HSFET RDS(on)HS (eq. 8)

Where:

IRMS_FET +ǒIout 2)

DIPP 2

12 Ǔ D

Ǹ(eq. 9)

DIPP is the peak−to−peak inductor current ripple.

The power lost due to switching the internal power high side

MOSFET is:

PHSSW +

Vin @Iout @ǒtr)tfǓ@fSW

(eq. 10)

tr and tf are the rise and fall times of the internal power

MOSFET measured at SW node.

2. Low side MOSFET

The power dissipated in the top switch is:

PLSON +IRMS_LSFET 2@RDS(on)LS (eq. 11)

Where:

IRMS_LSFET +ǒIout 2)

DIPP 2

12 Ǔ@(1*D)

Ǹ(eq. 12)

DIPP is the peak−to−peak inductor current ripple.

The switching loss for the low side MOSFET can be

ignored.

The power lost due to the quiescent current (IQ) of the device

is:

PQ+Vin @IQ(eq. 13)

IQ is the switching quiescent current of the NCP1595/A/C.

PTOTAL +PHSON )PHSSW )PLSON )PQ(eq. 14)

Calculate the temperature rise of the die using the following

equation:

TJ+TC)ǒPTOTAL @qJCǓ(eq. 15)

qJC is the junction−to−case thermal resistance equal to

1.7°C/W. TC is the temperature of the case and TJ is the

junction temperature, or die temperature. The

case−to−ambient thermal resistance is dependent on how

well heat can be transferred from the PC board to the air.

Solder the underside−exposed pad to a large copper GND

plane. If the die temperature reaches +185°C the

NCP1595/A/C shut down and does not restart again until the

die temperature cools by 40°C.

Layout Consideration

As with all high frequency switchers, when considering

layout, care must be taken in order to achieve optimal

electrical, thermal and noise performance. For 1.0MHz

switching frequency, switch rise and fall times are typically

in few nanosecond range. To prevent noise both radiated and

conducted the high speed switching current path must be

kept as short as possible. Shortening the current path will

also reduce the parasitic trace inductance of approximately

25 nH/inch. At switch off, this parasitic inductance

produces a flyback spike across the NCP1595/A/C switch.

When operating at higher currents and input voltages, with

poor layout, this spike can generate voltages across the

NCP1595/A/C that may exceed its absolute maximum

rating. A ground plane should always be used under the

switcher circuitry to prevent interplane coupling and overall

noise.

The FB component should be kept as far away as possible

from the switch node. The ground for these components

should be separated from the switch current path. Failure to

do so will result in poor stability or subharmonic like

oscillation.

Board layout also has a significant effect on thermal

resistance. Reducing the thermal resistance from ground pin

and exposed pad onto the board will reduce die temperature

and increase the power capability of the NCP1595/A/C. This

is achieved by providing as much copper area as possible

around the exposed pad. Adding multiple thermal vias under

and around this pad to an internal ground plane will also

help. Similar treatment to the inductor pads will reduce any

additional heating effects.

NCP1595, NCP1595A, NCP1595C

http://onsemi.com

PACKAGE DIMENSIONS

DFN6 3x3, 0.95P

CASE 506AH

ISSUE O

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

ÇÇÇ

PIN 1

REFERENCE

C0.15

TOP VIEW

C0.15

NOTES:

1. DIMENSIONS AND TOLERANCING PER ASME

Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMESNION b APPLIES TO PLATED TERMINAL

AND IS MEASURED BETWEEN 0.25 AND 0.30

MM FROM TERMINAL.

4. COPLANARITY APPLIES TO THE EXPOSED

PAD AS WELL AS THE TERMINALS.

3.31

0.130

0.63

0.025

2.60

0.1023

0.450

0.0177

1.700

0.685

ǒmm

inchesǓ

SCALE 10:1

0.950

0.0374

BOTTOM VIEW

0.10

0.05

CAB

(A3) C

C0.08

C0.10

SIDE VIEW A1

SEATING

PLANE

DIM MIN NOM MAX

MILLIMETERS

A0.80 0.90 1.00

A1 0.00 0.03 0.05

A3 0.20 REF

b0.35 0.40 0.45

D3.00 BSC

D2 2.40 2.50 2.60

E3.00 BSC

E2 1.50 1.60 1.70

e0.95 BSC

K0.21 −−− −−−

L0.30 0.40 0.50

(NOTE 3)

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reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any

particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without

limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications

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does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for

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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture

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NCP1595/D

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