1
LT1509
Power Factor and
PWM Controller
+
–
–
+
–
+–
+
–
+
+
–
–
+
+
–
I
M
=I
A2
I
B
200µA
2
11
16
13
+
–
–
+
415
19 18
1500 • BD01
V
SENSE
7.5V
7.9V
V
CC
16V TO 10V
14µA
14µA
7µA
7V to
4.7V
EA CA
CL
2.2V
M1
I
A
I
M
I
B
25k
1V
1.2V
14
VA
OUT
10
V
REF
7.5V
V
REF
12
M
OUT
8
I
SENSE
7
CA
OUT
6
C
SET
R
SET
RAMP V
C
50µA
0.7V
RUN
RUN
R
RQ
S
OSC
55%
DELAY
200ns
BLANKING
PK
LIM
5
GND1
3
V
CC
17
GTDR1
16V
16V
1
GND2
2
GTDR2
20
I
AC
9
OVP
SS1
SS2 PWM0K
+
–
+
–
+–
R
SQ
R
NOTE: PWM PULSE IS DELAYED BY 55% DUTY CYCLE AFTER PFC PULSE
BLOCK DIAGRAM
W
■
PFC and PWM Single Chip Solution
■
Synchronized Operation up to 300kHz
■
99% Power Factor over 20:1 Load Current Range
■
Current Mode PWM
■
Instantaneous Overvoltage Protection
■
Dedicated Overvoltage Protection (OVP Pin)
■
Minimal Line Current Dead Zone
■
Typical 250µA Start-Up Supply Current
■
Line Switching Noise Filter
■
Low Quiescent Current: 13mA
■
Fast 2A Peak Current Gate Drivers
■
Separate Soft Start Controls
The LT
®
1509 is a complete solution for universal off-line
switching power supplies utilizing active power factor
correction. The PFC section is identical to the LT1248 PFC
controller except the EN/SYNC pin is removed because
PFC and PWM are synchronized internally.
The current mode PWM section (the LT1508 is the volt-
age-mode counterpart) contains all the primary side func-
tions to convert the PFC preregulated high voltage output
to an isolated low voltage output. The PWM duty cycle is
internally limited to 47% (maximum 50%) to prevent
transformer saturation. PWM soft start begins when PFC
output reaches the preset voltage. In the event of brief line
loss, the PWM will be shut off when the PFC output voltage
drops below 73% of the preset value.
FEATURES
DESCRIPTION
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
Universal Power Factor Corrected Power Supplies
and Preregulators
APPLICATIONS
U
2
LT1509
the multiplier. Line current dead zone is minimized with
low bias voltage at the current input to the multiplier.
The LT1509 provides many protection features including
peak current limiting and overvoltage protection. Imple-
mented with a very high speed process, the LT1509 can be
operated at frequencies as high as 300kHz.
DESCRIPTION
U
PACKAGE/ORDER INFORMATION
W
UU
Supply Voltage ........................................................ 27V
GTDR Current Continuous ...................................... 0.5A
GTDR Output Energy ................................................ 5µJ
I
AC
, R
SET
, PK
LIM
Input Current.............................. 20mA
V
SENSE
, OVP Input Voltage .................................... V
MAX
RAMP, V
C
Input Voltage ............................................ 8V
I
SENSE
, M
OUT
Input Current................................... ±5mA
Operating Junction Temperature Range
Commercial ........................................... 0°C to 100°C
Industrial .......................................... –40°C to 125°C
Thermal Resistance (Junction-to-Ambient)
N Package ................................................... 100°C/W
SW Package ................................................ 120°C/W
ABSOLUTE MAXIMUM RATINGS
W
WW
U
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V,
VAOUT = 5V, OVP = VREF. No load on any outputs unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Overall
Supply Current (V
CC
in Undervoltage Lockout) V
CC
= Lockout Voltage –0.2V ●0.25 0.45 mA
Supply Current On 11.5V ≤ V
CC
≤ V
MAX
●13 19 mA
V
CC
Turn-On Threshold (Undervoltage Lockout) ●15.5 16.5 17.5 V
V
CC
Turn-Off Threshold ●9.5 10.5 11.5 V
Voltage Amplifier (PFC Section)
Voltage Amp Offset VA
OUT
= 3.5V ●–10 10 mV
Input Bias Current V
SENSE
= 0V to 7V ●–25 –250 nA
Voltage Gain 70 100 dB
Voltage Amp Unity-Gain Bandwidth 3 MHz
Voltage Amp Output High (Internally Clamped) ●11.3 13.3 V
Voltage Amp Output Low ●1.1 2 V
Voltage Amp Short-Circuit Current VA
OUT
= 0V ●3 8 17 mA
1
2
3
4
5
6
7
8
9
10
TOP VIEW
SW PACKAGE
20-LEAD PLASTIC SO WIDE
N PACKAGE
20-LEAD PDIP
20
19
18
17
16
15
14
13
12
11
GTDR1
GND2
GND1
CSET
PKLIM
CAOUT
ISENSE
MOUT
IAC
VAOUT
GTDR2
RAMP
VC
VCC
SS1
RSET
VSENSE
SS2
VREF
OVP
T
JMAX
= 125°C, θ
JA
= 100°C/ W (N)
T
JMAX
= 125°C, θ
JA
= 120°C/ W (SW)
ORDER PART
NUMBER
LT1509CN
LT1509CSW
LT1509IN
LT1509ISW
By using fixed high frequency PWM current averaging
without the need for slope compensation, the LT1509
achieves far lower line current distortion with a smaller
magnetic element than systems that use either peak
current detection, or zero current switching approach, in
both continuous and discontinuous modes of operation.
The LT1509 also provides filtering capability to reject line
switching noise which can cause instability when fed into
3
LT1509
ELECTRICAL C CHARA TERISTICS
Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V,
VAOUT = 5V, OVP = VREF. No load on any outputs unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Current Amplifier (PFC Section)
Current Amp Offset Voltage ●±1±4mV
I
SENSE
Bias Current ●–25 –250 nA
Current Amp Voltage Gain 80 110 dB
Current Amp Unity-Gain Bandwidth 3 MHz
Current Amp Output High ●7.2 8.5 V
Current Amp Output Low ●1.1 2 V
Current Amp Short-Circuit Current CA
OUT
= 0V ●3 8 17 mA
Input Range, I
SENSE
, M
OUT
(Linear Operation) ●–0.3 1 V
Reference
Reference Output Voltage I
REF
= 0mA, T
A
= 25°C 7.39 7.50 7.60 V
V
REF
Load Regulation –5mA < I
REF
< 0mA 5 mV
V
REF
Line Regulation 11.5V < V
CC
< V
MAX
●–20 5 20 mV
V
REF
Short-Circuit Current V
REF
= 0V ●12 28 50 mA
V
REF
Worst Case Load, Line, Temperature ●7.32 7.5 7.68 V
Current Limit
PK
LIM
Offset Voltage ●–25 25 mV
PK
LIM
Input Current PK
LIM
= –0.1V ●–50 –100 µA
PK
LIM
to GTDR Propagation Delay PK
LIM
Falling from 50mV to –50mV 400 ns
Multiplier
Multiplier Output Current I
AC
= 100µA, R
SET
= 15k 35 µA
Multiplier Output Current Offset R
AC
= 1M from I
AC
to GND ●–0.05 –0.5 µA
Multiplier Maximum Output Current I
AC
= 450µA, R
SET
= 15k, VA
OUT
= 7V, M
OUT
= 0V ●–286 –260 –235 µA
Multiplier Gain Constant (Note 1) 0.035 V
–2
I
AC
Input Resistance I
AC
from 50µA to 1mA 15 25 35 kΩ
Oscillator
Oscillator Frequency R
SET
= 15k, C
SET
= 1000pF ●85 100 115 kHz
R
SET
= 15k, C
SET
= 1500pF ●58 68 78 kHz
C
SET
Ramp Peak-to-Peak Amplitude 4.35 4.7 5.0 V
C
SET
Ramp Valley Voltage 1.15 1.3 1.55 V
Overvoltage Comparator (PFC Section)
Comparator Trip Voltage Ratio (V
TRIP
/V
REF
)●1.04 1.05 1.06
Hysteresis 0.35 V
OVP Bias Current OVP = 7.5V ●0.2 1 µA
OVP Propagation Delay 100 ns
Gate Drivers (GTDR1 and GTDR2)
Max Output Voltage 0mA Load, 18V < V
CC
●12 15 17.5 V
Output High –200mA Load, 11.5V ≤ V
CC
≤ 15V ●V
CC
– 3.0 V
Output Low (Device Unpowered) V
CC
= 0V, 50mA Load (Sinking) ●0.9 1.5 V
Output Low (Device Active) 200mA Load (Sinking) ●0.5 1.0 V
10mA Load ●0.2 0.4 V
Peak Output Current 10nF from GTDR to GND 2 A
Rise and Fall Time 1nF from GTDR to GND 25 ns
Max Duty Cycle (PFC) 90 96 %
Max Duty Cycle (PWM) (Note 2) 44 50 %
4
LT1509
ELECTRICAL C CHARA TERISTICS
VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = VREF. No load on any
outputs, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Soft Start Current
SS1 Current (PFC) SS1 = 2.5V ●51230 µA
SS2 Current (PWM) SS2 = 1V ●51230 µA
Comparators in PWM Section
RAMP Input Current RAMP = 0V, V
C
= 1.6V ●–0.3 –2 µA
Current Limit Comparator (CL) Threshold V
C
> 2.6V ●0.95 1.1 1.2 V
GTDR2 Switching Off Threshold at V
C
or at SS2 RAMP = 0V ●1V
V
C
Input Current V
C
= 0V ●–20 –80 µA
PWMOK Comparator Low Threshold (in Terms of V
REF
)●0.57 0.63 0.70
V
C
Pin High Voltage (LT1509) 1mA into V
C
Pin ●2.6 3.2 3.8 V
GTDR2 Turn-On Blanking Time 180 ns
I
M
I
AC
(VA
OUT
– 2)
2
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Multiplier Gain Constant: K =
Note 2: GTDR2 (PWM) pulse is delayed by 53% duty cycle after GTDR1
(PFC) is set. See PFC/PWM Synchronization graph in the Typical
Performance Characteristics section.
TYPICAL PERFORMANCE CHARACTERISTICS
UW
PFC Voltage Amplifier Open-Loop
Gain and Phase
FREQUENCY (Hz)
10
GAIN (dB)
100
80
60
40
20
0
–20 100 1k 10k 100k
LT1509 • TPC01
1M 10M
0
–20
–40
–60
–80
–100
–120
PHASE (DEG)
PHASE
GAIN
FREQUENCY (Hz)
10
GAIN (dB)
100
80
60
40
20
0
–20 100 1k 10k 100k
LT1509 • TPC02
1M 10M
0
–20
–40
–60
–80
–100
–120
PHASE (DEG)
PHASE
GAIN
PFC Current Amplifier Open-Loop
Gain and Phase
TIME
LT1509 TPC03
PFC (GTDR1)
53%
PWM (GTDR2)
PFC/PWM Synchronization
5
LT1509
TYPICAL PERFORMANCE CHARACTERISTICS
UW
Reference Voltage vs
Temperature
Supply Current vs Supply Voltage GTDR Rise and Fall Time Start-Up Supply Current vs
Supply Voltage
MOUT Pin CharacteristicsFrequency vs RSET and CSET
GTDR1 Maximum Duty Cycle vs
RSET and CSET
Multiplier Current
JUNCTION TEMPERATURE (°C)
–75
REFERENCE VOLTAGE (V)
75
7.536
7.524
7.512
7.500
7.488
7.476
7.464
7.452
7.440
7.428
LT1509 • TPC04
–50 150
–25 0 25 50 100 125
I
AC
(µA)
0
I
M
(µA)
300
150
0
LT1509 • TPC05
250 500
VA
OUT
= 7V
VA
OUT
= 6.5V
VA
OUT
= 6V
VA
OUT
= 5.5V
VA
OUT
= 5V
VA
OUT
= 4.5V
VA
OUT
= 4V
VA
OUT
= 3.5V
VA
OUT
= 3V
VA
OUT
= 2.5V
SUPPLY VOLTAGE (V)
10
SUPPLY CURRENT (mA)
16
15
14
13
12
11
10
9
8
7
6
5
LT1509 • TPC06
21 32
T
J
= 25°CT
J
= 125°C
T
J
= –55°C
LOAD CAPACITANCE (nF)
0
TIME (ns)
400
300
200
100
010 20 30 40
LT1509 • TPC07
50
RISE TIME
NOTE: GTDR SLEWS
BETWEEN 1V AND 16V
FALL TIME
SUPPLY VOLTAGE (V)
0
SUPPLY CURRENT (µA)
550
500
450
400
350
300
250
200
150
100
50
0
LT1509 • TPC08
20
125°C
–55°C
25°C
481216
2610
14 18
C
SET
CAPACITANCE (pF)
200
FREQUENCY (kHz)
500
450
400
350
300
250
200
150
100
50
0
LT1509 • TPC09
1400 2200
600 1000 1800
R
SET
= 10k
R
SET
= 15k
R
SET
= 20k
R
SET
= 30k
C
SET
CAPACITANCE (pF)
200
MAXIMUM DUTY CYCLE
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
0.92
0.91
0.90
LT1509 • TPC10
1400 2200
600 1000 1800
R
SET
= 10k
R
SET
= 15k
R
SET
= 20k
R
SET
= 30k
M
OUT
VOLTAGE (V)
M
OUT
CURRENT (mA)
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
LT1509 • TPC11
2.4
1.2
0
–1.2
–2.4
T
J
= 125°C
T
J
= 25°C
T
J
= –55°C
6
LT1509
TYPICAL PERFORMANCE CHARACTERISTICS
UW
RSET Voltage vs Current PKLIM Pin Characteristics
PFC SECTION
GTDR1 (Pin 1): The PFC MOSFET gate driver is a fast
totem pole output which is clamped at 15V. Capacitive
loads like the MOSFET gates may cause overshoot. A gate
series resistor of at least 5Ω will prevent the overshoot.
GND2 (Pin 2): Power Ground. High current spikes occur
in this line when either GTDR1 or GTDR2 switches low.
GND1 (Pin 3): Analog Ground.
C
SET
(Pin 4): The capacitor from this pin to GND and R
SET
determines oscillator frequency. The oscillator ramp is 5V
and the frequency = 1.5/(R
SET
C
SET
).
PK
LIM
(Pin 5): The threshold of the peak current limit
comparator is GND. To set current limit, a resistor divider
can be connected from V
REF
to current sense resistor.
CA
OUT
(Pin 6): This is the output of the current amplifier
that senses and forces the line current to follow the
reference signal that comes from the multiplier by com-
manding the pulse width modulator. When CA
OUT
is low,
the modulator has zero duty cycle.
I
SENSE
(Pin 7): This is the inverting input of the current
amplifier. This pin is clamped at –0.6V by an ESD protec-
tion diode.
M
OUT
(Pin 8): This is the multiplier high impedance
current output and the noninverting input of the current
amplifier. This pin is clamped at –0.6V and 3V.
I
AC
(Pin 9): This is the AC line voltage sensing input to the
multiplier. It is a current input that is biased at 2V to
minimize the crossover dead zone caused by low line
voltage. At the pin, a 25k resistor is in series with the
current input, so that a lowpass RC can be used to filter out
the switching noise coming down from the line with a high
line impedance environment.
VA
OUT
(Pin 10): This is the output of the voltage error
amplifier. The output is clamped at 13.5V. When the
output goes below 2.5V, the multiplier output current is
zero.
OVP (Pin 11): This is the input to the overvoltage com-
parator. The threshold is 1.05 times the reference voltage.
When the comparator trips, the multiplier, which is quickly
inhibited, blanks PFC switching to prevent further over-
shoot. This pin is also the input to the PWMOK comparator
that releases the PWM soft start (SS2) after the PFC output
gets close to the final voltage and has a hysteresis of
approximately 150V for 382V PFC output.
V
REF
(Pin 12): This is the 7.5V reference. When V
CC
goes
low, V
REF
will stay at 0V. V
REF
biases most of the internal
circuitry and can source up to 5mA externally.
V
SENSE
(Pin 14): This is the inverting input to the voltage
amplifier.
(For application help with the PFC portion of this chip, see the LT1248 data sheet)
PIN FUNCTIONS
UUU
R
SET
CURRENT (mA)
VR
SET
– V
REF
(mV)
120
100
80
60
40
20
0
–20
–40
–60
–80
–100
LT1509 • TPC12
–1.0
–0.8
–0.6
–0.4
–0.2
0
T
J
= 125°C
T
J
= 25°C
T
J
= –55°C
PK
LIM
VOLTAGE (V)
PK
LIM
CURRENT (µA)
–360
–300
–240
–180
–120
–60
0
60
120
180
240
300
LT1509 • TPC13
0.8
0.4
0
–0.4
–0.8
T
J
= 125°C
T
J
= 25°C
T
J
= –55°C
7
LT1509
R
SET
(Pin 15): A resistor from R
SET
to GND sets the
oscillator charging current and the maximum multiplier
output current which is used to limit the maximum line
current.
I
M(MAX)
= 3.75V/R
SET
SS1 (Pin 16): Soft Start. SS1 is reset to zero for low V
CC
.
When V
CC
rises above lockout threshold, SS1 is released
to ramp up at a rate set by the internal 12µA current source
and an external capacitor. During this ramp up, PFC
reference voltage is equal to SS1 voltage. After SS1 rises
past 7.5V, reference voltage remains at 7.5V.
V
CC
(Pin 17): This is the supply for the chip. The LT1509
has two fast gate drivers required to fast charge high
power MOSFET gate capacitances. Good supply bypass-
ing is required consisting of a 0.1µF ceramic capacitor in
parallel with a low ESR electrolytic capacitor (56µF or
higher) in close proximity to IC GND.
PWM SECTION
SS2 (Pin 13): PWM Soft Start. The comparator PWMOK
monitors the OVP pin and releases the SS2 after the PFC
output gets close to the final voltage.
V
C
(Pin 18): PWM current mode control voltage. Normally
connects to the optocoupler amplifier output. A pull-up
current of 50µA flows out of the pin.
RAMP (Pin 19): PWM current mode current sense input
with current limit set to 1V.
GTDR2 (Pin 20): The PWM MOSFET gate driver is a 1.5A
fast totem pole output. It is clamped at 15V. Capacitive
loads like the MOSFET gates may cause overshoot. A gate
series resistor of at least 5Ω will prevent the overshoot.
APPLICATIONS INFORMATION
WUU U
Voltage Error Amplifier (PFC Section)
The voltage error amplifier has a 100dB DC gain and 3MHz
unity-gain frequency. The output is internally clamped at
13.3V with V
CC
= 18V. Maximum error amp output voltage
decreases to V
CC
– 1.5V for V
CC
less than 12V. The
noninverting input is tied to the 7.5V
REF
through a diode
and can be pulled down with the SS1 pin. Referring to
Figure 1, V
OUT
= V
REF
[(R1 + R2)/R2]. With R1 = 1M and
R2 = 20k, V
OUT
= 382V. R1 through R4, C1 and C2 form the
compensation for the voltage loop. Gain of the voltage
error amp with the values shown is given by:
VA
OUT
V
OUT
= – 1 + j
(j)(f)(6.6)
f
1
f
11
1 + j
)
)
The small-signal gain for the remaining portion of the
voltage loop for frequencies below the current loop band-
width is (see Figure 2):
V
OUT
VA
OUT
V
IN
(5π)(j)(f)(C
OUT
)(V
OUT
)
(R
REF
)(P
IN
)
R
S
(R
IAC
+ 25k)
=
C1
0.47µF
V
REF
= 7.5V
1.05V
REF
OVERVOLTAGE
COMPARATOR
LT1509
R3
20k
R4
330k
C2
0.047µF
REGULATOR OUTPUT
V
OUT
= 382V
LT1509 • F01
V
SENSE
OVP
VA
OUT
ERROR AMP
R1
1M
R2
20k
–
+
–
+
Figure 1
(For application help with the PFC portion of this chip, see the LT1248 data sheet)
PIN FUNCTIONS
UUU
With V
IN
= 120VAC, P
IN
= 150W, R
S
= 0.15Ω, R
REF
= 4k,
R
IAC
= 1M, V
OUT
= 382V and C
OUT
= 470µF, V
OUT
/VA
OUT
=
85/(j)(f). At very low frequencies, the loop has a –40dB/
decade slope. Additional zero-pole compensation is added
at 1Hz and 11Hz. The resulting loop gain and phase margin
is shown in Figure 3. The unity-gain bandwidth is low
compared to 120Hz, which results in low distortion and a
high power factor.
8
LT1509
APPLICATIONS INFORMATION
WUU U
To avoid subharmonic oscillations, the amplified downslope
of the inductor current must be less than the slope of the
oscillator ramp.
V
CA(OUT)
V
RS
(V
OSC
)(L)(f
SW
)
(V
OUT
)(R
S
)
(5V)(500µH)(100k)
(382V)(0.15Ω)
≤
= = 4.4
If the current amplifier gain at 100kHz is less than 4.4,
there will be no subharmonic oscillation. The open-loop
gain of the current loop is given by:
V
RS
V
CA(OUT)
(V
OUT
)(R
S
)
(j)(2πf)(L)(V
OSC
)
3648
(j)(f)
(382V)(0.15Ω)
(j)(2πf)(500µH)(5V)
=
==
The current error amp, with R5 = 4k, R6 = 20k, C3 =
0.001µF and C4 = 300pF, provides zero pole compensa-
tion resulting in 16kHz loop crossover frequency. The
current amp gain at 100kHz is 1.7. The resulting current
loop gain and phase margin is shown in Figure 4.
V
IN
R
S
0.15Ω
L
V
IN
I
IN
I
M
R
REF
4k R5
4k
V
OUT
D1
C
OUT
470µF
C4
300pF
C3
0.001µF
R6
20k
I
SENSE
M
OUT
CA
OUT
–
+
CA
V
IN
R
IAC
1M
I
AC
1509 • F02
LT1509
+
–
Figure 2
FREQUENCY (Hz)
100
–40
CURRENT LOOP GAIN (dB)
PHASE MARGIN (DEG)
40
60
80
1k 10k 100k 1M
LT1509 • F04
20
0
–20
–30
30
45
60
15
0
–15
Figure 4
FREQUENCY (Hz)
0.1
–40
LOOP GAIN (dB)
PHASE MARGIN (DEG)
40
60
80
1 10 100 1k
LT1509 • F03
20
0
–20
–30
30
45
60
15
0
–15
Figure 3
Current Amplifier (PFC Section)
The current amplifier has a 110dB DC gain, 3MHz unity-
gain frequency and a 2V/µs slew rate. It is internally
clamped at 8.5V. Note that in the current averaging opera-
tion, high gain at twice the line frequency is necessary to
minimize line current distortion. Because CA
OUT
may need
to swing 5V over one line cycle at high line condition,
20mV AC will be needed at the inputs of the current
amplifier for a gain of 260 at 120Hz. Especially at light load
when the current loop reference signal is small, lower gain
will distort the reference signal and line current. But, if
signal gain at switching frequency is too high, the system
behaves more like a current mode system and can cause
subharmonic oscillation.
Multiplier
The multiplier has high noise immunity and superior
linearity over its full operating range. The current gain is
I
M
= (I
AC
I
EA2
)/(200µA
2
) with I
EA
= (VA
OUT
– 2V)/ 25k. The
error amplifier output voltage required at the input to the
multiplier is:
9
LT1509
(P
IN
)(R
S
)(25)(R
IAC
+ 25k)
(V
IN2
)(R
REF
)
VA
OUT
= 2 +
See Figure 2 for R
REF
.
VA
OUT
is squared in the multiplier, resulting in excellent
performance over a wide range of output power and input
voltage without the addition of feedforward line frequency
ripple. Care must be taken to avoid feeding switching
frequency noise into the multiplier from the I
AC
pin. An
internal 25k is provided in series with the low impedance
multiplier input so that only a capacitor from the I
AC
pin to
GND1 is required to filter noise. The maximum multiplier
output current, which ultimately limits the input line cur-
rent, is set by a resistor from the R
SET
pin to GND1
according to the formula: I
M(MAX)
= 3.75V/R
SET
. Figure 5
shows I
M
versus I
AC
for various values of VA
OUT.
Note that
Figure 5 data was taken with R
SET
= 15k.
APPLICATIONS INFORMATION
WUU U
The multiplier output acts as the command signal to the
current loop error amplifier. During steady-state operation
the voltage across R
REF
= (I
M
)(R
REF
) = (I
IN
)(R
S
). Based on
this the value for R
S
is determined by:
(I
M(MAX)
)(R
REF
)(V
IN
)(eff)
P
OUT
2
R
S
≤ √
with R
SET
= 15k, I
M(MAX)
= 3.75/15k = 250µA. For a 300W
converter with an efficiency (eff) of 0.8 at low line (90V
RMS
)
and R
REF
set to 4k, R
S
should be less than:
(250µA)(4k)(90VAC)(0.8)
300W 2 = 0.169Ω
√
A 0.15Ω resistor will yield a maximum peak input current
of (I
M(MAX)
)(R
REF
/R
S
) = (250µA)(4k)/0.15Ω = 6.67A. For
a 100kHz switching frequency with R
SET
= 15k, C
SET
= 1.5/
(100kHz)(15k) = 1nF. For added protection the LT1509
provides a second independent current limit comparator.
When the input voltage to the comparator (PK
LIM
pin) dips
below 0V, GTDR1 pin quickly goes low turning off the PFC
power switch. A resistor divider from V
REF
to R
S
(Figure 6)
senses the voltage across the line current sense resistor
(R
S
) and limits the peak input line current to [(7.5V/R1) +
50µA] (R2/R
S
). The 50µA represents the PK
LIM
input
current which flows out of the PK
LIM
pin. With R1 = 10k
and R2 = 1.8k, I
IN
= 9.6A peak above the 6.67A peak
average plus the input inductor peak ripple current.
Always use R
SET
to set the primary line current limit. The
PK
LIM
comparator is only for secondary protection. When
the line current reaches the primary limit, V
OUT
can no
longer be supported with the given input current and
begins to fall. System stability is maintained by the current
loop which is controlled by the current amplifier. When the
Oscillator Frequency and Maximum
Line Current Setting
The oscillator frequency is set by R
SET
and C
SET
. R
SET
is
the resistor from the R
SET
pin to GND1 and C
SET
is the
capacitor from the C
SET
pin to GND1. R
SET
should be
determined first. The oscillator frequency, which is equal
to the switching frequency for both the PFC and PWM
section, is determined by:
1.5
(R
SET
)(C
SET
)
f
OSC
=
I
AC
(µA)
0
I
M
(µA)
300
150
0
LT1509 • F05
250 500
VA
OUT
= 7V
VA
OUT
= 6.5V
VA
OUT
= 6V
VA
OUT
= 5.5V
VA
OUT
= 5V
VA
OUT
= 4.5V
VA
OUT
= 4V
VA
OUT
= 3.5V
VA
OUT
= 3V
VA
OUT
= 2.5V
Figure 5. Multiplier Current IM vs IAC and VAOUT
+
–
I
LINE
R
S
0.15
Ω
I
PKLIM
C1
1nF
7.5V V
REF
PK
LIM
C1 IS TO REJECT NOISE, CURRENT
LIMIT DELAY IS ABOUT 2µs
R2
1.8k R1
10k
–
+
LT1509 • F06
LT1509
Figure 6
10
LT1509
line current reaches the secondary limit, the comparator
takes over control and hysteresis may occur causing
audible noise.
Overvoltage Protection (PFC Section)
Because of the slow loop response necessary for power
factor correction, output overshoot can occur following a
sudden load reduction or removal. To protect downstream
components, the LT1509 provides an overvoltage com-
parator which senses the output voltage and quickly
reduces the line current demand. Referring back to Figure
1, V
OUT
is 382V and during normal operation, since no
current flows in R3, 7.5V appears at both the V
SENSE
and
OVP pins. When V
OUT
overshoots its preset value, the
overcurrent from R1 will flow through R2 as well as R3.
The voltage amplifier feedback will keep V
SENSE
at 7.5V.
Therefore, the equivalent AC resistance seen by the OVP
pin is R2 in parallel with R3 or 10k. With these values and
the overvoltage comparator trip level internally set at
1.05V
REF
, the comparator trips when V
OUT
overshoots
10%. Overvoltage trip level is given by:
R2 + R3
R3
(%)V
OUT
= 5%
()
For additional protection, the OVP pin can be connected
to V
OUT
through an independent resistor divider (see
Figure 7). This ensures overvoltage protection during
safety agency abnormal testing conditions, such as
opening R1 or shorting R2.
The output of the multiplier looks like a high impedance
current source. In the current loop, offset line current is
determined by multiplier offset current and input offset
voltage of the current error amplifier. A –4mV current
amplifier V
OS
translates to 27mA line current and 6.7W
input power for 250VAC
line if a 0.15Ω sense resistor is
used. Under a no-load condition or when the load power
is less than the offset output power, the offset line current
could slowly charge the output to an overvoltage level.
This is because the best the overvoltage comparator can
do is to reduce the multiplier output current to zero.
Unfortunately, this does not guarantee zero output current
if the current amplifier has offset. To regulate V
OUT
under
–
+
R4
1.05M
R5
20k
R1
1M
R2
20k
V
SENSE
OVP
ERROR
AMP
–
+
OVERVOLTAGE
COMPARATOR
0.047µF
V
OUT
0.47µF330k
VA
OUT
1.05V
REF
V
OUT
= 382V
OVERVOLTAGE = 420V
1509 • F07
LT1509
Figure 7
this condition, the amplifier M1 (see Block Diagram)
becomes active. When VA
OUT
reduces to 2.2V, M1 sup-
plies up to 7µA of current to the resistor at the I
SENSE
pin
in order to cancel a negative V
OS
and keep V
OUT
error to
within 2V.
Undervoltage Lockouts and Soft Start
The LT1509 turns on when V
CC
reaches 16V and remains
on until V
CC
falls below 10V, whereupon the chip enters the
lockout state. In the lockout state, the oscillator is off and
the V
REF
and gate driver pins remain low. A capacitor from
SS1 to GND1 determines the ramp-up time of the PFC
section. SS1 is released from a zero when V
CC
rises above
the lockout threshold. Once released, an internal 14µA
current source ramps the voltage error amplifier’s refer-
ence voltage to 7.5V. SS1 voltage then continues beyond
7.5V. A second capacitor from SS2 to GND1 determines
the start-up time from the PWM section. A PWMOK
comparator (see Block Diagram) holds SS2 low until the
OVP pin reaches 7V. This corresponds to the PFC output
voltage reaching approximately 93% of its preset voltage.
SS2 is diode coupled to the PMW comparator which is
connected to the V
C
pin by a second diode. Holding SS2
low at any time will disable PWM output. Once released,
the 14µA current source ramps the PWM comparator
APPLICATIONS INFORMATION
WUU U
11
LT1509
APPLICATIONS INFORMATION
WUU U
input up to V
C
and then the SS2 voltage continues beyond
V
C
. The PWMOK comparator contains hysteresis and will
pull SS2 low disabling the PWM section if the PFC output
voltage falls below approximately 62% of its preset value
(240V with nominal 382V output).
Start Up and Supply Voltage
The LT1509 draws only 250µA before the chip starts at
16V on V
CC
. To trickle start, a 91k resistor from the power
line to V
CC
supplies trickle current, and C4 holds V
CC
up
while switching starts (see Figure 8); then the auxiliary
winding takes over and supplies the operating current.
Note that D3 and the larger values of C3 are only necessary
for systems that have sudden large load variations down
to minimum load and/or very light load conditions. Under
these conditions the loop may exhibit a start/restart mode
because switching remains off long enough for C4 to
discharge below 10V. Large values for C3 will hold V
CC
up
until switching resumes. For less severe load variations D3
is replaced with a short and C3 is omitted. The turns ratio
between the primary winding determines V
CC
according to :
N
P
N
S
V
OUT
V
CC
– 2V =
for 382V V
OUT
and 18V V
CC
, Np/Ns ≈ 19.
Figure 8
V
CC
N
P
N
S
R1
91k
1W
C1
2µF
LT1509 • F08
+
+
C2
2µF
C3
390µF
+
C4
100µF
+
LINE MAIN INDUCTOR
D2
D3D1
Output Capacitor (PFC Section)
GTDR2 (PWM) pulse is synchronized to GTDR1 (PFC) pulse
with 53% duty cycle delay to reduce RMS ripple current in the
output capacitor. See PFC/PWM Synchronization graph in
the Typical Performance Characteristics section.
The peak-to-peak 120Hz PFC output ripple is determined by:
V
P-P
= 2I
LOAD(DC)
(Z)
where I
LOAD(DC)
is the DC load current of the PWM stage
and Z is the capacitor impedance at 120Hz.
For 470µF, impedance is 2.8Ω at 120Hz. At 335W load,
I
LOAD(DC)
= 335V/382V = 0.88A, V
P-P
= (2)(0.88)(2.8Ω) =
5V. If less ripple is desired higher capacitance should be
used. The selection of the output capacitor is based on
voltage ripple, hold-up time and ripple current. Assuming
the DC converter (PWM section) is designed to operate
with 240V to 382V
IN
, the minimum hold-up time is a
function of the energy storage capacity of the capacitor:
(0.5)C
OUT
P
OUT
t
HOLD
= (382V – 0.5V
P–P
)
2
– 240V
2
with C
OUT
= 470µF, V
P-P
= 11.5V, and P
OUT
= 335W,
t
HOLD
= 60ms which is 3.6 line cycles at 60Hz. The ripple
current can be divided into two major components. The
first is the 120Hz component which is related to the DC
load current as follows:
I
120HZ
≈ I
LOAD(DC)
2
√
The second component is made up of switching frequency
components due to the PFC stage charging the capacitor
and the PWM stage discharging the capacitor. For a 300W
output PFC forward converter running from an input
voltage of 100V
RMS
, the total high frequency ripple current
was measured to be 1.79A
RMS
.
For the United Chemicon KMH 450V capacitor series,
ripple current at 100kHz is specified 1.43 times higher
than the 120Hz limit.
12
LT1509
The total equivalent 120Hz ripple in the output capacitor
can be calculated by:
I
HF
1.43
I
RMS
=I
120HZ2
+
()
2
I
HF
= 100kHz Ripple Current.
For I
LOAD(DC)
= 0.88A, 1
120Hz
= 0.62A and the equivalent
120Hz ripple current is:
1.79
1.43
I
RMS
= = 1.4A
RMS
0.62
2
+
()
2
Table 1 lists the ripple current components from lab
measurements for various output powers and line volt-
ages. The 120Hz ripple current rating at 105°C ambient is
1.72A for the 470µF KMH 35mm × 50mm capacitor. The
expected life of the output capacitor may be calculated
from thermal stress analysis:
(105°C + ∆T
K
) – (T
A
+ ∆T
O
)
10
L = (L
O
)2
where
L = Expected life time
L
O
= Hours of load life at rated ripple current and rated
ambient temperature
∆T
K
= Capacitor internal temperature rise at rated
condition. ∆T
K
= (I
2
R)/(KA), where I is the rated cur-
rent, R is capacitor ESR and KA is a volume constant.
T
A
= Operating ambient temperature
∆T
O
= Capacitor internal temperature rise at operating
condition
Table 1. PFC Capacitor RMS Ripple Current
100W 200W 300W
V
INRMS
I
120HZ
I
HF
I
120HZ
I
HF
I
120HZ
I
HF
100 0.2 0.6 0.41 1.18 0.62 1.79
120 0.2 0.5 0.41 0.97 0.62 1.45
230 0.2 0.53 0.41 0.87 0.62 1.26
APPLICATIONS INFORMATION
WUU U
In our example, L
O
= 2000 hours assuming ∆T
K
= 5°C at
rated 1.72A. ∆T
O
can then be calculated from:
I
RMS
1.72A
∆T
O
= ∆T
K
= 5°C
()
2
1.4A = 3.3°C
1.72A
()
2
Assuming the operating ambient temperature is 60°C, the
approximate lifetime is:
(105°C + 5°C) – (60 + 3.3°C)
10
L = (2000)(2)
= 50,870 Hours
For longer life a capacitor with a higher ripple current rating
or parallel capacitors should be used.
PWM Comparators
The LT1509 includes two comparators in the PWM section
which implement peak current mode control. The primary
current sense voltage is fed into the RAMP pin. The V
C
or
Control Voltage pin sets the primary peak current level. An
additional current limit comparator turns GTDR2 off in the
event the RAMP pin voltage exceeds 1V. Referring to the
Block Diagram, there is a 1.2V offset between the RAMP
and V
C
pin. This feature simplifies the connection to an
optocoupler because the V
C
pin no longer has to be pulled
all the way to ground to inhibit switching. On-chip blanking
avoids reset due to leading edge noise.
Typical Application
Figure 9 shows a 24VDC, 300W power factor corrected,
universal input supply. The 2-transistor forward converter
offers many benefits including low peak currents,
nondissipative snubber, 500VDC switches and automatic
core reset guaranteed by the LT1509’s 50% maximum
duty cycle.
13
LT1509
Figure 9. 24V, 300W Off-Line PFC Supply
APPLICATIONS INFORMATION
WUU U
–
+
V
SENSE
OVP
I
AC
20k
1%
499k
1%
499k
1%
499k
1%
499k
1%
382VBUS
14
11
9
20k
1%
0.0047µF
GND2 GND1 C
SET
SS2 R
SET
SS1 V
CC
V
C
0.001µF1µF
FILM
1µF
FILM
0.047µF
200µF
15k
234 13 15 16
134
62 5
7
8
17 18
–
+
15V
0.01µF
RAMP
GTDR2
LT1509
VA
OUT
V
REF
V
REF
PK
LIM
GTDR1M
OUT
I
SENSE
CA
OUT
330k
RT1
10k
0.47µF
2.2k
0.001µF
0.047µF
1210 5 8 7 6 1
0.1µF
0.001µF
300pF
1.8k
4.02k
1%
4.02k
1% 20Ω20k
2k
330Ω
3.4k
1%
30.1k
1% 10Ω,
2W
V
REF
CNY17-3
COLL
1k
GND-F
V
+
GND-S
R
MID
REF
0.1µF100Ω
0.0022µF
R
TOP
COMP
1µF
63V
FILM
4700pF
"Y"
470µF, 50V
NICHICON
PL12,5X25
(× 3)
T2 7 TURNS
0.9" × 0.005" Cu
ETD44-P
LPRI = 3.1mH
OUTPUT COM
67µH
39T 12AWG
T150-52
2000pF
G1
FEP
30DP
(DUAL)
1000pF
10Ω
1W
24V
OUT
12.5A
100pF
2N2222A 2N2222A
100pF
220Ω
220Ω20k
2.2k
2N2907
24.9k
1%
10k
1%
V
REF
LT1431
V
IN
1N5819
20k 1N5819
1.2V
R1
0.15Ω
5W
BR1
0.1
"X"
0.1
"X" 0.1
"X"
4700pF
"Y"
4700pF
"Y"
1M
1/2W
20k
–
+
ERA82-004
ERA82-004
T1 2.2µF
50V 330µF
35V
2.2µF
50V
FUJI
ERA82-004
0.6A/40VR
MUR150
17 TURNS
26AWG
TRI-FILAR
17 TURNS
26AWG
TRI-FILAR
15V
91k
2W
T1
V
IN
382VBUS
MURH860CT
(DUAL)
C1
1µF
400V
IRFP450
470µF
450V
10Ω
1µF FILMT3 10Ω
10:15
TURNS
15V
1N965
(× 2) 20k
IRF840 MUR150
2200pF
"Y"
20ΩIRF840
0.51Ω, 2W
RG ALLEN
RPS2
(× 2)
NOTE: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTORS 1/4W, 5%
2. ALL CAPACITANCE VALUES IN MICROFARADS
RT1=KETEMA S65T SURGE GARD
T1 =COILTRONICS CTX02-12378-2, (407) 241-7876
T3 =BI TECHNOLOGY HM41-11510, (714) 447-2345
C1 =ELECTRONIC CONCEPTS 5MP12J105K
R1=JW MILLER/FUKUSHIMA MPC71
BR1=GENERAL INSTRUMENTS KBU6J
6A
FAST
90VAC TO
264VAC
–
+
470Ω
T2
19
20
++
+
+
+ +
+
+
Danger!! Lethal Voltages Present
In This Section
Danger!! Lethal Voltages Present
14
LT1509
APPLICATIONS INFORMATION
WUU U
An LT1431 reference/amplifier coupled to a low cost
optoisolator closes the loop from secondary side to pri-
mary side. Unity loop frequency is a conservative 3kHz.
Figure 10 shows the output voltage’s response with a 2A
to almost 10A current step. Output voltage is maintained
to within 0.5V during the load step. Efficiency versus
power and line voltage is shown in Figure 11. The PFC
preregulator alone has efficiency numbers between 90%
and 97% over line and load.
A 3-turn secondary added to the 70-turn primary of T1
bootstraps V
CC
to about 15V supplying the chip’s 13mA
requirement as well as about 39mA to cover the gate
current of the three FETs and high side transformer. A
0.15Ω sense resistor is used to sense input current and
servo to the command created by the outer voltage and
multiplier. Thus the input current follows the input line
voltage, and changes as necessary, in order to maintain
constant bank voltage. The forward converter sees a
voltage input of 382VDC unless the line voltage drops out,
in which case the 470µF main capacitor discharges to
240VDC before the PWM stage is shut down. Compared to
a typical off-line converter, the effective input voltage
range of the forward converter is much smaller, simplify-
ing the design. Additionally, the higher bus voltage pro-
vides greater hold-up times for given capacitor size.
Because the high side transformer effectively delays the
turn-on reverse recovery spike past the end of the built-in
blanking time, an external blanking transistor is needed.
Controlling the output current during an output short
circuit depends on the duty cycle reducing to a small
fraction of steady state. An additional transistor disables
blanking during turn-on and output short circuit.
5A/DIV
0.5V/DIV
Figure 10
Figure 11
V
RMS
90
EFFICIENCY (%)
80
85
250
LT1509 • F11
75
70 132 180
90
200W/300W
100W
30W
15
LT1509
Dimension in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTION
U
N Package
20-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
N20 0695
0.015
(0.381)
MIN
0.125
(3.175)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.018 ± 0.003
(0.457 ± 0.076)
0.005
(0.127)
MIN
0.100 ± 0.010
(2.540 ± 0.254)
0.255 ± 0.015*
(6.477 ± 0.381)
1.040*
(26.416)
MAX
12345678910
19 1112
131416 1517
18
20
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.025
–0.015
+0.635
–0.381
8.255
()
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
SW Package
20-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
SOL20 0695
NOTE 1
0.496 – 0.512*
(12.598 – 13.005)
20 19 18 17 16 15 14 13
12345678
0.394 – 0.419
(10.007 – 10.643)
910
1112
0.037 – 0.045
(0.940 – 1.143)
0.004 – 0.012
(0.102 – 0.305)
0.093 – 0.104
(2.362 – 2.642)
0.050
(1.270)
TYP 0.014 – 0.019
(0.356 – 0.482)
TYP
0° – 8° TYP
NOTE 1
0.009 – 0.013
(0.229 – 0.330) 0.016 – 0.050
(0.406 – 1.270)
0.291 – 0.299**
(7.391 – 7.595)
× 45°
0.010 – 0.029
(0.254 – 0.737)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
16
LT1509
PART NUMBER DESCRIPTION COMMENTS
LT1084 5A Low Dropout Linear Regulator Good for Post Regulation of Switching Power Supplies
LT1105 Simplified Off-Line Controller Solution for Universal Off-Line Inputs with Output to 100W
LT1241-5 High Frequency Current Mode PWM Controller Operates at Oscillator Frequencies up to 500kHz
LT1247 High Frequency Current Mode PWM Controller Operates at Oscillator Frequencies up to 1MHz
LT1248 Full-Feature Average Current Mode Power Factor Controller Provides All Features in 16-Lead Package
LT1249 Minimal Parts Count Power Factor Controller Simplified PFC Design
LT1508 Power Factor and PWM Controller Voltage Mode PWM
LINEAR TECHNOLOGY CORPORATION 1995
LT/GP 1295 10K • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX
: (408) 434-0507
●
TELEX
: 499-3977
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