853210BY www.icst.com/products/hiperclocks.html REV. A JANUARY 30, 2003
1
Integrated
Circuit
Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
GENERAL DESCRIPTION
The ICS853210 is a low skew, high perfor-
mance dual 1-to-5 Differential-to-2.5V/3.3V
LVPECL/ECL Fanout Buf fer and a member of
the HiPerClockS™ family of High Performance
Clock Solutions from ICS. The ICS853210
is characterized to operate from either a 2.5V or a 3.3V
power supply. Guaranteed output and part-to-part skew
characteristics make the ICS853210 ideal for those clock
distribution applications demanding well defined perfor-
mance and repeatability.
FEATURES
•2 differential 2.5V/3.3V LVPECL / ECL bank outputs
•2 differential clock input pairs
•PCLKx, nPCLKx pairs can accept the following
differential input levels: L VPECL, L VDS, CML, SSTL
•Maximum output frequency: >3GHz
•T ranslates any single ended input signal to 3.3V
L VPECL levels with resistor bias on nPCLKx input
•Output skew: 20ps (typical)
•Part-to-part skew: 85ps (typical)
•Propagation delay: TBD
•L VPECL mode operating voltage supply range:
VCC = 2.375V to 3.8V, VEE = 0V
•ECL mode operating voltage supply range:
VCC = 0V, VEE = -2.375V to -3.8V
•-40°C to 85°C ambient operating temperature
•Pin compatible with MC100EP210 and MC100L VEP210
BLOCK DIAGRAM PIN ASSIGNMENT
HiPerClockS™
,&6
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
QA0
nQA0
QA1
nQA1
QA2
nQA2
QA3
nQA3
QA4
nQA4
PCLKA
nPCLKA
QB0
nQB0
QB1
nQB1
QB2
nQB2
QB3
nQB3
QB4
nQB4
PCLKB
nPCLKB
ICS853210
24 23 22 21 20 19 18 17
1 2 3 4 5 6 7 8
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
QA3
nQA3
QA4
nQA4
QB0
nQB0
QB1
nQB1
VCCO
QB2
nQB2
QB3
nQB3
QB4
nQB4
VCCO
VCCO
nQA2
QA2
nQA1
QA1
nQA0
QA0
VCCO
VCC
nc
PCLKA
nPCLKA
VBB
PCLKB
nPCLKB
VEE
VBB
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
853210BY www.icst.com/products/hiperclocks.html REV. A JANUARY 30, 2003
2
Integrated
Circuit
Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
rebmuNemaNepyTnoitpircseD
1V
CC
rewoP.nipylppuseroC
2cndesunU.tcennocoN
3AKLCPtupnInwodlluP.tupnikcolclaitnereffidgnitrevni-noN
4AKLCPntupnIV.tupnikcolC
CC
.gnitaolftfelnehwtluafed2/
5V
BB
tuptuO.egatlovsaiB
6BKLCPtupnInwodlluP.tupnikcolclaitnereffidgnitrevni-noN
7BKLCPntupnIV.tupnikcolC
CC
.gnitaolftfelnehwtluafed2/
8V
EE
rewoP.nipylppusevitageN
23,52,9V
OCC
rewoP.snipylppustuptuO
11,014BQ,4BQntuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
31,213BQ,3BQntuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
51,412BQ,2BQntuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
81,711BQ,1BQntuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
02,910BQ,0BQntuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
22,124AQ,4AQntuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
42,323AQ,3AQntuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
72,622AQ,2AQntuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
92,821AQ,1AQntuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
13,030AQ,0AQntuptuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
:ETON
pulluP
dna
nwodlluP
.seulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotrefer
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
C
NI
ecnaticapaCtupnI 4Fp
R
PULLUP
rotsiseRpulluPtupnI 5.73KΩ
R
NWODLLUP
rotsiseRnwodlluPtupnI 57KΩ
TABLE 3. CLOCK INPUT FUNCTION TABLE
stupnIstuptuO edoMtuptuOottupnIytiraloP
roAKLCP BKLCP roAKLCPn BKLCPn ,4AQ:0AQ 4BQ:0BQ ,4AQn:0AQn 4BQn:0BQn
01WOLHGIHlaitnereffiDotlaitnereffiDgnitrevnInoN
10 HGIHWOLlaitnereffiDotlaitnereffiDgnitrevnInoN
01ETON;desaiBWOLHGIHlaitnereffiDotdednEelgniSgnitrevnInoN
11ETON;desaiBHGIHWOLlaitnereffiDotdednEelgniSgnitrevnInoN
1ETON;desaiB0HGIHWOLlaitnereffiDotdednEelgniSgnitrevnI
1ETON;desaiB1WOLHGIHlaitnereffiDotdednEelgniSgnitrevnI ."sleveLdednEelgniStpeccAottupnIlaitnereffiDehtgniriW",noitamrofnInoitacilppAehtotreferesaelP:1ETON
853210BY www.icst.com/products/hiperclocks.html REV. A JANUARY 30, 2003
3
Integrated
Circuit
Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VCC = 3.3V; VEE = 0V
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
CC
egatloVylppuSevitisoP 573.23.38.3V
I
EE
tnerruCylppuSrewoP DBTAm
TABLE 4B. LVPECL DC CHARACTERISTICS, VCC = 3.3V; VEE = 0V
ABSOLUTE MAXIMUM RATINGS
Supply V oltage, VCC 4.6V
Negative Supply V oltage, VEE -4.6V
Inputs, VI-0.5V to VCC + 0.5 V
Outputs, VO0.5V to VEE - 0.5V
VBB Sink/Source, IBB ± 0.5mA
Operating T emperature Range, T A -40°C to +85°C
Storage T emperature, TSTG -65°C to 150°C
Package Thermal Impedance, θJA 47.9°C/W (0 lfpm)
(Junction-to-Ambient)
Package Thermal Impedance, θJC 12°C/W to 17°C/W
(Junction-to-Case)
Wave Solder, TSOL 265°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage
to the device. These ratings are stress specifi-
cations only. Functional operation of product at
these conditions or any conditions beyond those
listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may
affect product reliability.
lobmySretemaraP C°04- C°52C°58 stinU
niMpyTxaMniMpyTxaMniMpyTxaM
V
HO
1ETON;egatloVhgiHtuptuO 0822Vm
V
LO
1ETON;egatloVwoLtuptuO 0841Vm
V
GNIWS
gniwSegatloVtuptuOkaeP-ot-kaeP DBTVm
V
BB
2ETON;ecnerefeRegatloVtuptuO DBTVm
V
PP
egatloVtupnIkaeP-ot-kaeP051DBTVm
V
RMC
egatloVhgiHtupnI 4,3ETON;egnaRedoMnommoC 2.13.3V
I
HI
tnerruChgiHtupnI BKLCP,AKLCP BKLCPn,AKLCPn 051Aµ
I
LI
tnerruCwoLtupnI BKLCP,AKLCP BKLCPn,AKLCPn 01- 051- Aµ
Vhtiw1:1yravsretemaraptuptuodnatupnI
CC
V.
EE
.V5.0-otV529.0+yravnac
05htiwdetanimretstuptuO:1ETON ΩVot
OCC
.V2- V.detimilsinoitarepotupnidedne-elgniS:2ETON
CC
≥.edomLCEPVLniV3
VsadenifedsiegatlovedomnommoC:3ETON
HI
.BKLCPn,BKLCPdnaAKLCPn,AKLCProfegatlovtupnimumixameht,snoitacilppadedne-elgnisroF:4ETON Vsi
CC
.V3.0+
853210BY www.icst.com/products/hiperclocks.html REV. A JANUARY 30, 2003
4
Integrated
Circuit
Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
TABLE 4C. LVPECL DC CHARACTERISTICS, VCC = 2.5V; VEE = 0V
TABLE 4D. ECL DC CHARACTERISTICS, VCC = 0V; VEE = -2.375 TO -3.8V
lobmySretemaraP C°04-C°52C°58 stinU
niMpyTxaMniMpyTxaMniMpyTxaM
V
HO
1ETON;egatloVhgiHtuptuO 0841Vm
V
LO
1ETON;egatloVwoLtuptuO 086Vm
V
GNIWS
gniwSegatloVtuptuOkaeP-ot-kaeP DBTVm
V
PP
egatloVtupnIkaeP-ot-kaeP051DBTVm
V
RMC
egatloVhgiHtupnI 3,2ETON;egnaRedoMnommoC V
I
HI
tnerruChgiHtupnI BKLCP,AKLCP BKLCPn,AKLCPn 051Aµ
I
LI
tnerruCwoLtupnI BKLCP,AKLCP BKLCPn,AKLCPn 01- 051- Aµ
Vhtiw1:1yravsretemaraptuptuodnatupnI
CC
V.
EE
.V3.1otV521.0+yravnac
05htiwdetanimretstuptuO:1ETON ΩVot
OCC
.V2-
VsadenifedsiegatlovedomnommoC:2ETON
HI
.BKLCPn,BKLCPdnaAKLCPn,AKLCProfegatlovtupnimumixameht,snoitacilppadedne-elgnisroF:3ETON Vsi
CC
.V3.0+
lobmySretemaraP C°04-C°52C°58 stinU
niMpyTxaMniMpyTxaMniMpyTxaM
V
HO
1ETON;egatloVhgiHtuptuO 0201-Vm
V
LO
1ETON;egatloVwoLtuptuO 0281-Vm
V
GNIWS
gniwSegatloVtuptuOkaeP-ot-kaeP DBTVm
V
BB
2ETON;ecnerefeRegatloVtuptuO DBTVm
V
PP
egatloVtupnIkaeP-ot-kaeP051DBTVm
V
RMC
egatloVhgiHtupnI 4,3ETON;egnaRedoMnommoC V
EE
2.1+0.0V
I
HI
tnerruChgiHtupnI
,AKLCP BKLCP ,AKLCPn BKLCPn
051Aµ
I
LI
tnerruCwoLtupnI
,AKLCP BKLCP ,AKLCPn BKLCPn
01- 051- Aµ
Vhtiw1:1yravsretemaraptuptuodnatupnI
CC
.
05htiwdetanimretstuptuO:1ETON ΩVot
OCC
.V2- V.detimilsinoitarepotupnidedne-elgniS:2ETON
EE
−≤ .edomLCEniV3
VsadenifedsiegatlovedomnommoC:3ETON
HI
.BKLCPn,BKLCPdnaAKLCPn,AKLCProfegatlovtupnimumixameht,snoitacilppadedne-elgnisroF:4ETON Vsi
CC
.V3.0+
853210BY www.icst.com/products/hiperclocks.html REV. A JANUARY 30, 2003
5
Integrated
Circuit
Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
TABLE 5. AC CHARACTERISTICS, VCC = 0V; VEE = -2.375 TO -3.8V OR VCC = 2.375 TO 3.8V ; VEE = 0V
lobmySretemaraP C°04-C°52C°58 stinU
niMpyTxaMniMpyTxaMniMpyTxaM
f
XAM
ycneuqerFtuptuO3>zHG
t
DP
1ETON;yaleDnoitagaporP DBTsp
t
)o(ks4,2ETON;wekStuptuO02sp
t
)pp(ks4,3ETON;wekStraP-ot-traP58sp
t
R
/t
F
emiTllaF/esiRtuptuO%08ot%02DBTsp
.tniopgnissorctuptuolaitnereffidehtottniopgnissorctupnilaitnereffidehtmorfderusaeM:1ETON .snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON .stniopssorclaitnereffidtuptuoehttaderusaeM segatlovylppusemasehttagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:3ETON derusaemerastuptuoeht,ecivedhcaenostupnifoepytemasehtgnisU.snoitidnocdaollauqehtiwdna .stniopssorclaitnereffidehtta .56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:4ETON
853210BY www.icst.com/products/hiperclocks.html REV. A JANUARY 30, 2003
6
Integrated
Circuit
Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
PARAMETER MEASUREMENT INFORMATION
3.3V OUTPUT LOAD AC TEST CIRCUIT DIFFERENTIAL INPUT LEVEL
OUTPUT SKEW
PART-TO-PART SKEW
OUTPUT RISE/FALL TIME PROPAGATION DELAY
V
CMR
Cross Points
V
PP
VEE
nPCLKA,
nPCLKB
VCC
PCLKA,
PCLKB
SCOPE
Qx
nQx
LVPECL
VCC, VCCO = 2V
VEE = -0.375V to -1.8V
tsk(pp)
tsk(o)
nQx
Qx
nQy
Qy
PART 1
PART 2
nQx
Qx
nQy
Qy
Clock Outputs 20%
80% 80%
20%
t
R
t
F
V
SWING
t
PD
nPCLKA,
nPCLKB
QA0:QA4,
QB0:QB4,
nQA0:nQA4,
nQB0:nQB4,
PCLKA,
PCLKB
853210BY www.icst.com/products/hiperclocks.html REV. A JANUARY 30, 2003
7
Integrated
Circuit
Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
The clock layout topology shown below is a typical termina-
tion for L VPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that gen-
erate ECL/L VPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must
be used for functionality. These outputs are designed to drive
3.3V
FOUT FIN
52Zo
Zo
52
Zo
32Zo
32
Zo = 50Ω
Zo = 50Ω
RTT = 1
(VOH + VOL / VCC –2) –2Zo
Zo = 50Ω
Zo = 50Ω
50Ω
50Ω
RTT
VCC - 2V
FIN
FOUT
➤
50Ω transmission lines. Matched impedance techniques should
be used to maximize operating frequency and minimize signal
distortion.
Figures 2A and 2B
show two different layouts which
are recommended only as guidelines. Other suitable clock lay-
outs may exist and it would be recommended that the board
designers simulate to guarantee compatibility across all printed
circuit and clock component process variations.
TERMINATION FOR LVPECL OUTPUTS
FIGURE 2B. LVPECL OUTPUT TERMINATIONFIGURE 2A. LVPECL OUTPUT TERMINATION
Figure 1
shows an example of the differential input that can
be wired to accept single ended levels. The reference voltage
level VBB generated from the device is connected to the
APPLICATION INFORMATION
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
CLK_IN
C1
0.1uF
VDD(or VCC)
+
-
VBB
negative input. The C1 capacitor should be located as close
as possible to the input pin.
853210BY www.icst.com/products/hiperclocks.html REV. A JANUARY 30, 2003
8
Integrated
Circuit
Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS853210 is: 437
TABLE 6. θJAVS. AIR FLOW TABLE
qJA by Velocity (Linear Feet per Minute)
0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 67.8°C/W 55.9°C/W 50.1°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 47.9°C/W 42.1°C/W 39.4°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
853210BY www.icst.com/products/hiperclocks.html REV. A JANUARY 30, 2003
9
Integrated
Circuit
Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
PACKAGE OUTLINE - Y SUFFIX
TABLE 7. PACKAGE DIMENSIONS
Reference Document: JEDEC Publication 95, MS-026
NOITAIRAVCEDEJ SRETEMILLIMNISNOISNEMIDLLA
LOBMYS ABB
MUMINIMLANIMONMUMIXAM
N23
A----06.1
1A 50.0--51.0
2A 53.104.154.1
b03.073.054.0
c90.0--02.0
DCISAB00.9
1D CISAB00.7
2D .feR06.5
ECISAB00.9
1E CISAB00.7
2E .feR06.5
eCISAB08.0
L54.006.057.0
q0
°
-- 7
°
ccc ----01.0
853210BY www.icst.com/products/hiperclocks.html REV. A JANUARY 30, 2003
10
Integrated
Circuit
Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
PRELIMINARY
TABLE 8. ORDERING INFORMATION
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
rebmuNredrO/traPgnikraMegakcaPtnuoCerutarepmeT
YB012358SCIYB201358SCIPFQLdael23yartrep052C°58otC°04-
TYB012358SCIYB012358SCIleeRdnaepaTnoPFQLdael230001C°58otC°04-
