74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer Rev. 5 -- 13 December 2011 Product data sheet 1. General description The 74HC4067; 74HCT4067 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4067B. The device is specified in compliance with JEDEC standard no. 7A. The 74HC4067; 74HCT4067 is a 16-channel analog multiplexer/demultiplexer with four address inputs (S0 to S3), an active-LOW enable input (E), sixteen independent inputs/outputs (Y0 to Y15) and a common input/output (Z). The 74HC4067; 74HCT4067 contains sixteen bidirectional analog switches, each with one side connected to an independent input/output (Y0 to Y15) and the other side connected to a common input/output (Z). With pin E = LOW, one of the sixteen switches is selected by pins S0 to S3 (low impedance ON-state). All unselected switches are in the high-impedance OFF-state. With pin E = HIGH, all switches are in the high-impedance OFF-state, independent of pins S0 to S3. The analog inputs/outputs (Y0 to Y15, and Z) can swing between VCC as a positive limit and GND as a negative limit. VCC to GND may not exceed 10 V. 2. Features and benefits Low ON resistance: 80 (typical) at VCC = 4.5 V 70 (typical) at VCC = 6.0 V 60 (typical) at VCC = 9.0 V Typical `break before make' built-in 3. Applications Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC4067N 40 C to +125 C DIP24 plastic dual in-line package; 24 leads (600 mil); reverse bending SOT101-1 74HC4067D 40 C to +125 C SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 74HC4067DB 40 C to +125 C SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1 74HC4067PW 40 C to +125 C TSSOP24 plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1 74HC4067BQ 40 C to +125 C DHVQFN24 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 5.5 0.85 mm SOT815-1 74HCT4067N 40 C to +125 C DIP24 plastic dual in-line package; 24 leads (600 mil); reverse bending SOT101-1 74HCT4067D 40 C to +125 C SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 74HCT4067DB 40 C to +125 C SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1 74HCT4067PW 40 C to +125 C TSSOP24 plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1 74HCT4067BQ 40 C to +125 C DHVQFN24 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 5.5 0.85 mm 74HC4067 74HCT4067 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 SOT815-1 (c) NXP B.V. 2011. All rights reserved. 2 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 5. Functional diagram 10 11 14 13 9 S0 S1 S2 S3 10 8 11 7 14 6 13 5 4 3 2 23 22 21 20 19 18 17 E 15 16 1 Y0 15 Y1 Y2 Y3 Y4 Y5 1 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15 Z 0 16 x 0 15 3 G16 MUX/DMUX 9 0 8 1 7 2 6 3 5 4 4 5 3 6 2 7 23 8 22 9 21 10 20 11 19 12 18 13 17 14 16 15 001aag725 001aag726 Fig 1. Logic symbol Fig 2. IEC logic symbol Yn VCC VCC Z from logic GND 001aag729 Fig 3. Schematic diagram (one switch) 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 3 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 9 Y0 8 Y1 S0 10 7 Y2 6 Y3 S1 11 5 Y4 4 Y5 S2 14 3 Y6 S3 13 23 Y8 2 Y7 1-OF-16 DECODER 22 Y9 21 Y10 20 Y11 19 Y12 18 Y13 17 Y14 16 Y15 E 15 1 Z 001aag727 Fig 4. Functional diagram 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 4 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer Y0 Y1 Y2 Y3 Y4 S0 Y5 Y6 Y7 S1 Y8 Y9 Y10 S2 Y11 Y12 Y13 S3 Y14 Y15 E Z 001aag728 Fig 5. Logic diagram 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 5 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 6. Pinning information 6.1 Pinning 74HC4067 74HCT4067 24 VCC 2 23 Y8 Y5 Y4 Y3 Y2 Y1 Y0 22 Y9 3 21 Y10 4 5 20 Y11 19 Y12 6 18 Y13 7 17 Y14 8 9 16 Y15 S0 10 23 Y8 3 22 Y9 Y5 4 21 Y10 Y4 5 20 Y11 Y3 6 19 Y12 Y2 7 18 Y13 Y1 8 17 Y14 Y0 9 S0 10 15 E 13 S3 GND 12 16 Y15 VCC(1) 15 E S1 11 14 S2 S1 11 2 Y6 14 S2 GND 12 Y6 Y7 001aag730 S3 13 1 1 Z Y7 Z terminal 1 index area 24 VCC 74HC4067 74HCT4067 001aag731 Transparent top view (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to VCC. Fig 6. Pin configuration for DIP24, SO24, SSOP24 and TSSOP24 Fig 7. Pin configuration for DHVQFN24 6.2 Pin description Table 2. Pin description Symbol Pin Description Z 1 common input or output Y7, Y6, Y5, Y4, Y3, Y2, Y1, Y0, Y15, Y14, Y13, Y12, Y11, Y10, Y9, Y8 2, 3, 4, 5, 6, 7, 8, 9, 16, 17, 18, 19, 20, 21, 22, 23 independent input or output S0, S1, S3, S2 10, 11, 13, 14 address input 0 GND 12 ground (0 V) E 15 enable input (active LOW) VCC 24 supply voltage 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 6 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 7. Functional description Table 3. Function table[1] Inputs Channel ON E S3 S2 S1 S0 L L L L L Y0 to Z L L L L H Y1 to Z L L L H L Y2 to Z L L L H H Y3 to Z L L H L L Y4 to Z L L H L H Y5 to Z L L H H L Y6 to Z L L H H H Y7 to Z L H L L L Y8 to Z L H L L H Y9 to Z L H L H L Y10 to Z L H L H H Y11 to Z L H H L L Y12 to Z L H H L H Y13 to Z L H H H L Y14 to Z L H H H H Y15 to Z H X X X X - [1] H = HIGH voltage level; L = LOW voltage level; X = don't care. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current ISK Min Max Unit 0.5 +11.0 V VI < 0.5 V or VI > VCC + 0.5 V - 20 mA switch clamping current VSW < 0.5 V or VSW > VCC + 0.5 V - 20 mA ISW switch current VSW = 0.5 V to VCC + 0.5 V - 25 mA ICC supply current - 50 mA IGND ground current - 50 mA Tstg storage temperature 65 +150 C 74HC_HCT4067 Product data sheet Conditions [1] All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 7 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer Table 4. Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Ptot total power dissipation Tamb = 40 C to +125 C P power dissipation Min Max Unit DIP24 package [2] - 750 mW SO24 package [3] - 500 mW SSOP24 package [4] - 500 mW TSSOP24 package [4] - 500 mW DHVQFN24 package [5] - 500 mW - 100 mW per switch [1] To avoid drawing VCC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn. In this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or GND. [2] For DIP24 package: Ptot derates linearly with 12 mW/K above 70 C. [3] For SO24 package: Ptot derates linearly with 8 mW/K above 70 C. [4] For SSOP24 and TSSOP24 packages: Ptot derates linearly with 5.5 mW/K above 60 C. [5] For DHVQFN24 package: Ptot derates linearly with 4.5 mW/K above 60 C. 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit 74HC4067 VCC supply voltage 2.0 5.0 10.0 V VI input voltage GND - VCC V GND - VSW switch voltage t/V input transition rise and fall rate VCC V VCC = 2.0 V - - 625 ns VCC = 4.5 V - 1.67 139 ns VCC = 6.0 V - - 83 ns - VCC = 10.0 V Tamb ambient temperature 31 ns 40 +25 +125 C 4.5 5.0 5.5 V 74HCT4067 VCC supply voltage VI input voltage GND - VCC V VSW switch voltage GND - VCC V t/V input transition rise and fall rate 1.67 139 ns Tamb ambient temperature +25 +125 C 74HC_HCT4067 Product data sheet VCC = 4.5 V 40 All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 8 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 10. Static characteristics Table 6. RON resistance per switch for types 74HC4067 and 74HCT4067 VI = VIH or VIL; for test circuit see Figure 8. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. For 74HC4067: VCC GND = 2.0 V, 4.5 V, 6.0 V and 9.0 V. For 74HCT4067: VCC GND = 4.5 V. Symbol RON(peak) Parameter ON resistance (peak) ON resistance (rail) Max [1] Max Max (85 C) (125 C) - - - - VCC = 4.5 V; ISW = 1000 A 110 180 225 270 VCC = 6.0 V; ISW = 1000 A 95 160 200 240 VCC = 9.0 V; ISW = 1000 A 75 130 165 195 150 - - - Vis = VCC to GND [1] Vis = GND or VCC VCC = 2.0 V; ISW = 100 A RON 40 C to +125 C Unit Typ VCC = 2.0 V; ISW = 100 A RON(rail) 25 C Conditions [1] VCC = 4.5 V; ISW = 1000 A 90 160 200 240 VCC = 6.0 V; ISW = 1000 A 80 140 175 210 VCC = 9.0 V; ISW = 1000 A 70 120 150 180 ON resistance mismatch Vis = VCC to GND between channels VCC = 2.0 V - - - - VCC = 4.5 V 9 - - - VCC = 6.0 V 8 - - - VCC = 9.0 V 6 - - - [1] At supply voltages (VCC GND) approaching 2 V, the analog switch ON resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital signals only, when using these supply voltages. 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 9 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer mnb047 110 (1) RON () VSW 90 VCC 70 E VIL Yn (2) Z (3) 50 Vis GND ISW 30 001aag733 10 0 1.8 3.6 5.4 7.2 9.0 Vis (V) Vis = 0 V to (VCC GND) Vis = 0 V to (VCC GND) (1) VCC = 4.5 V V SW R ON = --------I SW (2) VCC = 6.0 V (3) VCC = 9.0 V Fig 8. Test circuit for measuring RON Fig 9. Typical RON as a function of input voltage Vis Table 7. Static characteristics 74HC4067 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V VCC = 6.0 V 4.2 3.2 - V VCC = 9.0 V 6.3 4.7 - V VCC = 2.0 V - 0.8 0.5 V VCC = 4.5 V - 2.1 1.35 V VCC = 6.0 V - 2.8 1.80 V VCC = 9.0 V - 4.3 2.70 V VCC = 6.0 V - - 0.1 A VCC = 10.0 V - - 0.2 A per channel - - 0.1 A all channels - - 0.8 A - - 0.8 A Tamb = 25 C VIH VIL II IS(OFF) IS(ON) HIGH-level input voltage LOW-level input voltage input leakage current OFF-state leakage current ON-state leakage current 74HC_HCT4067 Product data sheet VI = VCC or GND VCC = 10.0 V; VI = VIH or VIL; VSW = VCC GND; see Figure 10 VCC = 10.0 V; VI = VIH or VIL; VSW = VCC GND; see Figure 11 All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 10 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer Table 7. Static characteristics 74HC4067 ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter Conditions ICC supply current VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND CI Min Typ Max Unit VCC = 6.0 V - - 8.0 A VCC = 10.0 V - - 16.0 A - 3.5 - pF VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 9.0 V 6.3 - - V VCC = 2.0 V - - 0.50 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.80 V VCC = 9.0 V - - 2.70 V VCC = 6.0 V - - 1.0 A VCC = 10.0 V - - 2.0 A per channel - - 1.0 A all channels - - 8.0 A - - 8.0 A VCC = 6.0 V - - 80.0 A VCC = 10.0 V - - 160 A input capacitance Tamb = 40 C to +85 C VIH VIL II IS(OFF) HIGH-level input voltage LOW-level input voltage input leakage current OFF-state leakage current VI = VCC or GND VCC = 10.0 V; VI = VIH or VIL; VSW = VCC GND; see Figure 10 IS(ON) ON-state leakage current VCC = 10.0 V; VI = VIH or VIL; VSW = VCC GND; see Figure 11 ICC supply current VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND Tamb = 40 C to +125 C VIH VIL II HIGH-level input voltage LOW-level input voltage input leakage current 74HC_HCT4067 Product data sheet VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 9.0 V 6.3 - - V VCC = 2.0 V - - 0.50 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.80 V VCC = 9.0 V - - 2.70 V VCC = 6.0 V - - 1.0 A VCC = 10.0 V - - 2.0 A VI = VCC or GND All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 11 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer Table 7. Static characteristics 74HC4067 ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter Conditions Min Typ Max Unit IS(OFF) OFF-state leakage current VCC = 10.0 V; VI = VIH or VIL; VSW = VCC GND; see Figure 10 per channel - - 1.0 A all channels - - 8.0 A - - 8.0 A VCC = 6.0 V - - 160 A VCC = 10.0 V - - 320 A Conditions Min Typ Max Unit IS(ON) ON-state leakage current VCC = 10.0 V; VI = VIH or VIL; VSW = VCC GND; see Figure 11 ICC supply current VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND Table 8. Static characteristics 74HCT4067 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter Tamb = 25 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 A IS(OFF) OFF-state leakage current VCC = 5.5 V; VI = VIH or VIL; VSW = VCC GND; see Figure 10 per channel - - 0.1 A all channels - - 0.8 A IS(ON) ON-state leakage current VCC = 5.5 V; VI = VIH or VIL; VSW = VCC GND; see Figure 11 - - 0.8 A ICC supply current VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND; VCC = 4.5 V to 5.5 V - - 8.0 A ICC additional supply current per input pin; VI = VCC 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V pin E - 60 216 A pin Sn - 50 180 A - 3.5 - pF CI input capacitance Tamb = 40 C to +85 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A IS(OFF) OFF-state leakage current VCC = 5.5 V; VI = VIH or VIL; VSW = VCC GND; see Figure 10 per channel - - 1.0 A all channels - - 8.0 A 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 12 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer Table 8. Static characteristics 74HCT4067 ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter Conditions Min Typ Max Unit IS(ON) ON-state leakage current VCC = 5.5 V; VI = VIH or VIL; VSW = VCC GND; see Figure 11 - - 8.0 A ICC supply current VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND; VCC = 4.5 V to 5.5 V - - 80.0 A ICC additional supply current per input pin; VI = VCC 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V pin E - - 270 A pin Sn - - 225 A Tamb = 40 C to +125 C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A IS(OFF) OFF-state leakage current VCC = 5.5 V; VI = VIH or VIL; VSW = VCC GND; see Figure 10 per channel - - 1.0 A all channels - - 8.0 A IS(ON) ON-state leakage current VCC = 5.5 V; VI = VIH or VIL; VSW = VCC GND; see Figure 11 - - 8.0 A ICC supply current VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND; VCC = 4.5 V to 5.5 V - - 160 A ICC additional supply current per input pin; VI = VCC 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V pin E - - 294 A pin Sn - - 245 A VCC VCC E VIH ISW Vis VIL Yn Z GND ISW ISW E Z Yn Vos Vis Vos GND 001aag734 001aag735 Vis = VCC and Vos = GND Vis = VCC and Vos = open Vis = GND and Vos = VCC Vis = GND and Vos = open Fig 10. Test circuit for measuring OFF-state leakage current 74HC_HCT4067 Product data sheet Fig 11. Test circuit for measuring ON-state leakage current All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 13 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 11. Dynamic characteristics Table 9. Dynamic characteristics 74HC4067 GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 14. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter 25 C Conditions Typ tpd propagation delay Yn to Z; see Figure 12 40 C to +125 C Unit Max Max Max (85 C) (125 C) [1][2] VCC = 2.0 V 25 75 95 110 ns VCC = 4.5 V 9 15 19 22 ns VCC = 6.0 V 7 13 16 19 ns VCC = 9.0 V 5 9 11 14 ns VCC = 2.0 V 18 60 75 90 ns VCC = 4.5 V 6 12 15 18 ns VCC = 6.0 V 5 10 13 15 ns 4 8 10 12 ns VCC = 2.0 V 74 250 315 375 ns VCC = 4.5 V 27 50 63 75 ns Z to Yn VCC = 9.0 V toff turn-off time E to Yn; see Figure 13 [3] VCC = 5.0 V; CL = 15 pF 27 - - - ns VCC = 6.0 V 22 43 54 64 ns VCC = 9.0 V 20 38 48 57 ns VCC = 2.0 V 83 250 315 375 ns VCC = 4.5 V 30 50 63 75 ns VCC = 5.0 V; CL = 15 pF 29 - - - ns VCC = 6.0 V 24 43 54 64 ns VCC = 9.0 V 21 38 48 57 ns VCC = 2.0 V 85 275 345 415 ns VCC = 4.5 V 31 55 69 83 ns VCC = 6.0 V 25 47 59 71 ns VCC = 9.0 V 24 42 53 63 ns VCC = 2.0 V 94 290 365 435 ns VCC = 4.5 V 34 58 73 87 ns VCC = 6.0 V 27 47 62 74 ns VCC = 9.0 V 25 45 56 68 ns Sn to Yn E to Z Sn to Z 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 14 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer Table 9. Dynamic characteristics 74HC4067 ...continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 14. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter ton turn-on time 25 C Conditions 40 C to +125 C Unit Typ Max VCC = 2.0 V 80 275 345 415 ns VCC = 4.5 V 29 55 69 83 ns VCC = 5.0 V; CL = 15 pF 26 - - - ns VCC = 6.0 V 23 47 59 71 ns VCC = 9.0 V 17 42 53 63 ns VCC = 2.0 V 88 300 375 450 ns VCC = 4.5 V 32 60 75 90 ns VCC = 5.0 V; CL = 15 pF 29 - - - ns VCC = 6.0 V 26 51 64 77 ns VCC = 9.0 V 18 45 56 68 ns VCC = 2.0 V 85 275 345 415 ns VCC = 4.5 V 31 55 69 83 ns VCC = 6.0 V 25 47 59 71 ns VCC = 9.0 V 18 42 53 63 ns VCC = 2.0 V 94 300 375 450 ns VCC = 4.5 V 34 60 75 90 ns VCC = 6.0 V 27 51 64 77 ns 19 45 56 68 ns 29 - - - pF E to Yn; see Figure 13 Max Max (85 C) (125 C) [4] Sn to Yn E to Z Sn to Z VCC = 9.0 V power dissipation capacitance CPD per switch; VI = GND to VCC [5] [1] tpd is the same as tPHL and tPLH. [2] Due to higher Z terminal capacitance (16 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal. [3] ton is the same as tPHZ and tPLZ. [4] toff is the same as tPZH and tPZL. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi + {(CL + Csw) VCC2 fo} where: fi = input frequency in MHz; fo = output frequency in MHz; {(CL + Csw) VCC2 fo} = sum of outputs; CL = output load capacitance in pF; Csw = switch capacitance in pF; VCC = supply voltage in V. 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 15 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer Table 10. Dynamic characteristics 74HCT4067 GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 14. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter propagation delay tpd 25 C Conditions 40 C to +125 C Unit Typ Max 9 15 19 22 ns 6 12 15 18 ns VCC = 4.5 V 26 55 69 83 ns VCC = 5.0 V; CL = 15 pF 26 - - - ns VCC = 4.5 V 31 55 69 83 ns VCC = 5.0 V; CL = 15 pF 30 - - - ns 30 60 75 90 ns 35 60 75 90 ns VCC = 4.5 V 32 60 75 90 ns VCC = 5.0 V; CL = 15 pF 32 - - - ns VCC = 4.5 V 35 60 75 90 ns VCC = 5.0 V; CL = 15 pF 33 - - - ns 38 65 81 98 ns 38 65 81 98 ns 29 - - - pF Yn to Z; see Figure 12 Max Max (85 C) (125 C) [1][2] VCC = 4.5 V Z to Yn VCC = 4.5 V turn-off time toff E to Yn; see Figure 13 [3] Sn to Yn E to Z VCC = 4.5 V Sn to Z VCC = 4.5 V turn-on time ton E to Yn; see Figure 13 [4] Sn to Yn E to Z VCC = 4.5 V Sn to Z VCC = 4.5 V power dissipation capacitance CPD per switch; VI = GND to (VCC 1.5 V) [5] [1] tpd is the same as tPHL and tPLH. [2] Due to higher Z terminal capacitance (16 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal. [3] ton is the same as tPHZ and tPLZ. [4] toff is the same as tPZH and tPZL. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi + {(CL + Csw) VCC2 fo} where: fi = input frequency in MHz; fo = output frequency in MHz; {(CL + Csw) VCC2 fo} = sum of outputs; CL = output load capacitance in pF; Csw = switch capacitance in pF; VCC = supply voltage in V. 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 16 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 12. Waveforms 50 % Vis input tPLH tPHL 50 % Vos output 001aad555 Fig 12. Input (Vis) to output (Vos) propagation delays VI E, Sn inputs VM 0V tPLZ tPZL 50 % Vos output 10 % tPHZ tPZH 90 % 50 % Vos output switch ON switch ON switch OFF 001aad556 Measurement points are shown in Table 11. Fig 13. Turn-on and turn-off times Table 11. Measurement points Type VI VM 74HC4067 VCC 0.5VCC 74HCT4067 3.0 V 1.3 V 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 17 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC Vis PULSE GENERATOR VCC Vos VI RL S1 open DUT RT CL GND 001aag732 Test data is given in Table 12. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistor. S1 = Test selection switch. Fig 14. Load circuitry for measuring switching times Table 12. Test data Test Input Output S1 position Control E Address Sn Switch Yn (Z) tr, tf Switch Z (Yn) VI[1] VI[1] Vis CL RL tPHL, tPLH GND GND or VCC GND to VCC 6 ns 50 pF - open tPHZ, tPZH GND to VCC GND to VCC VCC 6 ns 50 pF, 15 pF 1 k GND tPLZ, tPZL GND to VCC GND to VCC GND 6 ns 50 pF, 15 pF 1 k VCC [1] For 74HCT4067: maximum input voltage VI = 3.0 V. 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 18 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 13. Additional dynamic characteristics Table 13. Additional dynamic characteristics Recommended conditions and typical values; GND = 0 V; Tamb = 25 C. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter Conditions THD RL = 10 k; CL = 50 pF; see Figure 15 total harmonic distortion Min Typ Max Unit VCC = 4.5 V; Vis(p-p) = 4.0 V - 0.04 - % VCC = 9.0 V; Vis(p-p) = 8.0 V - 0.02 - % - 0.12 - % - 0.06 - % - 50 - dB - 50 - dB fi = 1 kHz fi = 10 kHz VCC = 4.5 V; Vis(p-p) = 4.0 V VCC = 9.0 V; Vis(p-p) = 8.0 V iso isolation (OFF-state) RL = 600 ; CL = 50 pF; see Figure 16 [1] VCC = 4.5 V VCC = 9.0 V f(-3dB) 3 dB frequency response switch capacitance Csw RL = 50 ; CL = 10 pF; see Figure 17 [2] VCC = 4.5 V - 90 - MHz VCC = 9.0 V - 100 - MHz independent pins Y - 5 - pF common pin Z - 45 - pF [1] Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 ). [2] Adjust input voltage Vis to 0 dBm level at Vos for fi = 1 MHz (0 dBm = 1 mW into 50 ). After set-up, fi is increased to obtain a reading of 3 dB at Vos. VCC VIL Vis VCC E 10 F fi 2RL Yn Z GND Vos 2RL CL D 001aag736 Fig 15. Test circuit for measuring total harmonic distortion 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 19 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 001aae332 0 iso (dB) -20 -40 -60 -80 -100 10 102 103 104 105 106 fi (kHz) a. Isolation (OFF-state) VCC VIH Vis VCC E 0.1 F 2RL Yn Z GND fi Vos 2RL CL dB 001aag737 b. Test circuit VCC = 4.5 V; GND = 0 V; RL = 600 ; Rsource = 1 k. Fig 16. Isolation (OFF-state) as a function of frequency 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 20 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 001aag739 5 Vos (dB) 0 -5 10 102 103 104 105 106 fi (kHz) a. Typical 3 dB frequency response VCC VCC VIL Vis E 0.1 F 2RL Yn Z GND fi Vos 2RL CL dB 001aag738 b. Test circuit VCC = 4.5 V; GND = 0 V; RL = 50 ; Rsource = 1 k. Fig 17. 3 dB frequency response 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 21 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 14. Package outline seating plane DIP24: plastic dual in-line package; 24 leads (600 mil) SOT101-1 ME D A2 L A A1 c e Z b1 w M (e 1) b MH 13 24 pin 1 index E 1 12 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 5.1 0.51 4 1.7 1.3 0.53 0.38 0.32 0.23 32.0 31.4 14.1 13.7 2.54 15.24 3.9 3.4 15.80 15.24 17.15 15.90 0.25 2.2 inches 0.2 0.02 0.16 0.066 0.051 0.021 0.015 0.013 0.009 1.26 1.24 0.56 0.54 0.1 0.6 0.15 0.13 0.62 0.60 0.68 0.63 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT101-1 051G02 MO-015 SC-509-24 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 18. Package outline SOT101-1 (DIP24) 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 22 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c HE y v M A Z 13 24 Q A2 A (A 3) A1 pin 1 index Lp L 1 12 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.01 0.019 0.013 0.014 0.009 0.61 0.60 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 inches 0.1 0.012 0.096 0.004 0.089 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT137-1 075E05 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 19. Package outline SOT137-1 (SO24) 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 23 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm D SOT340-1 E A X c HE y v M A Z 24 13 Q A2 A (A 3) A1 pin 1 index Lp L 1 12 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 8.4 8.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.8 0.4 8o o 0 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT340-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig 20. Package outline SOT340-1 (SSOP24) 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 24 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm D SOT355-1 E A X c HE y v M A Z 13 24 Q A2 (A 3) A1 pin 1 index A Lp L 1 12 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 7.9 7.7 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT355-1 REFERENCES IEC JEDEC JEITA MO-153 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 21. Package outline SOT355-1 (TSSOP24) 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 25 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm B D SOT815-1 A A E A1 c detail X terminal 1 index area C e1 terminal 1 index area e y1 C v M C A B w M C b 2 y 11 L 12 1 e2 Eh 24 13 23 14 X Dh 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 e2 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 5.6 5.4 4.25 3.95 3.6 3.4 2.25 1.95 0.5 4.5 1.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT815-1 --- --- --- EUROPEAN PROJECTION ISSUE DATE 03-04-29 Fig 22. Package outline SOT815-1 (DHVQFN24) 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 26 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 15. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT4067 v.5 20111213 Product data sheet - 74HC_HCT4067 v.4 Modifications: * Legal pages updated. 74HC_HCT4067 v.4 20110518 Product data sheet - 74HC_HCT4067 v.3 74HC_HCT4067 v.3 20071015 Product data sheet - 74HC_HCT4067_CNV v.2 Product specification - - 74HC_HCT4067_CNV v.2 19970901 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 27 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term `short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 28 of 30 74HC4067; 74HCT4067 NXP Semiconductors 16-channel analog multiplexer/demultiplexer Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT4067 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 13 December 2011 (c) NXP B.V. 2011. All rights reserved. 29 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 6 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 Functional description . . . . . . . . . . . . . . . . . . . 7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7 Recommended operating conditions. . . . . . . . 8 Static characteristics. . . . . . . . . . . . . . . . . . . . . 9 Dynamic characteristics . . . . . . . . . . . . . . . . . 14 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Additional dynamic characteristics . . . . . . . . 19 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 27 Legal information. . . . . . . . . . . . . . . . . . . . . . . 28 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 28 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Contact information. . . . . . . . . . . . . . . . . . . . . 29 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 13 December 2011 Document identifier: 74HC_HCT4067