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4-BIT BIDIRECTIONAL
UNIVERSAL SHIFT REGISTER
The MC74F194 is a high-speed 4-bit bidirectional universal shift register.
As a high-speed multifunctional, sequential building block, it is useful in a wide
variety of applications. It may be used in serial-serial, shift left, shift right,
serial-parallel, parallel-serial, and parallel-parallel data register transfers. The
F194 is similar in operation to the S195 universal shift register, with added
features of shift left without external connections and hold (do nothing) modes
of operation.
•Typical Shift Frequency of 150 MHz
•Asynchronous Master Reset
•Hold (Do Nothing) Mode
•Fully Synchronous Serial or Parallel Data Transfers
FUNCTIONAL DESCRIPTION
The F194 contains four edge-triggered D flip-flops and the necessary
interstage logic to synchronously perform shift right, shift left, parallel load and
hold operations. Signals applied to the Select (S0, S1) inputs determine the
type of operation, as shown in the Function Table. Signals on the Select,
Parallel data (P0–P3) and Serial data (DSR, DSL) inputs can change when the
clock is in either state, provided only that the recommended setup and hold
times, with respect to the clock rising edge, are observed. A LOW signal on
Master Reset (MR) overrides all other inputs and forces the outputs LOW.
14 13 12 11 10 9
1234567
16 15
8
VCC
MR
Q0Q1Q2Q3S1
CP S0
DSR P0P1P2P3DSL GND
CONNECTION DIAGRAM
FUNCTION TABLE
Operating Inputs Outputs
pg
Mode MR S1S0DSR DSL PnQ0Q1Q2Q3
Reset L X X X X X L L L L
Hold H I I X X X q0q1q2q3
Shift Left
H h I X I X q1q2q3L
Shift
Left
H h IX hXq1q2q3H
Shift Right
H I h I X X L q0q1q2
Shift
Right
H I hh XXH q0q1q2
Parallel Load H h h X X pnp0p1p2p3
I = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition.
h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition.
pn, qn = Lower case letters indicate the state of the referenced input or output one setup
time prior to the LOW-to-HIGH clock transition.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
MC74F194
4-BIT BIDIRECTIONAL
UNIVERSAL SHIFT REGISTER
FAST SCHOTTKY TTL
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16 1
16
1
ORDERING INFORMATION
MC74FXXXJ Ceramic
MC74FXXXN Plastic
MC74FXXXD SOIC
16 1
D SUFFIX
SOIC
CASE 751B-03
LOGIC SYMBOL
VCC = PIN 16
GND = PIN 8
11 10 9
2
3
4
5
6
7
1
15
14
13
12
MR
Q0
Q1
Q2
Q3
DSR
P0
P1
P2
P3
DSL
CP S1S0
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MC74F194
LOGIC DIAGRAM
S1
S0
DSR
CP
MR
Q0Q1Q2Q3
P0P1P2P3
DSR
SQ
0
CP
R
CLEAR
SQ
1
CP
R
CLEAR
SQ
2
CP
R
CLEAR
SQ
3
CP
R
CLEAR
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate
propagation delays.
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 74 4.5 5.0 5.5 V
TAOperating Ambient Temperature Range 74 0 25 70 °C
IOH Output Current — High 74 –1.0 mA
IOL Output Current — Low 74 20 mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
VIH Input HIGH Voltage 2.0 VGuaranteed Input HIGH Voltage
VIL Input LOW Voltage 0.8 VGuaranteed Input LOW Voltage
VIK Input Clamp Diode Voltage –1.2 V IIN = –18 mA VCC = MIN
VOH
Out
p
ut HIGH Voltage
74 2.5 3.4 V IOH = –1.0 mA VCC = 4.5 V
V
OH
O
u
tp
u
t
HIGH
Voltage
74 2.7 3.4 V IOH = –1.0 mA VCC = 4.75 V
VOL Output LOW Voltage 0.35 0.5 V IOL = 20 mA VCC = MIN
IIH
In
p
ut HIGH Current
20 µA VIN = 2.7 V
VCC = MAX
I
IH
Inp
u
t
HIGH
C
u
rrent
100 µA VIN = 7.0 V
V
CC =
MAX
IIL Input LOW Current –0.6 mA VIN = 0.5 V VCC = MAX
IOS Output Short Circuit Current (Note 2) –60 –150 mA VOUT = 0 V VCC = MAX
ICC Power Supply Current 33 46 mA
Sn, MR, DSR,
DSL = 4.5 V
Pn = Gnd,
CP =
VCC = MAX
NOTES:
1. For conditions such as MIN or MAX, use the appropriate value specified under guaranteed operating ranges.
2. Not more than one output should be shorted at a time, nor for more than 1 second.
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MC74F194
AC CHARACTERISTICS
74F 74F
TA = +25°C TA = 0 to +70°C
VCC = +5.0 V VCC = 5.0 V ±10%
CL = 50 pF CL = 50 pF
Symbol Parameter Min Max Min Max Unit
fmax Maximum Shift Frequency 105 90 MHz
tPLH Propagation Delay 3.0 7.0 3.5 8.0
ns
tPHL CP to Qn3.5 7.5 3.5 8.0
ns
tPHL Propagation Delay
MR to Qn4.5 12 4.5 14 ns
AC OPERATING REQUIREMENTS
74F 74F
TA = +25°C TA = 0 to +70°C
VCC = +5.0 V VCC = 5.0 V ±10%
Symbol Parameter Min Max Min Max Unit
ts(H)
ts(L) Set up T ime, HIGH or LOW
Pn or DSR or DSL to CP 4.0
4.0 4.0
4.0
ns
th(H) Hold Time, HIGH or LOW 0 1.0
ns
th(L) Pn or DSR or DSL to CP 0 1.0
ts(H)
ts(L) Set up T ime, HIGH or LOW
Sn to CP 8.0
8.0 9.0
8.0
ns
th(H)
th(L) Hold Time, HIGH or LOW
Sn to CP 0
00
0
ns
tw(H) CP Pulse Width HIGH 5.0 5.5 ns
tw(L) MR Pulse Width LOW 5.0 5.0 ns
trec Recovery Time
MR to CP 7.0 8.0 ns
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