FPF1321BUCX - FAIRCHILD SEMICONDUCTOR

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September 2013

FPF1320 / FPF1321 • Rev. 1.0.2

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

FPF1320 / FPF1321

IntelliMAX™ Dual-Input Single-Output Advanced Power

Switch with True Reverse-Current Blocking

Features

 DISO Load Switches

 Input Supply Operating Range: 1.5 V ~ 5.5 V

 RON 50 m at VIN=3.3 V Per Channel (Typical)

 True Reverse-Current Blocking (TRCB)

 Fixed Slew Rate Controlled 130 µs for < 1 µF COUT

 ISW: 1.5 A Per Channel (Maximum)

 Quick Discharge Feature on FPF1321

 Logic CMOS IO Meets JESD76 Standard for GPIO

Interface and Related Power Supply Requirements

 ESD Protected:

- Human Body Model: >6 kV

- Charged Device Model: >1.5 kV

- IEC 61000-4-2 Air Discharge: >15 kV

- IEC 61000-4-2 Contact Discharge: >8 kV

Applications

 Smart phones / Tablet PCs

 Portable Devices

 Near Field Communication (NFC) Capable

SIM Card Power Supply

Description

The FPF1320/21 is a Dual-Input Single-Output (DISO)

load switch consisting of two sets of slew-rate

controlled, low on-resistance, P-channel MOSFET

switches and integrated analog features. The slew-rate-

controlled turn-on characteristic prevents inrush current

and the resulting excessive voltage droop on the power

rails. The input voltage range operates from 1.5 V to

5.5 V to align with the requirements of low-voltage

portable device power rails. FPF1320/21 performs

seamless power-source transitions between two input

power rails using the SEL pin with advanced break-

before-make operation.

FPF1320/21 has a TRCB function to block unwanted

reverse current from output to input during ON/OFF

states. The switch is controlled by logic inputs of the

SEL and EN pins, which are capable of interfacing

directly with low-voltage control signals (GPIO).

FPF1321 has 65  on-chip load resistor for output quick

discharge when EN is LOW.

FPF1320/21 is available in 1.0 mm x 1.5 mm WLCSP,

6-bump, with 0.5 mm pitch. FPF1321B is available in

1.0 mm x 1.5 mm WLCSP, 6-bump, 0.5 mm pitch with

backside laminate.

Ordering Information

Part Number Top

Mark Channel

Switch Per

Channel (Typ.)

at 3.3 VIN

Reverse

Current

Blocking

Output

Discharge

Rise

Time (tR) Package

FPF1320UCX QS DISO 50 m Yes NA 130 µs

1.0 mm X 1.5 mm

Wafer-Level Chip-

Scale Package

(WLCSP) 6-Bumps,

0.5 mm Pitch

FPF1321UCX QT DISO 50 m Yes 65  130 µs

FPF1321BUCX QT DISO 50 m Yes 65  130 µs

1.0 mm X 1.5 mm

Wafer-Level Chip-

Scale Package

(WLCSP) 6-Bumps,

0.5 mm Pitch with

Backside Laminate

FPF1320 / FPF1321 • Rev. 1.0.2 2

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Application Diagram

Figure 1. Typical Application

Block Diagram

Figure 2. Functional Block Diagram (Output Discharge Path for FPF1321 Only)

FPF1320 / FPF1321 • Rev. 1.0.2 3

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Pin Configuration

Figure 3. Pin Configuration in Package View with Pin 1 Indicator

A1 A2

B1 B2

C1 C2

BGND

OUT

SEL

A2 A1

B2 B1

C2 C1

BGND

OUT

SEL

Top View Bottom View

Figure 4. Pin Assignments

Pin Description

Pin # Name Description

A1 EN Enable input. Active HIGH. There is an internal pull-down resistor at the EN pin.

B1 SEL

Input power selection inputs. See Table 1. There are internal pull-down resistors at the

SEL pins.

A2 V

A Supply Input. Input to the power switch A.

B2 V

OUT

Switch output

C1 GND Ground

C2 V

B Supply Input. Input to power switch B.

Table 1. Truth Table

SEL EN Switch A Switch B V

OUT

Status

LOW HIGH ON OFF V

A V

A Selected

HIGH HIGH OFF ON V

B V

B Selected

X LOW OFF OFF Floating for FPF1320

GND for FPF1321 Both Switches are OFF

FPF1320 / FPF1321 • Rev. 1.0.2 4

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Absolute Maximum Ratings

Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Symbol Parameters Min. Max. Unit

VIN V

INA, VINB, VSEL, VEN, VOUT to GND -0.3 6 V

ISW Maximum Continuous Switch Current per Channel 1.5 A

PD Total Power Dissipation at TA=25°C 1.2

TSTG Operating and Storage Junction Temperature -65 150 °C

JA Thermal Resistance, Junction-to-Ambient

(1 in.2 Pad of 2-oz. Copper)

85(1) °C/W

110(2)

ESD Electrostatic Discharge

Capability

Human Body Model, JESD22-A114 6.0

Charged Device Model, JESD22-C101 1.5

Air Discharge (VINA, VINB to GND),

IEC61000-4-2 System Level 15.0

Contact Discharge (VINA, VINB to

GND), IEC61000-4-2 System Level 8.0

Notes:

1. Measured using 2S2P JEDEC std. PCB.

2. Measured using 2S2P JEDEC PCB cold-plate method.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol Parameters Min. Max. Unit

VIN Input Voltage on VINA, VINB 1.5 5.5 V

TA Ambient Operating Temperature -40 85 °C

FPF1320 / FPF1321 • Rev. 1.0.2 5

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Electrical Characteristics

VINA=VINB=1.5 to 5.5 V, TA=-40 to 85°C unless otherwise noted. Typical values are at VINA=VINB=3.3 V and TA=25°C.

Symbol Parameters Condition Min. Typ. Max. Unit

Basic Operation

VINA, VINB Input Voltage 1.5 5.5 V

ISD Shutdown Current SEL=HIGH or LOW, EN=GND,

VOUT=GND, VINA=VINB=5.5 V

5 µA

IQ Quiescent Current IOUT=0mA, SEL=HIGH or LOW,

EN=HIGH, VINA=VINB=5.5 V 12 22 A

RON On-Resistance

VINA=VINB=5.5 V, IOUT=200 mA,

TA=25°C 42 60

m

VINA=VINB=3.3 V, IOUT=200 mA,

TA=25°C 50

VINA=VINB=1.8 V, IOUT=200 mA,

TA=25°C to 85°C 80

VINA=VINB=1.5 V, IOUT=200 mA,

TA=25°C 170

VIH SEL, EN Input Logic High

Voltage VINA, VINB=1.5 V – 5.5 V 1.15 V

VIL

SEL, EN Input Logic Low

Voltage VINA, VINB=1.8 V – 5.5 V 0.65 V

SEL, EN Input Logic Low

Voltage VINA, VINB=1.5 V – 1.8 V

0.60

VDROOP_OUT

Output Voltage Droop while

Channel Switching from

Higher Input Voltage Lower

Input Voltage(3)

VINA=3.3 V, VINB=5 V, Switching from

VINA  VINB, RL=150 , COUT=1 µF

100 mV

ISEL/IEN Input Leakage at SEL and

EN Pin

1.2 A

RSEL_PD/REN_PD Pull-Down Resistance at

SEL or EN Pin 7 M

RPD Output Pull-Down

Resistance

SEL=HIGH or LOW, EN=GND,

IFORCE=20 mA, TA=25°C, FPF1321 65 

True Reverse Current Blocking

VT_RCB RCB Protection Trip Point VOUT - VINA or VINB 45 mV

VR_RCB RCB Protection Release

Trip Point VINA or VINB -VOUT 25 mV

IRCB VINA or VINB Current During

RCB

VOUT=5.5 V, VINA or VINB=Short to

GND 9 15 A

tRCB_ON RCB Response Time when

Device is ON(3) VINA or VINB=5 V, VOUTVINA,B=100 mV 5 µs

Continued on the following page…

FPF1320 / FPF1321 • Rev. 1.0.2 6

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Electrical Characteristics (Continued)

VINA=VINB=1.5 to 5.5 V, TA=-40 to 85°C unless otherwise noted. Typical values are at VINA=VINB=3.3 V and TA=25°C.

Symbol Parameters Condition Min. Typ. Max. Unit

Dynamic Characteristics

tDON Turn-On Delay(4) VINA or VINB=3.3 V, RL=150 ,

CL=1 µF, TA=25°C, SEL: HIGH,

EN: LOW  HIGH

120 s

tR V

OUT Rise Time(4) 130 s

tON Turn-On Time(6) 250 s

tDOFF Turn-Off Delay(4) VINA or VINB=3.3 V, RL=150 ,

CL=1 µF, TA=25°C, SEL: HIGH,

EN: HIGH  LOW

15 s

tF V

OUT Fall Time(4) 320 s

tOFF Turn-Off Time(7) 335 s

tDOFF Turn-Off Delay(4,5) VINA or VINB =3.3 V, RL=150 ,

CL=1 µF, TA=25°C, SEL: HIGH,

EN: HIGH  LOW,

Output Discharge Mode, FPF1321

6 s

tF V

OUT Fall Time(4,5) 110 s

tOFF Turn-Off Time(5,7) 116 s

tTRANR Transition Time

LOW  HIGH(4)

VINA=3.3 V, VINB=5 V,

Switching from VINA  VINB,

SEL: LOW  HIGH, EN: HIGH,

RL=150 , CL=1 µF, TA=25°C

3 s

tSLH Switch-Over Rising Delay(4) 1 s

tTRANF Transition Time

HIGH  LOW(4)

VINA=3.3 V, VINB=5 V,

Switching from VINB  VINA,

SEL: HIGH  LOW, EN: HIGH,

RL=150 , C=1 µF, TA=25°C

45 s

tSHL Switch-Over Falling Delay(4) 5 s

Notes:

3. This parameter is guaranteed by design and characterization; not production tested.

4. tDON/tDOFF/tR/tF/tTRANR/tTRANF/tSLH/tSHL are defined in Figure 5.

5. FPF1321 output discharge is enabled during off.

6. tON=tR + tDON.

7. tOFF=tF + tDOFF.

FPF1320 / FPF1321 • Rev. 1.0.2 7

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Timing Diagram

Figure 5. Dynamic Behavior Timing Diagram

FPF1320 / FPF1321 • Rev. 1.0.2 8

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Typical Characteristics

Figure 6. Supply Current vs. Temperature Figure 7. Supply Current vs. Supply Voltage

Figure 8. Shutdown Current vs. Temperature Figure 9. Shutdown Current vs. Supply Voltage

Figure 10. RON vs. Temperature Figure 11. RON vs. Supply Voltage

Continued on the following page…

FPF1320 / FPF1321 • Rev. 1.0.2 9

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Typical Characteristics

Figure 12. VIL vs. Temperature Figure 13. VIL vs. Supply Voltage

Figure 14. VIH vs. Temperature Figure 15. VIH vs. Supply Voltage

Figure 16. VIH / VIL vs. Supply Voltage Figure 17. RSEL_PD and REN_PD vs. Temperature

Continued on the following page…

FPF1320 / FPF1321 • Rev. 1.0.2 10

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Typical Characteristics

Figure 18. RSEL_PD and REN_PD vs. Supply Voltage Figure 19. tDON and tDOFF vs. Temperature

Figure 20. tR and tF with FPF1320 vs. Temperature Figure 21. tR and tF with FPF1321 vs. Temperature

Figure 22. Transition Time vs. Temperature Figure 23. Switch Over Time vs. Temperature

Continued on the following page…

FPF1320 / FPF1321 • Rev. 1.0.2 11

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Typical Characteristics

Figure 24. TRCB Trip and Release vs. Temperature Figure 25. IRCB vs. Temperature

Figure 26. RPD with FPF1321 vs. Temperature Figure 27. Turn-On Response

(VINA=3.3 V, CIN=1 µF, COUT=1 µF, RL=150 Ω,

SEL=LOW)

Figure 28. Turn-Off Response with FPF1320

(VINA=3.3 V, CIN=1 µF, COUT=1 µF, RL=150 Ω,

SEL=LOW)

Figure 29. Turn-Off Response with FPF1321

(VINA=3.3 V, CIN=1 µF, COUT=1 µF, RL=150 Ω,

SEL=LOW)

Continued on the following page…

FPF1320 / FPF1321 • Rev. 1.0.2 12

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Typical Characteristics

Figure 30. Power Source Transition from 3.3 V to 5 V

(VINA=3.3 V, VINB=5 V, CIN=1 µF, COUT=1 µF,

RL=150 Ω)

Figure 31. Power Source Transition from 5 V to 3.3 V

(VINA=3.3 V, VINB=5 V, CIN=1 µF, COUT=1 µF,

RL=150 Ω)

Figure 32. TRCB During Off (VINA=VINB=Floating,

VOUT=5V, CIN=1 µF, COUT=1 µF, EN=LOW, No RL)

Figure 33. TRCB During On (VINA=5 V, VOUT=6 V,

CIN=1 µF, COUT=1 µF, EN=HIGH, No RL)

FPF1320 / FPF1321 • Rev. 1.0.2 13

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Operation and Application Description

The FPF1320 and FPF1321 are dual-input single-output

power multiplexer switches with controlled turn-on and

seamless power source transition. The core is a 50 m

P-channel MOSFET and controller capable of

functioning over a wide input operating range of 1.5 V to

5.5 V per channel. The EN and SEL pins are active-

HIGH, GPIO/CMOS-compatible input. They control the

state of the switch and input power source selection,

respectively. TRCB functionality blocks unwanted

reverse current during both ON and OFF states when

higher VOUT than VINA or VINB is applied. FPF1321 has a

65  output discharge path during off.

Input Capacitor

To limit the voltage drop on the input supply caused by

transient inrush current when the switch turns on into a

discharged load capacitor; a capacitor must be placed

between the VINA or VINB pins to the GND pin. At least

1 µF ceramic capacitor, CIN, placed close to the pins, is

usually sufficient. Higher-value CIN can be used to

reduce more the voltage drop.

Inrush Current

Inrush current occurs when the device is turned on.

Inrush current is dependent on output capacitance and

slew rate control capability, as expressed by:

LOAD

INITIALIN

OUTINRUSH I

tVV

CI +

−

×= (1)

where:

COUT: Output capacitance;

tR: Slew rate or rise time at VOUT;

VIN: Input voltage, VINA or VINB;

VINITIAL: Initial voltage at COUT, usually GND; and

ILOAD: Load current.

Higher inrush current causes higher input voltage drop,

depending on the distributed input resistance and input

capacitance. High inrush current can cause problems.

FPF1320/1 has a 130 µs of slew rate capability under

3.3 VIN at 1 µF of COUT and 150  of RL so inrush

current and input voltage drop can be minimized.

Power Source Selection

Input power source selection can be controlled by the

SEL pin. When SEL is LOW, output is powered from

VINA while SEL is HIGH, VINB is powering output. The

SEL signal is ignored during device OFF.

Output Voltage Drop during Transition

Output voltage drop usually occurs during input power

source transition period from low voltage to high

voltage. The drop is highly dependent on output

capacitance and load current.

FPF1320/1 adopts an advanced break-before-make

control, which can result in minimized output voltage

drop during the transition time.

Output Capacitor

Capacitor COUT of at least 1 µF is highly recommended

between the VOUT and GND pins to achieve minimized

output voltage drop during input power source transition.

This capacitor also prevents parasitic board inductance.

True Reverse-Current Blocking

The true reverse-current blocking feature protects the

input source against current flow from output to input

regardless of whether the load switch is on or off.

Board Layout

For best performance, all traces should be as short as

possible. To be most effective, the input and output

capacitors should be placed close to the device to

minimize the effect that parasitic trace inductance on

normal and short-circuit operation. Wide traces or large

copper planes for power pins (VINA, VINB, VOUT and

GND) minimize the parasitic electrical effects and the

thermal impedance.

FPF1320 / FPF1321 • Rev. 1.0.2 14

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

Physical Dimensions

Figure 34. 6-Ball, 1.0 x 1.5 mm, Wafer-Level Chip-Scale Package (WLCSP)

Product-Specific Dimensions

Product D E X Y

FPF1320UCX 1460 µm ±30 µm 960 µm ±30 µm 230 µm 230 µm

FPF1321UCX 1460 µm ±30 µm 960 µm ±30 µm 230 µm 230 µm

FPF1321BUCX 1460 µm ±30 µm 960 µm ±30 µm 230 µm 230 µm

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the mo st recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the

warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

http://www.fairchildsemi.com/dwg/UC/UC006AF.pdf

BOTTOM VIEW

SIDE VIEWS

RECOMMENDED LAND PATTERN

BALL A1

INDEX AREA

SEATING PLANE

(NSMD PAD TYPE)

(Ø0.350)

SOLDER MASK

OPENING

(X) ±0.018

(Y) ±0.018

(Ø0.250)

Cu Pad

0.06 C

0.05 C E

NOTES:

A. NO JEDEC REGISTRATION APPLIES.

B. DIMENSIONS ARE IN MILLIMETERS.

C. DIMENSIONS AND TOLERANCE

PER ASMEY14.5M, 1994.

D. DATUM C IS DEFINED BY THE SPHERICAL

CROWNS OF THE BALLS.

E. PACKAGE NOMINAL HEIGHT IS 582 MICRONS

±43 MICRONS (539-625 MICRONS).

F. FOR DIMENSIONS D, E, X, AND Y SEE

PRODUCT DATASHEET.

G. DRAWING FILNAME: MKT-UC006AFrev2.

0.03 C

Ø0.315 +/- .025

0.332±0.018

0.250±0.025

(1.00)

(0.50)

0.005 CAB

0.50

1.00

0.625

0.539

TOP VIEW

FPF1320 / FPF1321 • Rev. 1.0.2 15

FPF1320 / FPF1321 — IntelliMAX™ Dual-Input Single-Output Advanced Power Switch

www.onsemi.com

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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