UT54ACS541/UT54ACTS541 Radiation-Hardened Octal Buffers & Line Drivers, Three-State Outputs Dec. 1, 2003 PINOUTS FEATURES * Three-state outputs drive bus lines or buffer memory address registers * 1.2 radiation-hardened CMOS (ACS541) and 0.6 CRH CMOS process (ACTS541) - Latchup immune * High speed * Low power consumption * Single 5 volt supply * Available QML Q or V processes * Flexible package - 20-pin DIP (not available for the ACTS541) - 20-lead flatpack 20-Pin DIP Top View DESCRIPTION The UT54ACS541 and the UT54ACTS541 are non-inverting octal buffers and line drivers which improve the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The devices are characterized over full military temperature range of -55C to +125C. FUNCTION TABLE INPUTS OUTPUT 1G 2G An Yn L L L L L L H H H X X Z X H X Z 1G A1 1 20 2 19 VDD 2G A2 3 18 Y1 A3 4 17 Y2 A4 5 16 Y3 A5 A6 6 15 7 14 Y4 Y5 A7 A8 8 13 9 12 Y6 Y7 VSS 10 11 Y8 20-Lead Flatpack Top View 1G 1 20 VDD A1 2 19 2G A2 3 18 Y1 A3 A4 4 17 5 16 Y2 Y3 A5 6 15 Y4 A6 7 14 Y5 A7 A8 VSS 8 13 9 12 10 11 Y6 Y7 Y8 LOGIC SYMBOL 1G 2G (1) (19) A1 (2) (3) A2 A3 (4) (5) A4 A5 (6) A6 (7) A7 (8) A8 (9) & EN (18) Y1 (17) Y2 (16) Y3 (15) (14) (13) (12) (11) Y4 Y5 Y6 Y7 Y8 Note: 1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 235 RadHard MSI Logic UT54ACS541/UT54ACTS541 LOGIC DIAGRAM A8 (9) (11) Y8 A6 A7 (7) (8) (13) (12) Y6 Y7 A5 A4 (6) (5) (14) Y5 (15) Y4 A3 (4) (16) Y3 A2 A1 (3) 2G 1G (2) (19) (17) (1) (18) Y2 Y1 RADIATION HARDNESS SPECIFICATIONS 1 PARAMETER LIMIT UNITS Total Dose 1.0E6 (ACS541) 5.0E5 (ACTS541) rads(Si) SEU Threshold 2 80 MeV-cm2/mg SEL Threshold 120 MeV-cm2/mg Neutron Fluence 1.0E14 n/cm2 Notes: 1. Logic will not latchup during radiation exposure within the limits defined in the table 2. Device storage elements are immune to SEU affects. ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER LIMIT UNITS VDD Supply voltage -0.3 to 7.0 V VI/O Voltage any pin -.3 to VDD +.3 V TSTG Storage Temperature range -65 to +150 C TJ Maximum junction temperature +175 C TLS Lead temperature (soldering 5 seconds) +300 C JC Thermal resistance junction to case 20 C/W II DC input current 10 mA PD Maximum power dissipation 1 W Note: 1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RadHard MSI Logic 236 UT54ACS541/UT54ACTS541 RECOMMENDED OPERATING CONDITIONS 237 SYMBOL PARAMETER LIMIT UNITS VDD Supply voltage 4.5 to 5.5 V VIN Input voltage any pin 0 to VDD V TC Temperature range -55 to + 125 C RadHard MSI Logic UT54ACS541/UT54ACTS541 DC ELECTRICAL CHARACTERISTICS 7 (VDD = 5.0V 10%; VSS = 0V 6, -55C < TC < +125C) SYMBOL VIL VIH IIN PARAMETER CONDITION MIN Low-level input voltage 1 ACTS ACS High-level input voltage 1 ACTS ACS MAX UNIT 0.8 .3VDD V .5VDD .7VDD V Input leakage current ACTS/ACS VIN = VDD or VSS Low-level output voltage 3 ACTS ACS IOL = 12.0mA IOL = 100A High-level output voltage 3 ACTS ACS IOH = -12.0mA IOH = -100A IOZ Three-state output leakage current VO = VDD and VSS -30 30 A IOS Short-circuit output current 2 ,4 ACTS/ACS VO = VDD and VSS -300 300 mA Output current10 VIN = VDD or VSS 12 mA (Sink) VOL = 0.4V Output current10 VIN = VDD or VSS -12 mA (Source) VOH = VDD - 0.4V Ptotal Power dissipation 2, 8, 9 CL = 50pF 2.1 mW/ MHz IDDQ Quiescent Supply Current VDD = 5.5V 10 A Quiescent Supply Current Delta For input under test 1.6 mA VOL VOH IOL IOH IDDQ ACTS -1 1 A 0.40 0.25 V .7VDD VDD - 0.25 V VIN = VDD - 2.1V For all other inputs VIN = VDD or VSS VDD = 5.5V CIN COUT Input capacitance 5 = 1MHz @ 0V 15 pF Output capacitance 5 = 1MHz @ 0V 15 pF RadHard MSI Logic 238 UT54ACS541/UT54ACTS541 Notes: 1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, - 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed to VIH(min) and VIL(max). 2. Supplied as a design limit but not guaranteed or tested. 3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765 pF/MHz. 4. Not more than one output may be shorted at a time for maximum duration of one second. 5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at frequency of 1MHz and a signal amplitude of 50mV rms maximum. 6. Maximum allowable relative shift equals 50mV. 7. All ACS specifications are valid for radiation dose <1E6 rads(Si), and all ACTS specifications are valid for radiation dose <5E5 rads(Si). 8. Power does not include power contribution of any TTL output sink current. 9. Power dissipation specified per switching output. 10. This value is guaranteed based on characterization data, but not tested. 239 RadHard MSI Logic UT54ACS541/UT54ACTS541 AC ELECTRICAL CHARACTERISTICS 2 (VDD = 5.0V 10%; VSS = 0V 1, -55C < TC < +125C) SYMBOL PARAMETER MINIMUM MAXIMUM UNIT tPLH An to Yn 1 11 ns tPHL An to Yn 1 14 ns tPZL G low to Yn active 2 14 ns tPZH G low to Yn active 2 15 ns tPLZ G high to Yn three-state 2 12 ns tPHZ G high to Yn three-state 2 13 ns Notes: 1. Maximum allowable relative shift equals 50mV. 2. For the ACTS version, all specifications are valid for radiation dose <1E6 rads(Si). For the ACTS version, all specifications are valid for radiation dose <5E5 rads(Si). RadHard MSI Logic 240