235 RadHard MSI Logic
UT54ACS541/UT54ACTS541
Radiation-Hardened
Octal Buffers & Line Drivers, Three-State Outputs Dec. 1, 2003
FEATURES
• Three-state outputs drive bus lines or buf fer memory address
registers
• 1.2µ radiation-hardened CMOS (ACS541) and 0.6µ CRH
CMOS process (ACTS541)
- Latchup immune
• High speed
• Low power consumption
• Single 5 volt supply
• Available QML Q or V processes
• Flexible package
- 20-pin DIP (not available for the ACTS541)
- 20-lead flatpack
DESCRIPTION
The UT54ACS541 and the UT54ACTS541 are non-inverting oc-
tal buffers and line drivers which improve the performance and
density of three-state memory address drivers, clock drivers, and
bus-oriented receivers and transmitters. The devices are charac-
terized over full military temperature range of -55°C to +125°C.
FUNCTION TABLE
LOGIC SYMBOL
PINOUTS 20-Pin DIP
Top View
20-Lead Flatpa ck
Top View
INPUTS OUTPUT
1G 2G An Yn
LLLL
L L H H
H X X Z
X H X Z
(1) EN
(2)
A1 (3)
A2 (4)
(18) Y1
(16)
(17) Y2
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
A3 (5)
A4 (6)
A5 (7)
A6
Y3
(13) Y6
(14) Y5
(15) Y4
(8)
A7 (9)
A8 (11) Y8
(12) Y7
(19)
&
1G
2G
1G
A1
A2
A3
A4
A5
A6
VDD
2G
Y1
Y2
Y3
Y5
A7 Y6
Y4
A8 Y7
VSS Y8
120
219
318
417
516
615
714
813
912
10 11
1G
A1
A2
A3
A4
A5
A6
VDD
2G
Y1
Y2
Y3
Y5
A7 Y6
Y4
A8 Y7
VSS Y8
120
219
318
417
516
615
714
813
912
10 11
RadHard MSI Logic 236
UT54ACS541/UT54ACTS541
LOGIC DIAGRAM
RADIATION HARDNESS SPECIFICATIONS 1
Notes:
1. Logic will not latchup during radiation ex posure within the limits defined in the table
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device
at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
PARAMETER LIMIT UNITS
Total Dose 1.0E6 (ACS541)
5.0E5 (ACTS541) rads(Si)
SEU Thresh old 280 MeV-cm2/mg
SEL Threshold 120 MeV-cm2/mg
Neutron Fluence 1.0E14 n/cm2
A1A2A3A4A5
A6
A8
(1)(2)(3)(4)(5)(6)
(7)
(9)
1G
2G
(19)
A7
(8)
Y1
Y2Y3Y4Y5
Y6
Y8 Y7
(18)(17)(16)(15)(14)
(13)
(11) (12)
SYMBOL PARAMETER LIMIT UNITS
VDD Supply voltage -0.3 to 7.0 V
VI/O Voltage any pin -.3 to VDD +.3 V
TSTG Storage Temperature range -65 to +150 °C
TJMaximum junction temperature +175 °C
TLS Lead temperature (soldering 5 seconds) +300 °C
ΘJC Thermal resistance junction to case 20 °C/W
IIDC input current ±10 mA
PDMaximum power dissipation 1 W
237 RadHard MSI Logic
UT54ACS541/UT54ACTS541
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMIT UNITS
VDD Supply voltage 4.5 to 5. 5 V
VIN Input voltage any pin 0 to VDD V
TCTemperature range -55 to + 125 °C
RadHard MSI Logic 238
UT54ACS541/UT54ACTS541
DC ELECTRICAL CHARACTERISTICS 7
(VDD = 5.0V ±10%; VSS = 0V 6, -55°C < TC < +125°C)
SYMBOL PARAMETER CONDITION MIN MAX UNIT
VIL Low-level input vo ltage 1
ACTS
ACS 0.8
.3VDD
V
VIH High-level input voltage 1
ACTS
ACS .5VDD
.7VDD
V
IIN Input leakage current
ACTS/ACS VIN = VDD or VSS -1 1µA
VOL Low-level output voltage 3
ACTS
ACS IOL = 12.0mA
IOL = 100µA0.40
0.25 V
VOH High-level output voltage 3
ACTS
ACS IOH = -12.0mA
IOH = -100µA.7VDD
VDD - 0.25 V
IOZ Three-state output leakage current VO = VDD and VSS -30 30 µA
IOS Short-circuit output current 2 ,4
ACTS/ACS VO = VDD and VSS -300 300 mA
IOL Output current10
(Sink)
VIN = VDD or VSS
VOL = 0.4V
12 mA
IOH Output current10
(Source)
VIN = VDD or VSS
VOH = VDD - 0.4V
-12 mA
Ptotal Power dissipatio n 2, 8, 9 CL = 50pF 2.1 mW/
MHz
IDDQ Quiescent Supply Cur rent VDD = 5.5V 10 µA
∆IDDQ Quiescent Supply Current Delta
ACTS For input under test
VIN = VDD - 2.1V
For all other inputs
VIN = VDD or VSS
VDD = 5.5V
1.6 mA
CIN Input capacitance 5ƒ = 1MHz @ 0V 15 pF
COUT Output capacitance 5 ƒ = 1MHz @ 0V 15 pF
239 RadHard MSI Logic
UT54ACS541/UT54ACTS541
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; V IL = VIL(max) + 0%,
- 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but
are guaranteed to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current de nsity ≤ 5.0E5 amps/cm2, the maximum product of load capacitanc e (per output bu ffer) time s frequ en c y shou ld no t excee d
3,765 pF/MHz.
4. Not more than one output may be shorted at a time for maximum duratio n of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS
at frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All ACS specifications are valid for radiation dose <1E6 rads(Si), and all ACTS specifications are valid for radiation dose <5E5 rads(Si).
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10. This value is guaranteed based on characterization data, but not tested.
RadHard MSI Logic 240
UT54ACS541/UT54ACTS541
AC ELECTRICAL CHARACTERISTICS 2
(VDD = 5.0V ±10%; VSS = 0V 1, -55°C < TC < +125°C)
Notes:
1. Maximum allowable relative shift equals 50mV.
2. For the ACTS version, all specifications are valid for radiation dose <1E6 rads(Si). For the ACTS version, all specifications are valid for radiation dose <5E5
rads(Si).
SYMBOL PARAMETER MINIMUM MAXIMUM UNIT
tPLH An to Yn 111 ns
tPHL An to Yn 1 14 ns
tPZL G low to Yn active 2 14 ns
tPZH G low to Yn active 2 15 ns
tPLZ G high to Yn three-state 2 12 ns
tPHZ G high to Yn three-state 2 13 ns
