FAN53713UC10X - ON SEMICONDUCTOR

August, 2019 − Rev. 2

1Publication Order Number:

FAN53713/D

FAN53713

1.5 A Synchronous Buck

Regulator

Description

The FAN53713 is a Super Low Iq, step−down switching voltage

regulator, that delivers a fixed output from an input voltage supply of

2.3 V to 5.5 V. Using a proprietary architecture with synchronous

rectification, the FAN53713 is capable of delivering a peak efficiency

of 93%, while maintaining efficiency over 90% at load currents as low

as 1 mA.

The regulator operates with 0402 and 0603 input and output

capacitors, respectively, which reduces the total solution size to

5.5 mm2. At moderate and light load, Pulse Frequency Modulation

(PFM) is used to operate the device with a low quiescent current. Even

with such a low quiescent current, the part exhibits excellent transient

response during load swings. In Shutdown Mode, the supply current

drops to 100 nA, reducing power consumption. The Mode pin allows

the part to be in a Super Low IQ (SLIQ) mode with a typical quiescent

current of 2 mA.

The FAN53713 is available in 6−bump, 0.4 mm pitch, Wafer−Level

Chip−Scale Package (WLCSP).

Features

•2 mA Typical Quiescent Current

•5.5 mm2 Total Solution Size

•1.5 A Output Current Capability

•0.6 V to 1.8 V Fixed Output Voltage

•2.3 V to 5.5 V Input Voltage Range

•Best−in−Class Load Transient Response

•Best−in−Class Efficiency with Sub 1 mA Output Currents

•Internal Soft−Start Limits Battery Current Below 150 mA to avoid

Brown−out Scenarios

•Protection Faults (UVLO, OCP and OTP)

•Thermal Shutdown and Overload Protection

•6−Bump WLCSP, 0.4 mm Pitch

•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Applications

•Wearables

•Smart Watch

•Health Monitoring

•Sensor Drive

•Energy Harvesting

•Utility and Safety Modules

•RF Modules

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See detailed ordering and shipping information on page 2 of

this data sheet.

ORDERING INFORMATION

WLCSP6 1.38  0.94  0.625

CASE 567UH

MARKING DIAGRAM

12KK

XYZ

12 = Alphanumeric Device Marking

KK = Lot Run Code

X = Alphabetical Year Code

Y = 2 Weeks Date Code

Z = Assembly Plant Code

FAN53713

MODE

EN GND

22 mF

COUT

VOUT

1.0 mH

2.2 mF

VIN

CIN

Figure 1. Typical Application

FAN53713

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Table 1. ORDERING INFORMATION

Part Number

Output Voltage

(Note 1)

Max. Output

Current (Note 1)

Temperature

Range Package

Packing

Method

Device

Marking

FAN53713UC02X 0.7 V 1.5 A −40 to 85°C WLCSP Tape & Reel GJ

FAN53713UC10X

(In Development)

1.1 V 1.5 A −40 to 85°C WLCSP Tape & Reel LE

1. Other voltage and output current options are available. Contact an On Semiconductor representative.

Table 2. RECOMMENDED EXTERNAL COMPONENTS

Component Description Vendor Parameter Typ. Unit

L1.0 mH, 20%, 2.3 A, 107 mW, 1608 DFE160810S−1R0M (Murata) L 1.0 mH

CIN 2.2 mF, 20%, 6.3 V, X5R, 0402 C1005X5R0J225M050BC (TDK) C 2.2 mF

COUT (Note 1) 22 mF, 20%, 6.3 V, X5R, 0603 C1608X5R0J226M080AC (TDK) C 22

1. A 10 mF, 0402 capacitor can be used to reduce total solution size at the expense of load transient performance.

Pin Configuration

Figure 2. Top View

A2 EN

MODE

VIN

GND

A2 VIN

GND

MODE

Figure 3. Bottom View

Table 3. PIN DEFINITIONS

Pin # Name Description

A1 EN Enable. The device is in Shutdown Mode when voltage to this pin is <0.4 V and enabled

when >1.2 V. Do not leave this pin floating. Recommended for GPIO 1.8 V to drive this pin

A2 VIN Input Voltage. Connect to input power source across CIN

B1 MODE MODE. Logic “LOW” allows the IC to be in a Super Low IQ (SLIQ) state. A Logic HIGH

allows the part to be in normal Iq state Auto Mode

B2 SW Switching Node. Connect to SW pad of inductor

C1 FB Feedback. Connect to positive side of output capacitor

C2 GND Ground. Power and IC ground. All signals are referenced to this pin

Table 4. ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Min. Max. Unit

VIN Input Voltage −0.3 6.5 V

VSW Voltage on SW Pin −0.3 VIN + 0.3 (Note 1) V

VCTRL EN, FB and Mode Pin Voltage −0.3 VIN + 0.3 (Note 1) V

ESD Human Body Model per JESD22−A114 2.0 kV

Charged Device Model per JESD22−C101 1.0

TJJunction Temperature −40 +150 °C

TSTG Storage Temperature −40 +150 °C

TLLead Soldering Temperature, 10 Seconds +260 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Lesser of 6 V or VIN + 0.3 V.

FAN53713

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Table 5. RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min. Typ. Max. Unit

VIN Supply Voltage Range 2.3 5.5 V

IOUT Continuous Output Current 0 1.5 A

Pulsed Output Current, 100 ms0 1.6 A

CIN Input Capacitor 2.2 mF

COUT (Note 1) Output Capacitor 3 100 mF

L Inductor 0.47 1.0 1.3 mH

TAOperating Ambient Temperature −40 +85 °C

TJOperating Junction Temperature −40 +125 °C

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

1. Effective capacitance after DC bias.

Table 6. THERMAL PROPERTIES

Symbol Parameter Min. Typ. Max. Unit

θJA Junction−to−Ambient Thermal Resistance (Note 1) 125 °C/W

1. Junction−to−ambient thermal resistance is a function of application and board layout. This data is simulated with four−layer 2s2p boards with

vias in accordance to JESD51− JEDEC standard. Special attention must be paid not to exceed the junction temperature.

Table 7. ELECTRICAL CHARACTERISTICS Minimum and Maximum Values are at VIN = VEN = 3.6 V, TA = −40°C to

+85°C, unless otherwise noted. Typical values are at TA = 25°C, VIN = VEN = 3.6 V, VOUT = 1.8 V

Symbol Parameter Condition Min. Typ. Max. Unit

IQ,SLIQ Quiescent Current SLIQ Mode, no load, non−switching 2mA

IQ,PFM PFM Quiescent Current PFM Mode, no load, non−switching 5mA

ISD Shutdown Supply Current EN=GND, VIN=3.6 V, no load 100 nA

VUVLO_RISE Under−Voltage Lockout Threshold VIN Rising 2.10 2.15 2.21 V

VUVLO_FALL VIN Falling 2.00 2.05 2.10 V

VIH HIGH−Level Input Voltage 1.2 V

VIL LOW−Level Input Voltage 0.4 V

ILIM Peak Current Limit VIN = 4.35 V 2215 mA

VOACC Output Voltage Accuracy VOUT = 0.6 V to 1.8 V, IOUT(DC) = 0,

PWM Mode

−25 +25 mV

VOUT = 0.6 V to 1.8 V, IOUT(DC )= 0,

PFM Mode

−40 +40 mV

RDS(on) PMOS On Resistance VIN = VGS = 3.6 V 135 mW

NMOS On Resistance VIN = VGS = 3.6 V 95 mW

TTSD Thermal Shutdown 150 °C

THYS Thermal Shutdown Hysteresis 15 °C

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

FAN53713

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Table 8. SYSTEM CHARACTERISTICS The following system characteristics are guaranteed by design and are not performed in

production testing. Recommended operating conditions, unless otherwise noted, VIN = 2.3 V to 5.5 V, TA = −40°C to +85°C, VOUT = 1.8

V. Typical values are given at TA = 25°C, VIN = 3.6 V. System characteristics are based on circuit per Figure 1.

L = 1.0 mH, 2.3 A, 107 mW DCR, DFE160810S−1R0M (Murata), CIN = 1 × 2.2 mF, 6.3 V, 0402 (1005 metric), C1005X5R0J225M050BC

(TDK) and COUT = 1 × 22 mF, 6.3 V, 0603 (1608 metric), C1608X5R0J226M080AC (TDK).

Symbol Parameter Condition Min. Typ. Max. Unit

LOADREG Load Regulation IOUT = 10 mA to 1 mA, SLIQ Mode −9.0 mV/mA

IOUT = 200 mA to 300 mA, PWM −2.0 mV/A

LINEREG Line Regulation 3.0 V ≤ VIN ≤ 4.35 V,

IOUT = 1 A, PWM

−0.5mV/V

VOUT_RIPPLE Ripple Voltage IOUT = 250 mA, SLIQ Mode 40 mV

IOUT = 20 mA, PFM Mode 25

IOUT = 200 mA, PWM Mode 5

Eff Efficiency IOUT = 100 mA, SLIQ Mode 88 %

IOUT = 500 mA, SLIQ Mode 91

IOUT = 1 mA, PFM Mode 90

IOUT = 100 mA, PFM Mode 91

IOUT = 300 mA, PWM Mode 91

Eff Efficiency IOUT = 500 mA, PWM Mode 90%

IOUT = 700 mA, PWM Mode 88

ΔVOUT_LOAD Load Transient IOUT = 10 mA ⇔150 mA,

TR = TF = 1 ms, Auto Mode

±40 mV

IOUT = 100 mA ⇔ 500 mA,

TR = TF = 1 ms, SLIQ Mode

±15 mV

ΔVOUT_LINE Line Transient VIN = 3.0 V ⇔3.6 V, TR = TF = 10 ms,

IOUT = 300 mA, PWM Mode

±20 mV

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Typical Characteristics

Unless otherwise specified, VIN = 3.6 V, VOUT = 1.8 V, Auto Mode, TA = 25°C; circuit and components according to Figure 1 and Table 2.

70%

74%

78%

82%

86%

90%

94%

1 10 100

Efficiency

Load Current (mA)

70%

74%

78%

82%

86%

90%

94%

1 10 100 1,000

Efficiency

Load Current (mA)

50%

55%

60%

65%

70%

75%

80%

85%

90%

95%

0.01 0.10 1.00

Efficiency

Load Current (mA)

50%

55%

60%

65%

70%

75%

80%

85%

90%

95%

0.01 0.10 1.00

Efficiency

Load Current (mA)

500

1,000

1,500

2,000

2,500

3,000

0 250 500 750 1000 1250 1500

Switching Frequency (KHz)

Load Current (mA)

0 250 500 750 1000 1250 1500

Output Ripple (mVpp)

Load Current (mA)

1,000

VIN = 2.5 V

VIN = 3.0 V

VIN = 3.6 V

VIN = 4.2 V

VIN = 5.0 V

VIN = 2.5 V

VIN = 3.0 V

VIN = 3.6 V

VIN = 4.2 V

VIN = 5.0 V

−40°C

+25

+85

°C

−40°C

+25

+85

°C

VIN = 2.5 V

VIN = 3.0 V

VIN = 3.6 V

VIN = 4.2 V

Figure 4. Efficiency vs. Load Current and Input

Voltage, VOUT = 1.8 V, Auto Mode

Figure 5. Efficiency vs. Load Current and

Temperature, VIN = 3.6 V , VOUT = 1.8 V, Auto Mode

Figure 6. Efficiency vs. Load Current and Input Voltage,

VOUT = 1.8 V, SLIQ Mode

Figure 7. Efficiency vs. Load Current and

Temperature, VIN = 3.6 V , VOUT = 1.8 V, SLIQ Mode

Figure 8. Frequency vs. Load Current and Input Voltage,

Auto Mode, VOUT = 1.8 V, Auto Mode

Figure 9. Output Ripple vs. Load Current and

Input Voltage, VOUT = 1.8 V, Auto Mode

VIN = 2.5 V

VIN = 3.0 V

VIN = 3.6 V

VIN = 4.2 V

FAN53713

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Typical Characteristics (continued)

Unless otherwise specified, VIN = 3.6 V, VOUT = 1.8 V, Auto Mode, TA = 25°C; circuit and components according to Figure 1 and Table 2.

2.3 2.8 3.3 3.8 4.3 4.8 5.3

Input Voltage (V)

Input Current (mA)

−1.0

−0.5

0.0

0.5

1.0

1.5

2.0

0 250 500 750 1000 1250 1500

Output Regulation (%)

Load Current (mA)

−2.0

−1.5

−1.0

−0.5

0.0

0.5

1.0

1.5

2.0

0 250 500 750 1000 1250 1500

Output Regulation (%)

Load Current (mA)

2.3 2.8 3.3 3.8 4.3 4.8 5.3

Input Voltage (V)

−405C

+255C

+855C

0.0

0.1

0.2

0.3

0.4

0.5

2.3 2.8 3.3 3.8 4.3 4.8 5.3

Input Voltage (V)

Figure 10. Output Regulation vs. Load Current and

Input Voltage, VOUT = 1.8 V, Auto Mode

Figure 11. Output Regulation vs. Load Current and

Temperature, VIN = 3.6 V, VOUT = 1.8 V, Auto Mode

Figure 12. Quiescent Current vs. Input Voltage and

Temperature, VOUT = 1.8 V, Auto Mode

Figure 13. Quiescent Current vs. Input Voltage and

Temperature, VOUT = 1.8 V, SLIQ Mode

Figure 14. Shutdown Current vs. Input Voltage

and Temperature

Figure 15. Load Transient, VIN = 3.6 V, VOUT = 1.8 V,

10 mA 150 mA, 1 ms Edge, Auto Mode

−40°C

+25°C

+85°C

−40°C

+25°C

+85°C

−40°C

+25°C

+85°C

−40°C

+25°C

+85°C

VIN = 2.5 V

VIN = 3.0 V

VIN = 3.6 V

VIN = 4.2 V

VIN = 5.0 V

FAN53713

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Typical Characteristics (continued)

Unless otherwise specified, VIN = 3.6 V, VOUT = 1.8 V, Auto Mode, TA = 25°C; circuit and components according to Figure 1 and Table 2.

Figure 16. Load Transient, VIN = 3.6 V, VOUT = 1.8 V,

5 mA 300 mA, 1 ms Edge, Auto Mode

Figure 17. Load Transient, VIN = 3.6 V, VOUT = 1.8 V,

100 mA 300 mA, 1 ms Edge, Auto Mode

Figure 18. Load Transient, VIN = 3.6 V, VOUT = 1.8 V,

10 mA 1500 mA, 1 ms Edge, Auto Mode

Figure 19. Line Transient, VIN = 3.0 V  3.6 V,

VOUT = 1.8 V, 10 ms Edge, 300 mA Load, Auto Mode

Figure 20. Start−up, VIN= 3.6 V, VOUT= 1.8 V,

50 mA Resistive Load, Auto Mode

Figure 21. Start−up, VIN= 3.6 V, VOUT= 1.8 V,

300 mA Resistive Load, Auto Mode

FAN53713

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Operation Description

The FAN53713 is a Super Low Iq (SLIQ), step−down

switching voltage regulator, typically operating at 2.5 MHz

in Continuous Conduction Mode(CCM). Using a

proprietary architecture with synchronous rectification, the

FAN53713 is capable of delivering a peak efficiency of

93%, while maintaining efficiency over 90% at load currents

sub 1mA.

In SLIQ mode the device is very efficient with load

currents in the uA range. In SLIQ mode the device draws less

than 2 mA typical from the battery with no load. The load

transients in SLIQ mode are best in class.

The FAN53713 provides a fixed output voltage of 0.6 V

to 1.8 V and load capability of 1.5 A, which can support

wearable or mobile phone applications which use Li−Ion

batteries. Specialized soft−start limits the battery current to

150 mA to limit any brown out occurrences.

Control Scheme

Enable and Disable

When EN pin is Low, all circuits are off and the IC draws

100 nA current. When EN is High and VIN is above its

UVLO threshold, the regulator begins a soft−start cycle. The

FAN53713 has internal soft−start which limits the battery

current draw to 150 mA. Once the part reaches 95% of VOUT

target, the part will transition to the correct mode of

operation depending on load current. The part starts up

within 400 ms typical with the recommended external

components listed in Table 2.

MODE Pin

Setting Mode Pin Low sets the device in SLIQ mode;

setting Mode Pin High sets the device in normal Iq Auto

Mode.

Protection Features

VOUT Fault

If the VOUT fails to reach 95% of VOUT target within 1.8

ms during startup, a VOUT fault is declared. During the fault

condition the part restarts every 20 ms to achieve the 95%

target voltage. Once the output voltage reaches the 95%

VOUT target voltage within 1.8 ms during startup, the VOUT

fault clears.

Over−Current Protection (OCP)

A heavy load or short circuit on the output causes the

current in the inductor to increase until a maximum current

threshold is reached in the high−side switch. Upon reaching

this point, the high−side switch turns off, preventing high

currents from causing damage. The regulator continues to

limit the current cycle−by−cycle. After 500 ms of current

limit, the regulator triggers an over−current fault, causing

the regulator to shut down for about 20 ms before attempting

a restart.

Under−Voltage Lockout (UVLO)

When EN is HIGH, the under−voltage lockout keeps the

part from operating until the input supply voltage rises high

enough to properly operate. This ensures no misbehavior of

the regulator during startup or shutdown.

Over−Temperature Protection (OTP)

When the die temperature increases, due to a high load

condition and/or a high ambient temperature, the output

switching is disabled until the die temperature falls

sufficiently. The junction temperature at which the thermal

shutdown activates is nominally 150°C with a 15°C

hysteresis. Once the junction temperature falls below the

hysteresis threshold, the regulator performs a soft−start.

Modes of Operations

SLIQ (Super Low IQ)

In SLIQ Mode the device acts in a modified PFM mode

with a super low Iq state. The part draws 2 mA with no load.

The part enters SLIQ Mode when the Mode pin is set to

logic “LOW”. Before pulling the Mode Pin Low, the load

current should drop below 1 mA to maintain output voltage

regulation in SLIQ mode. The maximum load current in

SLIQ Mode that the device can support is 1 mA. If load

current exceeds 1 mA, it is recommended to place part in

Auto Mode by pulling Mode pin High so that the device can

support more current.

The part can support more than 1 mA in SLIQ Mode if the

output capacitor is increased.

PFM

At light load operation in Auto Mode, the device enters

PFM mode when load current is below 100 mA typically.

PFM mode reduces switching frequency as well as battery

current draw, which yields high efficiency.

When Mode pin goes High, the part will transition from

SLIQ Mode into normal PFM mode within 10 ms, typically.

PWM

When load is high, the part transitions smoothly from

PFM mode to PWM mode. The part enters PWM mode

when load current exceeds 132 mA, typically.

FAN53713

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Applications Information

Selecting the Inductor

The output inductor must meet both the required

inductance and the energy-handling capability of the

application. The inductor value affects average current limit,

output voltage ripple, and efficiency.

The ripple current (ΔI) of the regulator is:

DI≈VOUT

VIN ǒVIN *VOUT

L fSW Ǔ(eq. 1)

The maximum average load current, IMAX(LOAD), is

related to the peak current limit, ILIM(PK), by the ripple

current, given by:

IMAX(LOAD) +ILIM(PK) *DI

2(eq. 2)

The transition between PFM and PWM operation is

determined by the point at which the inductor valley current

crosses zero. The regulator DC current when the inductor

current crosses zero, IDCM, is:

IDCM +DI

2(eq. 3)

The FAN53713 is optimized for operation with L =

1.0 mH, but is stable with inductances up to 1.3 H (nominal).

The inductor should be rated to maintain at least 80% of its

value at ILIM(PK).

Efficiency is affected by the inductor DCR and inductance

value. Decreasing the inductor value for a given physical

size typically decreases the DCR; but because DI increases,

the RMS current increases, as do the core and skin effect

losses.

IRMS +IOUT(DC)

Ǹ)DI2

12 (eq. 4)

The increased RMS current produces higher losses

through the RDS(ON) of the IC MOSFETs, as well as the

inductor DCR.

Increasing the inductor value produces lower RMS

currents, but degrades transient response. For a given

physical inductor size, increased inductance usually results

in an inductor with lower saturation current and higher DCR.

Table 3 shows the effects of inductance higher or lower

than the recommended 1.0 mH on regulator performance.

Output Capacitor

Increasing COUT has no effect on loop stability and can

therefore be increased to reduce output voltage ripple or to

improve transient response. Vice versa, lower COUT can be

used but with a compromise of load transient response.

Output voltage ripple, ΔVOUT, is:

DVOUT +DILƪfSW COUT ESR2

2 D (1 *D) )1

8 FSW COUTƫ(eq. 5)

Input Capacitor

The 2.2 mF ceramic input capacitor should be placed as

close as possible between the VIN pin and GND to minimize

the parasitic inductance. If a long wire is used to bring power

to the IC, additional “bulk” capacitance (electrolytic or

tantalum) should be placed between CIN and the power

source lead to reduce the ringing that can occur between the

inductance of the power source leads and CIN.

The effective capacitance value decreases as VIN

increases due to DC bias effects.

PCB Layout Guidelines

1. The input capacitor (CIN) should be connected as

close as possible to the VIN and GND pins

Connect to VIN and GND using only top metal.

Do not route through vias (see Figure 22)

2. Place the inductor (L) as close as possible to the

IC. Use short wide traces for the main current

paths

3. An output capacitor (COUT) should be placed as

close as possible to the IC. Connection to GND

should only be on top metal. Feedback signal

connection to VOUT should be routed away from

noisy components and traces (e.g. SW line)

Table 9. EFFECTS OF CHANGES in Inductor Value (from 1.0 mH Recommended Value) on Regulator Performance

Inductor Value IMAX(LOAD) DVOUT Transient Response

Increase Increase Decrease Degraded

Decrease Decrease Increase Improved

FAN53713

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Figure 22. Top Layer

Connect VIN pin and CIN using only top metal.

Connect COUT and GND pin only on top layer

Put as many as possible vias connected to

ground plane (Layer 2), to help dissipate heat.

Connect GND vias to system ground

The ground area should be made as large as

possible to help dissipate heat

VOUT trace should be as wide and as short

as possible, for low impedance, also should

be routed away from noisy components and

traces (e.g. SW line)

Figure 23. Layer 1

Layer 2 should be a solid ground layer, to

shield VOUT from capacitive coupling of the

fast edges of SW node.

Logic signals can be routed on this layer.

Figure 24. Layer 3

SW trace should be as wide and as short as

possible, and be isolated with GND area from

any other sensitive traces.

WLCSP6 1.38x0.94x0.625

CASE 567UH

ISSUE O

DATE 31 APR 2017

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

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