SiRF Chips and Software
SiRFstarIIe BLOCK DIAGRAM
SiRFstarIIe Chip Set
A Highly Integrated GPS Chip Set for Consumer Products
2-Bit
DATA BUS
(Optional)
RTC XTAL AGC
GPS
Antenna
Input
RAM
(Optional)
ROM
GPS
CLKS
RF
Filter LNA
GSP2e GRF2i
Reset
Controller
REF XTAL
ADDRESS BUS
Serial Data
Timemark
Serial Data
Power
Battery
GSP2E1
SiRFstarII ARCHITECTURE
SiRFstarII architecture builds on the high-performance SiRFstarI core, adding an acquisition
accelerator, differential GPS processor, multipath mitigation hardware and satellite-tracking
engine. SiRFstarII delivers major advancements in GPS performance, accuracy, integration,
computing power and flexibility. It is the first GPS architecture designed to be available both
as a highly integrated chip set configuration and an IP core.
The SiRFstarIIe family consists of the GSP2e highly integrated digital section, GRF2i
integrated front end and GSW2e software that provides flexible system architecture for stand-
alone GPS based products. A 50MHz ARM7 CPU has sufficient throughput to support
extensive user application software and peripherals. The internal satellite signal-tracking
engine provides highly accurate GPS measurements and differential corrections and
eliminates the need for a high rate GPS interrupt. This makes SiRFstarII architecture the
preferred platform for a wide variety of GPS based consumer products.
ARCHITECTURE HIGHLIGHTS
Industry Leading GPS Performance
Builds on high performance SiRFstarI core
Signal acquisition using 1920 time/frequency
search channels
Wide Area Augmentation System (WAAS) and
U.S. Coast Guard Beacon support
Satellite signal tracking engine to perform GPS
acquisition and tracking fuctions without
CPU intervention
Multipath-mitigation hardware
Cold Start under 45 seconds
Low Power
Advanced TricklePower mode for
power savings to 98% with no extra parts
Extreme low power in power down mode, but
capable of very fast starts
Maximizes GPS Position Availability
SingleSat
TM
updates in reduced visibility
Superior urban canyon performance
FoliageLock
TM
for weak signal tracking
Robust development environment
FAMILY HIGHLIGHTS
GSP2e - GPS Digital IC
Integrated ARM7TDMI up to 50 MHz
Support 16 and 32 bit data bus operation
Separate internal and external buses
On-chip 1Mb EDO DRAM for GPS navigation
Instruction cache to improve throughput
Integrated high-precision Real-Time Clock
Extensive GPS receiver peripherals
2 UARTS, high speed serial bus,
battery backed SRAM, >40 GPIO
GRF2i - Cost Effective RFIC
On-chip VCO and reference oscillator
Single stage L1 to IF down-conversion
Integrated LNA
Simplified digital interface
GSW2 Modular Software
Easily integrated into existing systems
90% CPU throughput available for user tasks
Tunable performance in all applications
1
3
Evaluate
2
Develop
Build
SiRF's technology is protected by U.S. and foreign patents pending and issued. SiRF and the SiRF logo are registered trademarks of SiRF Technology, Inc. SiRFstar, SiRF Powered, SnapLock, Foliage Lock,
TricklePower, SingleSat, SiRFLoc, SiRFDRive, SnapStart, Push-to-Fix, SiRFNav, SiRFWare and WinSiRF are trademarks of SiRF Technology, Inc. Other trademarks are property of respective companies.
January 2002
Rev. 1.1
APPLICATIONS
The SiRFstarIIe is a flexible GPS chip set that integrates into a postage-
sized receiver. It works well where GPS is the main function, "GPS-
centric" or where the design calls for stand-alone GPS functionality.
"GPS-centric applications include handheld GPS, marine GPS, and
personal locators. The processing power can be used for such user
tasks as running an LCD. The SiRFstarIIe can also be used where a
low-cost autonomous GPS is needed such as in vehicle location.
For more information, contact your SiRF representative, call our sales force on
+1 (408) 467-0410, or visit us at www.sirf.com.
CHIP ORDERING CONFIGURATION
RF CHIP PACKAGES
DIGITAL CHIP PACKAGES
Chip Name
SiRFstarII GRF2i
SiRFstarII GRF2i (QFN)
Chip PN
1540-0005
1540-0204
Package
LQFP, 48 pin
(LPCC), 32 pin
Chip Name
SiRFstarII GSP2e
SiRFstarII GSP2e
SiRFstarII GSP2e
Chip PN
1540-7400
1540-7401
1540-7410
Package
TQFP, 16-bit, 100 pin
BGA, 16-bit, 144 pin
LQFP, 32-bit, 144 pin
TECHNICAL SPECIFICATIONS
SiRF California
+1 (408) 467-0410
sales@sirf.com
SiRF Texas
Central U.S.
+1 (972) 239-6988
jdaniels@sirf.com
SiRF Florida
Eastern U.S. and Canada
+1 (407) 324-5260
mmayo@sirf.com
SiRF United Kingdom
+44 1344 668390
aellis@sirf.com
SiRF France
+33 3 82 86 04 15
rocky@sirf.com
SiRF Germany
+49 81 529932-90
peterz@sirf.com
SiRF Taiwan
+886 2 2723 7853
tomlin@sirf.com
WORLDWIDE SALES OFFICES
Position Accuracy (95%)
Autonomous
WAAS
Beacon DGPS
Receiver
Tracking
Channels
Max. Update Rate
Sensitivity
Max. Altitude
Max. Velocity
Protocol Support
<10m
<5m
<2.5m
L1, CA code
12
10Hz
-172dBW
<60,000 ft
<1,000 knots
NMEA, SiRF Binary
Acquisition
Reacquisition Time
SnapStart
Hot Start
Warm Start
Cold Start
Power
Draw - Full Power
Draw - TricklePower
Voltage
100msec
<3sec
<8sec
<38sec
<50sec
<500mW
<150mW
2.7-3.3V (5V I/O capable)
