© Semiconductor Components Industries, LLC, 2017
September, 2018 − Rev. 1 1Publication Order Number:
NSPM3041/D
NSPM3041
4.5V Bidirectional ESD and
Surge Protection Device
The NSPM3041 is designed to protect voltage sensitive components
from ESD. Excellent clamping capability, low leakage, high peak
pulse current handling capability and fast response time provide best
in class protection on designs that are exposed to ESD. Because of its
small size, it is suited for use in cellular phones, tablets, MP3 players,
digital cameras and many other portable applications where board
space comes at a premium.
Features
Low Clamping Voltage
Low Leakage
Small Body Outline: 1.0 mm x 0.6 mm
Protection for the following IEC Standards:
IEC61000−4−2 Level 4: ±30 kV Contact Discharge
IEC61000−4−5 (Lightning) 40 A (8/20 ms)
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Battery Line Protection
Audio Line Protection
GPIO
MAXIMUM RATINGS
Rating Symbol Value Unit
IEC 61000−4−2 (ESD) Contact
Air ±30
±30 kV
Operating Junction and Storage
Temperature Range TJ, Tstg −65 to +150 °C
Maximum Peak Pulse Current IPP 40 A
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be af fected.
Device Package Shipping
ORDERING INFORMATION
www.onsemi.com
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer t o our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
NSPM3041MXT5G X2DFN2
(Pb−Free) 8000 / Tape &
Reel
MARKING
DIAGRAM
X2DFN2
CASE 714AB
12
P = Specific Device Code
M = Date Code
PM
NSPM3041
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2
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol Parameter
IPP Maximum Reverse Peak Pulse Current
VCClamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IRMaximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
ITTest Current
*See Application Note AND8308/D for detailed explanations of
datasheet parameters. Bi−Directional Surge Protection
IPP
IPP
V
I
IR
IT
IT
IR
VRWM
VCVBR VRWM VC
VBR
RDYN
RDYN
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Parameter Symbol Conditions Min Typ Max Unit
Reverse Working Voltage VRWM I/O Pin to GND 4.5 V
Breakdown Voltage VBR IT = 1 mA, I/O Pin to GND 5.3 6.1 7.5 V
Reverse Leakage Current IRVRWM = 4.5 V, I/O Pin to GND 0.1 mA
Clamping Voltage VCIEC61000−4−2, ±8 kV Contact See Figures 1 & 2 V
Clamping Voltage TLP (Note 1) VCIPP = 8 A, IEC61000−4−2 Level 2 Equivalent
(±4 kV Contact, ± 8 kV Air) 6.0 V
IPP = 16 A, IEC61000−4−2 Level 4 Equivalent
(±8 kV Contact, ± 15 kV Air) 6.25
Reverse Peak Pulse Current IPP IEC61000−4−5 (8 x 20 ms) per Figure 14 40 A
Clamping Voltage 8x20 ms
Waveform per Figure 14 (Note 2) VCIPP = 1 A
IPP = 40 A 5.6
7.8 6.6
8.5 V
Dynamic Resistance RDYN 100 ns TLP Pulse 0.03 W
Junction Capacitance CJVR = 0 V, f = 1 MHz 80 100 pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. ANSI/ESD STM5.5.1 Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP condtions: Z0 = 50 W, tp = 100 ns, tr = 1 ns, averaging window: t1 = 70 ns to t2 = 90 ns.
2. Non−repetitive current pulse at TA = 25°C, per IEC61000−4−5 waveform.
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TYPICAL CHARACTERISTICS
Figure 1. ESD Clamping Voltage
Positive 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage
Negative 8 kV Contact per IEC61000−4−2
TIME (ns) TIME (ns)
140100806040200−20
−5
0
10
15
20
30
35
140100806040200−20
−40
−35
−30
−25
−15
−10
−5
5
VOLTAGE (V)
VOLTAGE (V)
5
25
40
−20
0
Figure 3. Positive TLP I−V Curve
ITLP (A)
VCTLP (V)
18
16
14
12
10
8
6
4
2
001234 65
20
7
Figure 4. Negative TLP I−V Curve
ITLP (A)
VCTLP (V)
−18
−16
−14
−12
−10
−8
−6
−4
−2
00−1234 6−5
−20
Figure 5. Positive Clamping Voltage vs. Peak
Pulse Current (tp = 8/20 ms)
VC @ IPK (V)
IPK (A)
0353051015 2520
8
6
4
2
05540 5045
9
7
5
3
1
Figure 6. Negative Clamping Voltage vs. Peak
Pulse Current (tp = 8/20 ms)
VC @ IPK (V)
IPK (A)
0353051015 2520
8
6
4
2
040 45 5550
9
7
5
3
1
120 120
9810
9
8
7
6
5
4
3
2
1
0
10
VIEC Eq (kV)
9
8
7
6
5
4
3
2
1
0
10
VIEC Eq (kV)
−7 −8 −10−9
1010
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4
TYPICAL CHARACTERISTICS
Figure 7. Breakdown Voltage Figure 8. Reverse Leakage Current
VR (V) VR (V)
4310−1−2−4−8
1E−11
1E−07
4320−2−3−5−8
1E−12
1E−11
1E−10
1E−09
1E−07
1E−05
1E−04
1E−03
Figure 9. Line Capacitance, f = 1 MHz
VBIAS (V)
3210−1−2−3−5
0
10
30
40
50
70
90
IR (A)
IR (A)
C (pF)
−4 −1 1 5 8
1E−08
1E−06
−3 2 8
1E−06
1E−08
1E−09
1E−10
1E−04
1E−03
1E−05
5
20
60
80
567−5−6−7 67−6−7
4−4
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5
Transmission Line Pulse (TLP) Measurement
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 10. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 11 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels. For more information
on TLP measurements and how to interpret them please
refer to AND9007/D.
Figure 10. Simplified Schematic of a Typical TLP
System
DUT
LS÷
Oscilloscope
Attenuator
10 MW
VC
VM
IM
50 W Coax
Cable
50 W Coax
Cable
Figure 11. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
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IEC 61000−4−2 Spec.
Level Test Volt-
age (kV)
First Peak
Current
(A) Current at
30 ns (A) Current at
60 ns (A)
1 2 7.5 4 2
2 4 15 8 4
3 6 22.5 12 6
4 8 30 16 8
Ipeak
90%
10%
IEC61000−4−2 W aveform
100%
I @ 30 ns
I @ 60 ns
tP = 0.7 ns to 1 ns
Figure 12. IEC61000−4−2 Spec
50 W
50 W
Cable
DUT Oscilloscope
ESD Gun
Figure 13. Diagram of ESD Test Setup
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
Figure 14. 8 X 20 ms Pulse Waveform
100
90
80
70
60
50
40
30
20
10
0020406080
t, TIME (ms)
% OF PEAK PULSE CURRENT
tP
tr
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
PEAK VALUE IRSM @ 8 ms
HALF VALUE IRSM/2 @ 20 ms
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7
PACKAGE DIMENSIONS
X2DFN2 1.0x0.6, 0.65P
CASE 714AB
ISSUE B
ÉÉ
ÉÉ
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. EXPOSED COPPER ALLOWED AS SHOWN.
A B
E
D
BOTTOM VIEW
b
L
0.10 C
TOP VIEW 0.05 C
A
A1
0.10 C
0.10 C
CSEATING
PLANE
SIDE VIEW
DIM MIN NOM
MILLIMETERS
A0.34 0.37
A1 −− 0.03
b0.45 0.50
D
E
SOLDER FOOTPRINT*
DIMENSIONS: MILLIMETERS
1.20
0.60
1
L0.20 0.25
0.47
RECOMMENDED
PIN 1
PIN 1
INDICATOR
e0.65 BSC
A
M
0.05 BC
A
M
0.05 BC
2X
e
e/2
2X 2X
NOTE 3
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
0.95 1.00
0.55 0.60
MAX
0.40
0.05
0.55
0.30
1.05
0.65
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