Si9113
Vishay Siliconix
Document Number: 71093
S-40746—Rev. B. 19-Apr-04
www.vishay.com
1
High-Voltage Current Mode PWM Controller for
ISDN Power Supplies
FEATURES
DBiC/DMOS Technology
DCurrent Mode Control
DMax 50% Duty Cycle Operation
D1.3-MHz Error Amp
DUp to 500-kHz Internal Oscillator
DSoft-Start
D0.6-V Fast Over-Current Protection
D<5-mA Supply Current for +VIN <18 V
D23.5-V to 200-V Input Voltage Range
DProgrammable Start/Stop Capability
DInternal Start-Up Circuit
DPower_Good Output
DESCRIPTION
Si9113 is a current mode PWM controller for ISDN power
supplies. In a 14-pin SOIC package, it provides all necessary
functions to implement a single-switch PWM with a minimum
of external parts. To maximize the circuit integration, the
Si9113 is designed with a 200-V depletion mode MOSFET
capable of powering directly off the high input bus without an
external start-up circuit. The Start and Stop input voltage
thresholds can be programmed within the operating input
voltage range by means of a resistor divider, provided +VIN
(Start) > +VIN (Stop). The internal clock frequency is set with
a single external resistor and is capable of capacitor-coupled
external synchronization. In order to satisfy the stringent
ambient temperature requirements, the Si9113 is rated to
handle the industrial range of 40_C to 85_C.
The Si9113 is available in both standard and lead (Pb)-free
packages.
FUNCTIONAL BLOCK DIAGRAM
Start-Up
Stop/Start
Power_Good
VREF = 1.3 V
Drive
Current
Comparator
Fast
Current
Limit
Comparator
VIN (23.5 V to 200 V)
VOUT
See Detailed Block Diagram, page 7.
Applications information see AN728.
A Demonstration Borad data sheet is available for this product.
Si9113
Vishay Siliconix
www.vishay.com
2Document Number: 71093
S-40746—Rev. B. 19-Apr-04
ABSOLUTE MAXIMUM RATINGS
VIN 220 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCC 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Inputs (OSC IN, OSC OUT, PWR_GOOD) 0.3 V to VCC + 0.3 V. . .
or "10 mA
Linear Inputs (FB, VREF, SENSE, SS) 0.3 V to VCC + 0.3 V. . . . . . . . . . . .
Storage Temperature 65 to 150_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature 40 to 85_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature 150_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation (Package)a
14-Pin SOIC (Y Suffix)b900 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Impedance (QJA)
14-Pin SOIC 140_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 7.2 mW/_C above 25_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
VIN 23.5 V to 200 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCC 10 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputs 0 V to VCC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linear Outputs 0 V to VCC 3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
FOSC 30 kHz to 500 kHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPECIFICATIONSa
Test Conditions
Unless Otherwise Specified Limits
40 to 85_C
Parameter Symbol
p
VCC = 10 V, +VIN = 48 V, ROSC = 390 kWTempbMincTypdMaxcUnit
Reference
Output Voltage VREF OSCIN = VIN (OSC Disabled)
RL = 10 MW
Room
Full
1.275
1.26
1.3
1.3
1.325
1.34 V
Short Circuit Current ISREF VREF = VIN Room 25 10 mA
Load Regulation
DVREF
IREF = 0 to 0.5 mA Full "10 40
mV
Line Regulation DVREF VCC = 10 to 14 V Full "2 5 mV
UVLO
Under Voltage Lockout
VUVSTART Turn-On Full 8.10 8.8 9.50
V
Under Voltage Lockout VUVSTOP Turn-Off Full 8.10 8.8 9.50 V
Input Bias Current
ISTART
VSTOP = 8 V VSTART = 8 V
Room 0.05
mA
Input Bias Current ISTOP
VSTOP = 8 V, VSTART = 8 V Room 0.05 mA
Pre-Regulated VCC VREG Room 8.5 9.0 9.5
UVLO for VCC VCCUV Room 7.9 8.4 8.9 V
VREG VCCUV VDRoom 0.3 0.6
PWR_Good Comparator
Rise Time trpg
CPWR G d = 100 nF
Room 35 mS
Fall Time tfpg
CPWR_Good = 100 nF Room 25 mS
Output Logic Low ISINK = 2.5 mA Room 0.4 0.8 V
Soft-Start
SS Current ISS Room 11 mA
Output Inhibit Voltage VSS Room 3.3 V
Oscillator
Maximum FrequencyefMAX ROSC = 0 Room 500
Initial Accuracy
fOSC
ROSC = 390 k (Note f) Room 80 100 120 kHz
Initial Accuracy fOSC ROSC = 180 k (Note f) Room 160 200 240
Voltage Stability Df/f Df/f = (f [14 V] f [10 V]) / f [10 V] Room 10 15 %
Temperature CoefficienteTOSC Full 450 650 ppm/_C
Maximum Duty Cycle DMAX fOSC = 100 kHz Room 50 %
Si9113
Vishay Siliconix
Document Number: 71093
S-40746—Rev. B. 19-Apr-04
www.vishay.com
3
SPECIFICATIONSa
Limits
40 to 85_C
Test Conditions
Unless Otherwise Specified
VCC = 10 V, +VIN = 48 V, ROSC = 390 kW
Parameter UnitMaxc
Typd
Minc
Tempb
Test Conditions
Unless Otherwise Specified
VCC = 10 V, +VIN = 48 V, ROSC = 390 kW
Symbol
Error Amplifier
Open Loop Voltage GaineAVOL OSC IN = VIN Room 50 60 dB
Input BIAS Current IBIAS VFB = 1.3 V Room 1 1 mA
Feedback Input Voltage VFB FB Tied to COMP, OSC IN = VIN Full 1.28 1.32 V
Dynamic Output ImpedanceeZOUT Room 1 2 kW
Unity Gain BandwidtheBW Room 1 1.3 MHz
Output Current
IOUT
Source VFB = 0.8 V Room 51
mA
Output Current IOUT Sink VFB = 1.8 V Room 0.12 0.15 mA
Power Supply RejectionePSRR Room 50 70 dB
Current Limit Comparator
Threshold Voltage VSOURCE VFB = 0 V Full 0.5 0.6 0.7 V
Delay to OutputetdVSENSE = 0.85 V, See Figure 1 Full 100 150 ns
Output Drive
Output High Voltage VOH IOUT = 10 mA Room
Full
9.7
9.5
V
Output Low Voltage VOL IOUT = 10 mA Room
Full
0.3
0.5
V
Rise Time trCL = 500
p
FRoom 40 75
ns
Fall Time tf
CL = 500 pF
(10% to 90%) Room 40 75 ns
Supply
Supply Current
ICC VCC = 10 V, ROSC = 390 kW
VUVUP vVIN v 200 V Full 1 1.4 mA
Supply Current
IVIN Excluding I From Resistive Divider of
Stop and Start Pins Room 75 100 mA
Supply Current UVLO Mode IVIN +VIN v 18 V, VSTART (Pin 14) < 8.8 V Room 2 5
mA
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25_C, Full = 40 to 85_C.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. CSTRAY Pin 8 = v 5 pF.
TIMING WAVEFORMS
FIGURE 1 . Delay Time for Current Sense
90%
OUTPUT
SENSE
0
.
8
5
V
50%
0
td
VCC
0
tr v 10 ns
Si9113
Vishay Siliconix
www.vishay.com
4Document Number: 71093
S-40746—Rev. B. 19-Apr-04
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
10
10
1000
300
2000100
Output Frequency vs. Oscillator Resistance
100
7
8
9
10
11
12
13
40 20 0 20 40 60 80 100
0.0
0.4
0.8
1.2
1.6
2.0
0 50 100 150 200 250 300
8.4
8.5
8.6
8.7
8.8
8.9
9.0
9.1
50 25 0 25 50 75 100
14
16
18
20
22
24
9 101112131415
1.298
1.300
1.302
1.304
1.306
50 25 0 25 50 75 100
VCC = 14 V
VCC = 10 V
VREF vs. Temperature (VIN = 48 V) VUVSTART/VUVSTOP vs. Temperature
Output Frequency vs. Supply Voltage
Temperature (_C)
(V)VREF
(v)VUVSTART
VCC (V)
FOUT (kHz)
(kHz)F
OUT
FOSC (kW)
Supply Current vs. Output Frequency
Soft-Start Current vs. Temperature
Temperature (_C)
VCC = 12 V
VCC = 10 V
/VUVSTOP
Temperature (_C)
VCC = 14 V
VCC = 12 V
VCC = 10 V
(mA)I CC
40_C
25_C
85_C
(kHz)F
OUT
(I SS mA)
ROSC = 1 MW
VCC = 10 V
Si9113
Vishay Siliconix
Document Number: 71093
S-40746—Rev. B. 19-Apr-04
www.vishay.com
5
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
11 13 15 17 19 21
0.1
1
10
0
20
40
60
80
0 200 400 600 800
UVLO Supply Current vs. VIN Output Rise Time vs. Load
VIN (V) COUT (pF)
(I IN (mA)
Rise/Fall Time (nS)
85_C
25_C
40_C
VCC = 10 V
10
20
30
40
50
60
70
80
90
0 200 400 600 800 1000
Efficiency vs. Output Power
WO (mW)
Efficiency (%)
VIN = 28 V
VIN = 99 V
VIN = 48 V
STOP START
VIN COMP
SENSE FB
PWR_GOOD VREF
VIN SS
DRIVER OSCOUT
VCC OSCIN
SOIC-14
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Top View
Si9113
Si9113
Vishay Siliconix
www.vishay.com
6Document Number: 71093
S-40746—Rev. B. 19-Apr-04
PIN CONFIGURATION
ORDERING INFORMATION
Part Number Temperature Range Package
Si9113DY Bulk
Si9113DY-T1 40 to 85_C
Tape and Reel
Si9113DY-T1—E3 Tape and Reel
Eval Kit Temperature Range Board Type
Si9113D1
10 to 70
_
C
Surface Mount and
Si9113D2 10 to 70_C
Surface Mount and
Thru-Hole
PIN DESCRIPTION
Pin Number Name Function
1 STOP Set up the stop threshold of +VIN for VCC via resistive dividers
2 +VIN Input voltage to UVLO and Start-Up circuitry
3 SENSE Current sense amplifier input for current mode control and OCP.
4 PWR_GOOD Logic high PWR_Good signal indicates FB voltage is within regulation.
5VIN Ground pin
6 DRIVER MOSFET gate drive signal.
7 VCC Supply voltage to internal circuitry and MOSFET gate drive.
8 OSCIN ROSC terminal
9 OSCOUT ROSC terminal, square waveform output
10 SS Soft-Start, time programmed by capacitor value.
11 VREF 1.3-V reference. Decoupled with 0.1-mF capacitor.
12 FB Inverting input of an error amplifier.
13 COMP Error amplifier output for external compensation network.
14 START Set up the start threshold of +VIN for VCC via resistive dividers
Si9113
Vishay Siliconix
Document Number: 71093
S-40746—Rev. B. 19-Apr-04
www.vishay.com
7
DETAILED BLOCK DIAGRAM
+
+
+
OSC
3.6 V
Ref
Gen
R
S
Q
SENSE
3
PWM
Comparator
C/L
0.6 V
11
Comparator
Error
Amplifier
VREF
5
6
VIN
DRIVER
Clock (1/2 fOSC)
12
FB
VCC
4
PWR_GOOD
13
COMP
10
SS
+
7
VCC
Start-Up
Pre-Regulator
Enable
Programmable
Start/Stop
2
VIN
Circuit
1
STOP
14
START
MOS Driver
OSCOUT
9
OSCIN
8
DETAILED DESCRIPTION
Start-Up
The Si9113 start-up circuit prevents the internal circuits from
turning on until the voltage on the +VIN pin, via the resistor
divider R3, R4, R5, is sufficiently positive such that the voltage
across R3 (VSTART) is >8.8 V (typical value for the internal
reference VUVSTART [see Figure 2]). When this occurs, the
internal 1.3-V reference, soft-start and oscillator circuits are
enabled. A constant current source provides the current to the
external soft-start capacitor, which allows the output voltage to
rise gradually without overshoot. The output drive circuit is
disabled until the soft-start voltage reaches 3.3 V. The
controller is continuously powered in the state until the VIN
voltage falls and VSTOP drops below 8.8 V (the typical value for
the internal reference VUVSTOP). The user can program the
+VIN START and +VIN STOP voltage with the external resistor
divider R3R5 (see Figure 2) as follows:
VIN(START) +ǒR3)R4)R5
R5Ǔ VUVSTART (1)
VIN(STOP) +ǒR3)R5
R5Ǔ VUVSTOP (2)
Since VUVSTART = VUVSTOP = 8.8 V (typical) the hysteresis
voltage can be expressed as:
Si9113
Vishay Siliconix
www.vishay.com
8Document Number: 71093
S-40746—Rev. B. 19-Apr-04
DVIN +ǒR4
R5Ǔ VUVSTART (3)
VCC Circuit
The depletion MOSFET process allows the Si9113 controller
to power directly from the high input bus voltage. Once
VUVSTART is met, the pre-regulator start-up circuit generates
the 9.0-V VCC voltage. The VCC voltage is used internally to
power the IC as well as providing the drive current for the
external MOSFET. An internal VCC circuit is disabled once a
higher external voltage (X10 V) is applied to this pin. If VCC is
below VCCUV, the Si9113 will inhibit the driver output switching.
REF
The reference voltage of Si9113 is set at 1.3 V. The reference
voltage is internally connected to the non-inverting input of
error amplifier. The reference is decoupled with 0.1-mF
capacitor.
Soft-Start
The soft-start circuit provides a constant 10-mA current to
external capacitor attached to SS pin. A constant soft-start
current forces a gradual increase in duty cycle which in turn
ensures gradual output voltage rise without overshooting. The
soft-start time is programmed by the capacitance value.
Oscillator
The oscillator consists of a ring of CMOS inverters, capacitors,
and a capacitor discharge switch. An external resistor, ROSC,
between the OSCIN and OSCOUT pins sets the frequency. The
maximum frequency is obtained when ROSC = 0 W. A
frequency divider in the logic section limits the switch duty
cycle to 50% by locking the switching frequency to one-half of
the oscillator frequency.
PWM Mode
As the load and line voltage vary, the switching frequency
remains constant. The switching frequency is programmed by
the ROSC value as shown by the oscillator curve. In the PWM
mode, a duty cycle pulse is generated for each switching
period eliminating any chance of undesirable noise frequency.
When the output load current decreases to 0 A, the controller
is forced to enter the pulse skipping mode. This is a natural
phenomenal for all controllers since the duty cycle cannot
decrease linearly to 0%.
Error Amplifier
The error amplifier gain-bandwidth product and slew rate are
critical parameters which determine the transient response of
converter. The transient response is the function of both small
and large signal responses. The small signal response is
determined by the converter closed loop bandwidth and phase
margin while the large signal is determined by the error
amplifier dv/dt and the inductor di/dt slew rate. Besides the
inductance value, the error amplifier determines the converter
response time. In order to minimize the response time, the
Si9113 is designed with 1.3-MHz error amplifier
gain-bandwidth product to generate the widest converter
bandwidth.
Current Limit
Over current protection circuit is provided by monitoring the
voltage on the Sense pin. Once the current sense voltage
reaches 0.6V peak, the output drive stage is disabled for the
remainder of the clock cycle.
Power_Good Comparator
The PWR_Good signal indicates the status of output voltage.
If the output voltage and VCC are within regulation, the
PWR_Good signal generates a logic high output by monitoring
the voltage on COMP and VCC pins. If either one is out of
regulation, a logic low PWR_Good signal is generated. The
capacitor at the PWR_Good pin determines the rise time of the
power good signal, once all the conditions are met for power
good. The PWR_Good signal is an open collector output
capable of sinking 2.5 mA.
MOSFET Gate Drive
The DRIVER pin is designed to drive the low-side n-channel
MOSFET. Typically, the driver stage is sized to sink and source
200-mA of peak current when VCC = 12 V.
Si9113
Vishay Siliconix
Document Number: 71093
S-40746—Rev. B. 19-Apr-04
www.vishay.com
9
TYPICAL APPLICATION CIRCUITS
C9
220 pF
OSCIN
OSCOUT
SS
VREF
FB
COMP
START
VCC
DR
GND
PWR_G
ICS
VIN
STOP
Si9113
7
6
5
4
2
1
3
8
9
10
11
13
14
12
R5
3.96 MW
R4
1 MW
R2
300 kW
C8
0.01 mF
C3
100 pF
C6
0.1 mF
C7
0.001 mF
R1
1 MW
R3
5.1 MW
R10
13 kW
R9
20 kW
C5
0.1 mF
R11
1 kW
R7
2 W
1/2 W
C12
0.1 mF
D2
ESIG
NS2 C10
2.2 mF
50 V
D4*
BZX84C43
40 V
COM2
C10
220 mF
10 V
D3
B130LB
COM1
3.3 V
R13
2.7 W
D1
ESIG
1, 2, 5, 6
Q01 Si3420DV
NP
7
9
8
NS3
1
3
3
1
+
T1
XFMR_EPC17
C4
1 mF
C1
22 mF
160 V
AC
AC
+
2
1
3
4
28 99 V
+VIN
VIN 6
5
BR1
DF02S
*Optional
+
3
FIGURE 2. Dual Output Flyback Converter with 2% Regulation for 3.3 V
( As used on Demo Board—DB1)
4
Si9113
Vishay Siliconix
www.vishay.com
10 Document Number: 71093
S-40746—Rev. B. 19-Apr-04
TYPICAL APPLICATION CIRCUITS
3.3 V
C9
470 pF
OSCIN
OSCOUT
SS
VREF
FB
COMP
START
VCC
DR
GND
PWR_G
ICS
VIN
STOP
Si9113
7
6
5
4
2
1
3
8
9
10
11
13
14
12
R5
3.96 MW
R4
1 MW
R2
300 kW
C8
0.01 mF
C3
100 pF
C6
0.1 mF
C7
0.001 mF
R1
1 MW
R3
5.1 MW
C5
0.1 mF
R11
1 kW
R7
2 W
1/2 W
D2
ESIG
NS2 C10
2.2 mF
50 V
D4*
BZX84C43
40 V
COM2
R13
2.7 W
D1
ESIG
1, 2, 5, 6
Q01 Si3420DV
NP
8
6
NS3
4
3
3
1
+
T1
XFMR_EPC17
C1
22 mF
160 V
AC
AC
+
2
1
3
4
28 99 V
+VIN
VIN 5
9
BR1
DF02S
*Optional
+
3
FIGURE 3. Dual Output Flyback Converter with Moderately Regulated Outputs
(As used on Demo Board DB-2)
D3
B130LB
NS1 C11
220 mF
10 V
COM1
2
1
+C12
0.1 mF
C4
1 mF
R10
12.7 kW
R9
89 kW
4
Legal Disclaimer Notice
Vishay
Document Number: 91000 www.vishay.com
Revision: 08-Apr-05 1
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
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Ø
ALL LEADS
0.101 mm
0.004
E
D
eBA1
A
H
L
C
0.25
(GAGE PLANE)
1234567
14 13 12 11 10 9 8
Package Information
Vishay Siliconix
Document Number: 72809
28-Jan-04
www.vishay.com
1
SOIC (NARROW): 14-LEAD (POWER IC ONLY)
MILLIMETERS INCHES
Dim Min Max Min Max
A1.35 1.75 0.053 0.069
A10.10 0.20 0.004 0.008
B0.38 0.51 0.015 0.020
C0.18 0.23 0.007 0.009
D8.55 8.75 0.336 0.344
E3.8 4.00 0.149 0.157
e1.27 BSC 0.050 BSC
H5.80 6.20 0.228 0.244
L0.50 0.93 0.020 0.037
Ø0_8_0_8_
ECN: S-40080—Rev. A, 02-Feb-04
DWG: 5914
Legal Disclaimer Notice
www.vishay.com Vishay
Revision: 02-Oct-12 1Document Number: 91000
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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.