LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 LM613 Dual Operational Amplifiers, Dual Comparators, and Adjustable Reference Check for Samples: LM613 FEATURES DESCRIPTION 1 OP AMP 23 * * * * * * * * * Low Operating Current (Op Amp): 300 A Wide Supply Voltage Range: 4V to 36V Wide Common-Mode Range: V- to (V+ - 1.8V) Wide Differential Input Voltage: 36V Available in Plastic Package Rated for Military Temp. Range Operation REFERENCE Adjustable Output Voltage: 1.2V to 6.3V Tight Initial Tolerance Available: 0.6% Wide Operating Current Range: 17 A to 20 mA Tolerant of Load Capacitance APPLICATIONS * * * * Transducer Bridge Driver Process and Mass Flow Control Systems Power Supply Voltage Monitor Buffered Voltage References for A/D's The LM613 consists of dual op-amps, dual comparators, and a programmable voltage reference in a 16-pin package. The op-amps out-performs most single-supply op-amps by providing higher speed and bandwidth along with low supply current. This device was specifically designed to lower cost and board space requirements in transducer, test, measurement, and data acquisition systems. Combining a stable voltage reference with wide output swing op-amps makes the LM613 ideal for single supply transducers, signal conditioning and bridge driving where large common-mode-signals are common. The voltage reference consists of a reliable band-gap design that maintains low dynamic output impedance (1 typical), excellent initial tolerance (0.6%), and the ability to be programmed from 1.2V to 6.3V via two external resistors. The voltage reference is very stable even when driving large capacitive loads, as are commonly encountered in CMOS data acquisition systems. As a member of TI's Super-BlockTM family, the LM613 is a space-saving monolithic alternative to a multichip solution, offering a high level of integration without sacrificing performance. Connection Diagrams Top View Figure 1. CDIP and SOIC Packages See Package Numbers NFE0016A and DW0016B Figure 2. E Package Pinout 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Super-Block is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2000-2013, Texas Instruments Incorporated LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com *10k must be low t.c. trimpot Figure 3. Ultra Low Noise, 10.00V Reference Total Output Noise is Typically 14 VRMS 2 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Voltage on Any Pin Except VR (referred to V-pin) See (3) 36V (Max) See (4) -0.3V (Min) Current through Any Input Pin & VR Pin 20 mA Military and Industrial Differential Input Voltage 36V Commercial 32V -65C TJ +150C Storage Temperature Range Maximum Junction Temperature (5) Thermal Resistance, Junction-to-Ambient 150C (6) Soldering Information (10 Sec.) N Package 100C/W DW0016B Package 150C/W N Package 260C DW0016B Package 220C ESD Tolerance (7) (1) (2) (3) (4) (5) (6) (7) 1 kV Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device beyond its rated operating conditions. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Input voltage above V+ is allowed. As long as one input pin voltage remains inside the common-mode range, the comparator will deliver the correct output. More accurately, it is excessive current flow, with resulting excess heating, that limits the voltages on all pins. When any pin is pulled a diode drop below V-, a parasitic NPN transistor turns ON. No latch-up will occur as long as the current through that pin remains below the Maximum Rating. Operation is undefined and unpredictable when any parasitic diode or transistor is conducting. Simultaneous short-circuit of multiple comparators while using high supply voltages may force junction temperature above maximum, and thus should not be continuous. Junction temperature may be calculated using TJ = TA + PD JA.The given thermal resistance is worst-case for packages in sockets in still air. For packages soldered to copper-clad board with dissipation from one comparator or reference output transistor, nominal JA is 90C/W for the N package, and 135C/W for the DW0016B package. Human body model, 100 pF discharged through a 1.5 k resistor. Operating Temperature Range LM613AI, LM613BI -40C to +85C LM613AM, LM613M -55C to +125C LM613C 0C TJ +70C Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 3 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com Electrical Characteristics These specifications apply for V- = GND = 0V, V+ = 5V, VCM = VOUT = 2.5V, IR = 100 A, FEEDBACK pin shorted to GND, unless otherwise specified. Limits in standard typeface are for TJ = 25C; limits in boldface type apply over the Operating Temperature Range. Parameter IS Total Supply Current VS Supply Voltage Range Test Conditions RLOAD = , 4V V+ 36V (32V for LM613C) Typ (1) LM613AM LM613AI Limits (2) LM613M LM613I LM613C Limits (2) Units 450 550 940 1000 1000 1070 A (Max) A (Max) 2.2 2.9 2.8 3 2.8 3 V (Min) V (Min) 46 43 36 36 32 32 V (Max) V (Max) OPERATIONAL AMPLIFIERS VOS1 VOS Over Supply 4V V+ 36V (4V V+ 32V for LM613C) 1.5 2.0 3.5 6.0 5.0 7.0 mV (Max) mV (Max) VOS2 VOS Over VCM VCM = 0V through VCM = (V+ - 1.8V), V+ = 30V, V- = 0V 1.0 1.5 3.5 6.0 5.0 7.0 mV (Max) mV (Max) VOS3 T Average VOS Drift See IB Input Bias Current 10 11 25 30 35 40 nA (Max) nA (Max) IOS Input Offset Current 0.2 0.3 4 5 4 5 nA (Max) nA (Max) IOS1 T Average Offset Current RIN Input Resistance Differential CIN Input Capacitance Common-Mode en Voltage Noise In Current Noise CMRR (2) V/C (Max) 15 4 pA/C 1000 M 6 pF f = 100 Hz, Input Referred 74 nV/Hz f = 100 Hz, Input Referred 58 Common-Mode Rejection Ratio V+ = 30V, 0V VCM (V+ - 1.8V) CMRR = 20 log (VCM/VOS) 95 90 80 75 75 70 dB (Min) dB (Min) PSRR Power Supply Rejection Ratio 4V V+ 30V, VCM = V+/2, PSRR = 20 log (V+/VOS) 110 100 80 75 75 70 dB (Min) dB (Min) AV Open Loop Voltage Gain RL = 10 k to GND, V+ = 30V, 5V VOUT 25V 500 50 100 40 94 40 V/mV (Min) SR Slew Rate V+ = 30V (3) 0.70 0.65 0.55 0.45 0.50 0.45 V/s GBW Gain Bandwidth CL = 50 pF 0.8 0.5 VO1 Output Voltage Swing High RL = 10 k to GND, V+ = 36V (32V for LM613C) V+ - 1.4 V+ - 1.6 V+ - 1.7 V+ - 1.9 V+ - 1.8 V+ - 1.9 V (Min) V (Min) VO2 Output Voltage Swing Low RL = 10 k to V+, V+ = 36V (32V for LM613C) V- + 0.8 V- + 0.9 V- + 0.9 V- + 1.0 V- + 0.95 V- + 1.0 V (Max) V (Max) IOUT Output Source Current VOUT = 2.5V, V+IN = 0V, V-IN = -0.3V 25 15 20 13 16 13 mA (Min) mA (Min) ISINK Output Sink Current VOUT = 1.6V, V+IN = 0V, V-IN = 0.3V 17 9 14 8 13 8 mA (Min) mA (Min) ISHORT Short Circuit Current VOUT = 0V,V+IN = 3V, V-IN = 2V VOUT = 5V, V+IN = 2V, V-IN = 3V 30 40 50 60 50 60 mA (Max) mA (Max) 30 32 60 80 70 90 mA (Max) mA (Max) (1) (2) (3) 4 fA/Hz MHz MHz Typical values in standard typeface are for TJ = 25C; values in bold face type apply for the full operating temperature range. These values represent the most likely parametric norm. All limits are ensured at room temperature (standard type face) or at operating temperature extremes (bold type face). Slew rate is measured with the op amp in a voltage follower configuration. For rising slew rate, the input voltage is driven from 5V to 25V, and the output voltage transition is sampled at 10V and @ 20V. For falling slew rate, the input voltage is driven from 25V to 5V, and the output voltage transition is sampled at 20V and 10V. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 Electrical Characteristics (continued) These specifications apply for V- = GND = 0V, V+ = 5V, VCM = VOUT = 2.5V, IR = 100 A, FEEDBACK pin shorted to GND, unless otherwise specified. Limits in standard typeface are for TJ = 25C; limits in boldface type apply over the Operating Temperature Range. Parameter Test Conditions Typ (1) LM613AM LM613AI Limits (2) LM613M LM613I LM613C Limits (2) Units COMPARATORS VOS Offset Voltage 4V V+ 36V (32V for LM613C), RL = 15 k 1.0 2.0 3.0 6.0 5.0 7.0 mV (Max) mV (Max) VOS VCM Offset Voltage over VCM 0V VCM 36V V+ = 36V, (32V for LM613C) 1.0 1.5 3.0 6.0 5.0 7.0 mV (Max) mV (Max) VOS T Average Offset Voltage Drift 15 IB Input Bias Current 5 8 25 30 35 40 nA (Max) nA (Max) IOS Input Offset Current 0.2 0.3 4 5 4 5 nA (Max) nA (Max) AV Voltage Gain RL = 10 k to 36V (32V for LM613C) 2V VOUT 27V 500 100 V/mV V/mV tr Large Signal Response Time V+IN = 1.4V, V-IN = TTL Swing, RL = 5.1 k 1.5 2.0 s s ISINK Output Sink Current V+IN = 0V, V-IN = 1V, VOUT = 1.5V VOUT = 0.4V 20 13 10 8 10 8 mA (Min) mA (Min) 2.8 2.4 1.0 0.5 0.8 0.5 mA (Min) mA (Min) 0.1 0.2 10 10 A (Max) A (Max) ILEAK Output Leakage Current V+IN = 1V, V-IN = 0V, VOUT = 36V (32V for LM613C) V/C (Max) VOLTAGE REFERENCE VR Voltage Reference See (4) 1.244 1.2365 1.2515 (0.6%) 1.2191 1.2689 (2%) V (Min) V (Max) VR T Average Temp. Drift See (5) 10 80 150 ppm/C (Max) VR TJ Hysteresis See (6) 3.2 VR IR VR Change with Current VR(100 A) - VR(17 A) 0.05 0.1 1 1.1 1 1.1 mV (Max) mV (Max) VR(10 mA) - VR(100 A) See (7) 1.5 2.0 5 5.5 5 5.5 mV (Max) mV (Max) V/C R Resistance VR(100.1 mA)/9.9 mA VR(10017 A)/83 A 0.2 0.6 0.56 13 0.56 13 (Max) (Max) VR VRO VR Change with High VRO VR(Vro = Vr) - VR(Vro = 6.3V) (5.06V between Anode and FEEDBACK) 2.5 2.8 7 10 7 10 mV (Max) mV (Max) VR V+ VR Change with VANODE Change VR(V+ = 5V) - VR(V+ = 36V) (V+ = 32V for LM613C) 0.1 0.1 1.2 1.3 1.2 1.3 mV (Max) mV (Max) VR(V+ = 5V) - VR(V+ = 3V) 0.01 0.01 1 1.5 1 1.5 mV (Max) mV (Max) VANODE VFB 5.06V 22 29 35 40 50 55 nA (Max) nA (Max) IFB (4) (5) (6) (7) FEEDBACK Bias Current VR is the Cathode-to-feedback voltage, nominally 1.244V. Average reference drift is calculated from the measurement of the reference voltage at 25C and at the temperature extremes. The drift, in ppm/C, is 106*VR/(VR[25C]*TJ), where VR is the lowest value subtracted from the highest, VR[25C] is the value at 25C, and TJ is the temperature range. This parameter is ensured by design and sample testing. Hysteresis is the change in VR caused by a change in TJ, after the reference has been "dehysterized". To dehysterize the reference; that is minimize the hysteresis to the typical value, its junction temperature should be cycled in the following pattern, spiraling in toward 25C: 25C, 85C, -40C, 70C, 0C, 25C. Low contact resistance is required for accurate measurement. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 5 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com Electrical Characteristics (continued) These specifications apply for V- = GND = 0V, V+ = 5V, VCM = VOUT = 2.5V, IR = 100 A, FEEDBACK pin shorted to GND, unless otherwise specified. Limits in standard typeface are for TJ = 25C; limits in boldface type apply over the Operating Temperature Range. Parameter en VR Noise Test Conditions 10 Hz to 10 kHz, VRO = VR LM613AM LM613AI Limits (2) Typ (1) LM613M LM613I LM613C Limits (2) Units VRMS 30 Simplified Schematic Diagrams Figure 4. Op Amp 6 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 Figure 5. Comparator Figure 6. Reference/Bias Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 7 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (Reference) TJ = 25C, FEEDBACK pin shorted to V- = 0V, unless otherwise noted 8 Reference Voltage vs Temp. Reference Voltage Drift Figure 7. Figure 8. Accelerated Reference Voltage Drift vs Time Reference Voltage vs Current and Temperature Figure 9. Figure 10. Reference Voltage vs Current and Temperature Reference Voltage vs Reference Current Figure 11. Figure 12. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS (Reference) (continued) TJ = 25C, FEEDBACK pin shorted to V- = 0V, unless otherwise noted Reference Voltage vs Reference Current Reference AC Stability Range Figure 13. Figure 14. FEEDBACK Current vs FEEDBACK-to-Anode Voltage FEEDBACK Current vs FEEDBACK-to-Anode Voltage Figure 15. Figure 16. Reference Noise Voltage vs Frequency Reference Small-Signal Resistance vs Frequency Figure 17. Figure 18. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 9 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (Reference) (continued) TJ = 25C, FEEDBACK pin shorted to V- = 0V, unless otherwise noted 10 Reference Power-Up Time Reference Voltage with FEEDBACK Voltage Step Figure 19. Figure 20. Reference Voltage with 100 12 A Current Step Reference Step Response for 100 A 10 mA Current Step Figure 21. Figure 22. Reference Voltage Change with Supply Voltage Step Reference Change vs Common-Mode Voltage Figure 23. Figure 24. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS (Op Amps) V = 5V, V- = GND = 0V, VCM = V+/2, VOUT = V+/2, TJ = 25C, unless otherwise noted + Input Common-Mode Voltage Range vs Temperature VOS vs Junction Temperature Figure 25. Figure 26. Input Bias Current vs Common-Mode Voltage Large-Signal Step Response Figure 27. Figure 28. Output Voltage Swing vs Temp. and Current Output Source Current vs Output Voltage and Temp. Figure 29. Figure 30. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 11 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (Op Amps) (continued) + - V = 5V, V = GND = 0V, VCM = V+/2, VOUT = V+/2, TJ = 25C, unless otherwise noted 12 Output Sink Current vs Output Voltage Output Swing, Large Signal Figure 31. Figure 32. Output Impedance vs Frequency and Gain Small Signal Pulse Response vs Temp. Figure 33. Figure 34. Small-Signal Pulse Response vs Load Op Amp Voltage Noise vs Frequency Figure 35. Figure 36. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS (Op Amps) (continued) + - V = 5V, V = GND = 0V, VCM = V+/2, VOUT = V+/2, TJ = 25C, unless otherwise noted Op Amp Current Noise vs Frequency Small-Signal Voltage Gain vs Frequency and Temperature Figure 37. Figure 38. Small-Signal Voltage Gain vs Frequency and Load Follower Small-Signal Frequency Response Figure 39. Figure 40. Common-Mode Input Voltage Rejection Ratio Power Supply Current vs Power Supply Voltage Figure 41. Figure 42. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 13 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (Op Amps) (continued) + - V = 5V, V = GND = 0V, VCM = V+/2, VOUT = V+/2, TJ = 25C, unless otherwise noted Positive Power Supply Voltage Rejection Ratio Negative Power Supply Voltage Rejection Ratio Figure 43. Figure 44. Slew Rate vs Temperature Input Offset Current vs Junction Temperature Figure 45. Figure 46. Input Bias Current vs Junction Temperature Figure 47. 14 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS (Comparators) Output Sink Current Input Bias Current vs Common-Mode Voltage Figure 48. Figure 49. Comparator Response Times-- Inverting Input, Positive Transition Comparator Response Times-- Inverting Input, Negative Transition Figure 50. Figure 51. Comparator Response Times-- Non-Inverting Input, Positive Transition Comparator Response Times-- Non-Inverting Input, Negative Transition Figure 52. Figure 53. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 15 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (Comparators) (continued) 16 Comparator Response Times-- Inverting Input, Positive Transition Comparator Response Times-- Inverting Input, Negative Transition Figure 54. Figure 55. Comparator Response Times-- Non-Inverting Input, Positive Transition Comparator Response Times-- Non-Inverting Input, Negative Transition Figure . Figure 56. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 TYPICAL PERFORMANCE DISTRIBUTIONS Average VOS Drift Military Temperature Range Average VOS Drift Industrial Temperature Range Figure 57. Figure 58. Average VOS Drift Commercial Temperature Range Average IOS Drift Military Temperature Range Figure 59. Figure 60. Average IOS Drift Industrial Temperature Range Op Amp Voltage Noise Distribution Figure 61. Figure 62. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 17 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE DISTRIBUTIONS (continued) Average IOS Drift Commercial Temperature Range Op Amp Current Noise Distribution Figure 63. Figure 64. Voltage Reference Broad-Band Noise Distribution Figure 65. 18 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 APPLICATION INFORMATION VOLTAGE REFERENCE Reference Biasing The voltage reference is of a shunt regulator topology that models as a simple zener diode. With current Ir flowing in the "forward" direction there is the familiar diode transfer function. Ir flowing in the reverse direction forces the reference voltage to be developed from cathode to anode. The cathode may swing from a diode drop below V- to the reference voltage or to the avalanche voltage of the parallel protection diode, nominally 7V. A 6.3V reference with V+ = 3V is allowed. Figure 66. Voltage Associated with Reference (current source Ir is external) The reference equivalent circuit reveals how Vr is held at the constant 1.2V by feedback, and how the FEEDBACK pin passes little current. To generate the required reverse current, typically a resistor is connected from a supply voltage higher than the reference voltage. Varying that voltage, and so varying Ir, has small effect with the equivalent series resistance of less than an ohm at the higher currents. Alternatively, an active current source, such as the LM134 series, may generate Ir. Figure 67. Reference Equivalent Circuit Figure 68. 1.2V Reference Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 19 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com Capacitors in parallel with the reference are allowed. See the Reference AC Stability Range typical curve for capacitance values--from 20 A to 3 mA any capacitor value is stable. With the reference's wide stability range with resistive and capacitive loads, a wide range of RC filter values will perform noise filtering. Adjustable Reference The FEEDBACK pin allows the reference output voltage, Vro, to vary from 1.24V to 6.3V. The reference attempts to hold Vr at 1.24V. If Vr is above 1.24V, the reference will conduct current from Cathode to Anode; FEEDBACK current always remains low. If FEEDBACK is connected to Anode, then Vro = Vr = 1.24V. For higher voltages FEEDBACK is held at a constant voltage above Anode--say 3.76V for Vro = 5V. Connecting a resistor across the constant Vr generates a current I=R1/Vr flowing from Cathode into FEEDBACK node. A Thevenin equivalent 3.76V is generated from FEEDBACK to Anode with R2=3.76/I. Keep I greater than one thousand times larger than FEEDBACK bias current for <0.1% error--I32 A for the military grade over the military temperature range (I5.5 A for a 1% untrimmed error for a commercial part). Figure 69. Thevenin Equivalent of Reference with 5V Output R1 = Vr/I = 1.24/32 = 39k R2 = R1 {(Vro/Vr) - 1} = 39k {(5/1.24) - 1)} = 118k Figure 70. Resistors R1 and R2 Program Reference Output Voltage to be 5V Understanding that Vr is fixed and that voltage sources, resistors, and capacitors may be tied to the FEEDBACK pin, a range of Vr temperature coefficients may be synthesized. 20 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 Figure 71. Output Voltage has Negative Temperature Coefficient (TC) if R2 has Negative TC Figure 72. Output Voltage has Positive TC if R1 has Negative TC Figure 73. Diode in Series with R1 Causes Voltage Across R1 and R2 to be Proportional to Absolute Temperature (PTAT) Connecting a resistor across Cathode-to-FEEDBACK creates a 0 TC current source, but a range of TCs may be synthesized. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 21 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com I = Vr/R1 = 1.24/R1 Figure 74. Current Source is Programmed by R1 Figure 75. Proportional-to-Absolute-Temperature Current Source Figure 76. Negative-TC Current Source Reference Hysteresis The reference voltage depends, slightly, on the thermal history of the die. Competitive micro-power products vary-- always check the data sheet for any given device. Do not assume that no specification means no hysteresis. 22 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 OPERATIONAL AMPLIFIERS AND COMPARATORS Any amp, comparator, or the reference may be biased in any way with no effect on the other sections of the LM613, except when a substrate diode conducts, see (1) in Electrical Characteristics. For example, one amp input may be outside the common-mode range, another amp may be operating as a comparator, and all other sections may have all terminals floating with no effect on the others. Tying inverting input to output and noninverting input to V- on unused amps is preferred. Unused comparators should have non-inverting input and output tied to V+, and inverting input tied to V-. Choosing operating points that cause oscillation, such as driving too large a capacitive load, is best avoided. Op Amp Output Stage These op amps, like the LM124 series, have flexible and relatively wide-swing output stages. There are simple rules to optimize output swing, reduce cross-over distortion, and optimize capacitive drive capability: 1. Output Swing: Unloaded, the 42 A pull-down will bring the output within 300 mV of V- over the military temperature range. If more than 42 A is required, a resistor from output to V- will help. Swing across any load may be improved slightly if the load can be tied to V+, at the cost of poorer sinking open-loop voltage gain. 2. Cross-Over Distortion: The LM613 has lower cross-over distortion (a 1 VBE deadband versus 3 VBE for the LM124), and increased slew rate as shown in the characteristic curves. A resistor pull-up or pull-down will force class-A operation with only the PNP or NPN output transistor conducting, eliminating cross-over distortion. 3. Capacitive Drive: Limited by the output pole caused by the output resistance driving capacitive loads, a pulldown resistor conducting 1 mA or more reduces the output stage NPN re until the output resistance is that of the current limit 25. 200 pF may then be driven without oscillation. Comparator Output Stage The comparators, like the LM139 series, have open-collector output stages. A pull-up resistor must be added from each output pin to a positive voltage for the output transistor to switch properly. When the output transistor is OFF, the output voltage will be this external positive voltage. For the output voltage to be under the TTL-low voltage threshold when the output transistor is ON, the output current must be less than 8 mA (over temperature). This impacts the minimum value of pull-up resistor. The offset voltage may increase when the output voltage is low and the output current is less than 30 A. Thus, for best accuracy, the pull-up resistor value should be low enough to allow the output transistor to sink more than 30 A. Op Amp and Comparator Input Stage The lateral PNP input transistors, unlike those of most op amps, have BVEBO equal to the absolute maximum supply voltage. Also, they have no diode clamps to the positive supply nor across the inputs. These features make the inputs look like high impedances to input sources producing large differential and common-mode voltages. (1) Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device beyond its rated operating conditions. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 23 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com Typical Applications Figure 77. High Current, High Voltage Switch Figure 78. High Speed Level Shifter. Response Time is Approximately 1.5 s, Where Output is Either Approximately +V or -V. *10k must be low t.c. trimpot Figure 79. Ultra Low Noise, 10.00V Reference. Total Output Noise is Typically 14 VRMS. 24 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 LM613 www.ti.com SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 Figure 80. Basic Comparator Figure 81. Basic Comparator with External Strobe Figure 82. Wide-Input Range Comparator with TTL Output Figure 83. Comparator with Hysteresis (VH = +V(1k/1M)) Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 25 LM613 SNOSC11B - AUGUST 2000 - REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision A (March 2013) to Revision B * 26 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 25 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM613 PACKAGE OPTION ADDENDUM www.ti.com 15-Aug-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM613IWM LIFEBUY SOIC DW 16 45 TBD Call TI Call TI -40 to 85 LM613IWM LM613IWM/NOPB LIFEBUY SOIC DW 16 45 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 LM613IWM LM613IWMX LIFEBUY SOIC DW 16 1000 TBD Call TI Call TI -40 to 85 LM613IWM LM613IWMX/NOPB LIFEBUY SOIC DW 16 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 LM613IWM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 15-Aug-2017 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM613IWMX SOIC DW 16 1000 330.0 16.4 10.9 10.7 3.2 12.0 16.0 Q1 LM613IWMX/NOPB SOIC DW 16 1000 330.0 16.4 10.9 10.7 3.2 12.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM613IWMX SOIC DW 16 1000 367.0 367.0 38.0 LM613IWMX/NOPB SOIC DW 16 1000 367.0 367.0 38.0 Pack Materials-Page 2 GENERIC PACKAGE VIEW DW 16 SOIC - 2.65 mm max height SMALL OUTLINE INTEGRATED CIRCUIT Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4040000-2/H PACKAGE OUTLINE DW0016A SOIC - 2.65 mm max height SCALE 1.500 SOIC C 10.63 TYP 9.97 SEATING PLANE PIN 1 ID AREA A 0.1 C 14X 1.27 16 1 2X 8.89 10.5 10.1 NOTE 3 8 9 0.51 0.31 0.25 C A B 16X B 7.6 7.4 NOTE 4 2.65 MAX 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE 0.3 0.1 0 -8 1.27 0.40 DETAIL A (1.4) TYPICAL 4220721/A 07/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side. 5. Reference JEDEC registration MS-013. www.ti.com EXAMPLE BOARD LAYOUT DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SEE DETAILS SYMM 16 1 16X (0.6) SYMM 14X (1.27) 9 8 R0.05 TYP (9.3) LAND PATTERN EXAMPLE SCALE:7X METAL SOLDER MASK OPENING SOLDER MASK OPENING 0.07 MAX ALL AROUND METAL 0.07 MIN ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4220721/A 07/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DW0016A SOIC - 2.65 mm max height SOIC 16X (2) SYMM 1 16 16X (0.6) SYMM 14X (1.27) 9 8 R0.05 TYP (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:7X 4220721/A 07/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. 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