ACD30024 - Advanced Communication Devices

INTRODUCTORY

Brochure - ACD300xx, 3/99

ACD300xx Family

8-/12-/16-/24-Port Dual-Speed

“Super Class” Ethernet Hub Controllers

Advanced

Communication

Devices

GENERAL DESCRIPTION

The ACD300xx is a family of single chip Dual-Speed

“Super Class” Ethernet Hub controllers. It consists of

four members: the 8-port ACD30008, the 12-port

ACD30012, the 16-port ACD30016 and the 24-port

ACD30024. All controllers are in compliance with the

IEEE 802.3 and 802.3u standard. Each controller in-

cludes 8/12/16/24 independent 10/100 MACs, which

interface with external PMD/PHYs through standard MII

interfaces. Each port can operate at either 10Mbps or

100Mbps, which can be either automatically configured

or manually set.

The ACD300xx segregates each port into independent

collision domains, which allows multi-level cascading and

effectively removes the 205 meter network-diameter limi-

tation imposed on a traditional Dual-Speed hub based

networks. The non-blocking Dual-Speed “Super Class”

hub manager can simultaneously bridge up to 24 asyn-

chronous 10/100Mbps ports, with an aggregated

throughput of up to 2.4 Gbps, or effectively 50 times

faster than a traditional Dual-Speed hub.

A complete 10/100 Dual-Speed “Super Class” Hub can

be built with the use of the ACD300xx, 10/100 PHYs

MAJOR FEA TURES

•8/12/16/24 ports, 10/100 auto-sensing

with a MII interface

•Half-duplex operation on each port

•Non-blocking bridging with up to 2.4 Gbps

(24 ports) aggregated throughput

•Built-in storage of 2,048 MAC address

•Automatic address management

•Back-pressure flow control

•Store-and-forward operation mode

•Wire speed forwarding rate

•Port based V-LAN support

•Interfaces for optional external ARL, MIB & CPU

•Status LEDs: Link, Speed, Transmit, Receive,

Collision and Frame Error

•388-pin PBGA for 8/12-port,

576-pin PBGA for 16/24-port

•Single 3.3V power supply

•3.3V I/O with 5V tolerance

To 10/100 PHYs

Dual Speed

"Super Class" Hub Manager

DMX

MAC

To LED

Driver

Lookup En

ine

(2K MAC Addr.)

LED

Controller

ACD300xx Functional Block Diagram

SRAM

Interface

To Frame Buffer

SRAM

To Optional

ARL, MIB & CPU

Other

Interfaces

Other

Interfaces

Other

Interfaces

and SRAM. Dual-Speed “Super Class” Hubs with ad-

vanced features can also be implemented with the use

of interfaces for optional external ARL (Address Reso-

lution Logic), external MIB (Management Information

Base), control CPU and management CPU.